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e2442f2d47
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20 Commits

Author SHA1 Message Date
Sergio Gasquez Arcos
e2442f2d47
Initial support for I2C in ESP32-H2 (#538) 
* feat: ✨ Enable i2c peripheral

* feat: ✨ Add I2cExt1 for H2

* feat: ✨ Initial i2c support

* feat: ✨ Add i2c examples

* ci: ✨ Add embassy_i2c check

* ci: 🐛 Fix features

* docs: 📝 Update changelog

* feat: ✨ Add read_efuse example
 2023-05-15 16:20:01 +02:00
bjoernQ
7f769612b9 Set vecbase on core1 2023-05-15 16:09:43 +02:00
Sergio Gasquez Arcos
70e453902c
Initial support for RSA in ESP32-H2 (#526) 
* feat: ✨ Initial support for RSA

* docs: 📝 Update docstring

* docs: 📝 Update changelog

* fix: 🔥 Remove duplicated code
 2023-05-15 09:42:19 +01:00
Sergio Gasquez Arcos
5b47c37449
Initial support for AES in ESP32-H2 (#528) 
* feat: ✨ Initial support for AES

* docs: 📝 Update changelog
 2023-05-12 13:46:22 +02:00
Sergio Gasquez
29757abe07 feat: ✨ Initial support for SHA 2023-05-11 09:30:40 -07:00
Jesse Braham
c5d8cc62b8
Merge pull request #513 from esp-rs/feature/esp32h2 
Add initial support for the ESP32-H2
 2023-05-09 10:06:32 -07:00
bjoernQ
f0882e8d62 ESP32-S3: Initial PSRAM Support 2023-05-08 17:38:33 +02:00
Jesse Braham
4e9e1d1fea Add ESP32-H2 support for TIMG and UART (#500) 
* Begin working on `PeripheralClockControl` for the ESP32-H2

* Update `UART` driver to add H2 support

* Update `TIMG` driver to add H2 support

* Update the hello_world example to use `TIMG` and `UART`
 2023-05-08 08:03:08 -07:00
Jesse Braham
c3b4e83846 Add initial ADC/GPIO implementation for ESP32-H2 (#494) 
* Add `esp32h2-hal` package to the VS Code workspace and CI workflow

* Add initial (not quite complete) implementation of GPIO/ADC for ESP32-H2
 2023-05-08 08:03:08 -07:00
Sergio Gasquez Arcos
854e52c417 Add ESP32- H2 soc/efuse methods (#486) 
* feat: ✨ Implement efuse methods

* feat: ✨ Add NUM_PINS

* doc: Update link to point at specific commit

Co-authored-by: Jesse Braham <jessebraham@users.noreply.github.com>

---------

Co-authored-by: Jesse Braham <jessebraham@users.noreply.github.com>
 2023-05-08 08:03:08 -07:00
Kirill Mikhailov
9493b38a1b Started adding ESP32-H2 support (#482) 2023-05-08 08:03:08 -07:00
Björn Quentin
13acedf69a
ESP32: Initial PSRAM Support (#506) 
* ESP32: Initial PSRAM Support

* Update CHANGELOG, fmt
 2023-05-04 12:21:24 +01:00
bjoernQ
a9f69b29d8 Add bare-bones PSRAM support for ESP32-S2 2023-04-25 16:47:57 +02:00
dimpolo
8815e75250
fix CpuControl::start_app_core signature (#466) 2023-04-05 16:37:22 +01:00
bjoernQ
01f35245f8 Fix 802.15.4 clock enabling (ESP32-C6) 2023-03-28 13:41:21 +02:00
bjoernQ
4bd05d9032 Fix typo 2023-03-27 13:01:36 +02:00
bjoernQ
94bbdac00e Add support for radio peripheral clock control 2023-03-27 10:26:45 +02:00
Jesse Braham
a0b72bdfa5 Use latest PACs and make required changes 2023-03-14 06:23:58 -07:00
Björn Quentin
c1fa400e7c
RISCV: Separate PLIC and non-PLIC (#428) 
* RISCV: Separate PLIC and non-PLIC

* De-duplicate code

* Write 0 to INTR_MAP again to disable peripheral interrupts

* Limit visibility of `get_assigned_cpu_interrupt`
 2023-03-09 10:57:49 -08:00
Jesse Braham
984b7fc042
Refactor chip-specific code into esp_hal_common::soc module (#412) 
* Create an `soc` module with a submodule for each chip, move `peripherals` in

* Move the `cpu_control` module into `soc`

* Move the `efuse` module into `soc`

* Refactor type definitions from `gpio` module into `soc`

* Put all embassy-related files in a common directory

* Change visibility of `GpioPin` constructor
 2023-02-28 07:49:41 -08:00