* tests: Add clock_monitor HIL test
* feat: Adjust accepted freq ranges
* fix: Get the estimate a second time if its very off
* test: Update ranges and check
* test: Initial AES DMA HIL tests
* test: Cover all the AES modes
* feat: Reset aes at the end of the tests to avoid errors in `aes` test
* feat: Reset the interrupt state when finishing the transform
* docs: Document new xtask features
* style: format deps
* feat: enable all the aliases
* feat: Update embedded-tests executors
* feat: Enable running only one test
* feat: Exit if a test fails
* docs: Fix typo in command
* build: Enable xtensa-semihosting in xtensa targets
* feat: Handle probe-rs esp32 chip name
* style: Clippy lints
* revert: Exit if a test fails
* chore: Remove aliases
* feat: Remove unnecesary toogle
* feat: Error if a test fails and print failed tests
* Refactor testing, add defmt, add async gpio test
* Add test to ensure the some edge case pins can be used in async mode
* Add test for pin0
* clippy
* update test to use constants extracted from esp-idf's soc module
* address review comments
* simplify test to just initialize one pin as async
* changelog
