Commit Graph

12 Commits

Author SHA1 Message Date
Dániel Buga
39519dfdc9
RISC-V executors (#947)
* RISC-V executors

* Add multiprio example to RISC-V SoCs

* Check new examples

* Hack in support for generic queue

* Reserve SoftwareInterrupt0 for multicore thread-mode executors

* Merge interrupt executors

* Merge thread-mode executors

* Document the new features and expand on time drivers

* Main tasks don't have to return !

* Unify multiprio examples

* Undo C6 log output change
2023-11-22 14:36:53 +00:00
Björn Quentin
a0ebdf0399
embassy #[main] convenience for RISC-V / Xtensa (#841) 2023-10-11 12:10:14 +01:00
Scott Mabin
db409ffe7b
Unify the system peripheral (#832)
* Unify the system peripheral

Whilst the PCR, SYSTEM and DPORT peripherals are different, we currently
use them all in the same way. This PR unifies the peripheral name in the
hal to `SYSTEM`. The idea is that they all do the same sort of thing, so
we can collect them under the same name, and later down the line we can
being to expose differences under an extended API.

The benifits to this are imo quite big, the examples now are all identical,
which makes things easier for esp-wifi, and paves a path towards the
multichip hal.

Why not do this in the PAC? Imo the pac should be as close to the
hardware as possible, and the HAL is where we should abstractions such
as this.

* changelog
2023-09-29 08:14:50 -07:00
Jesse Braham
0064766ef2
No longer publicly expose the PeripheralClockControl struct (#817)
* No longer publicly expose the `PeripheralClockControl` struct

* Update examples as needed to get things building again

* Update CHANGELOG.md

* Address review feedback, fix a warning

* Use a critical section for all devices other than the ESP32-C6/H2, as they modify multiple registers

* Rebase and update `etm` driver to fix build errors
2023-09-26 09:07:57 -07:00
Jesse Braham
d12a3dbac5
Update all examples to remove unnecessary disabling of watchdogs (#768)
* Update `esp32-hal` examples

* Update `esp32c2-hal` examples

* Update `esp32c3-hal` examples

* Update `esp32c6-hal` examples

* Update `esp32h2-hal` examples

* Update `esp32s2-hal` examples

* Update `esp32s3-hal` examples

* Fix the `ram.rs` examples
2023-08-31 07:17:12 -07:00
Dániel Buga
e082d47a87
Multicore-aware executors (#723)
* Implement multicore-aware executors

* Add examples

* Use pre-defined config to import SystemPeripheral

* Use static_cell::make_static
2023-08-28 10:05:42 -07:00
Juraj Sadel
40bf086a0c
Add PeripheralClockControl argument to timg, wdt, sha, usb-serial-jtag and uart constructors (#463)
* PeripheralClockControl timer

* Add PeripheralClockControl to timg, wdt, sha, usb-serial-jtag and uart

* ESP32 updated examples

* ESP32C2 updated examples

* ESP32C3 updated examples

* ESP32S2 updated examples

* ESP32S3 updated examples

* ESP32C6 updated examples

* cargo fmt
2023-03-31 09:51:34 +02:00
Björn Quentin
4e88e48bbe
Remove unnecessary rt crate dependencies (#391)
* Remove unnecessary `rt` crate dependencies

* Bump versions, update to latest released dependencies
2023-02-10 07:24:12 -08:00
Scott Mabin
0eac22eba1
Async: GPIO (#333)
* Add `is_listening` to `Pin` trait

* Add `Wait` impl for Gpio Input

* Add GPIO wait example for C3

* Ensure correct bank is accessed in interrupt

* Add esp32c2 wait example

* Add esp32s3 wait example

* Add esp32s2 wait example

* Add esp32 wait example

* Run fmt

* Add example to cargo tomls

* Add top level docs for embassy examples

* Mention the higher MSRV for async in the README

---------

Co-authored-by: Jesse Braham <jesse@beta7.io>
2023-01-27 10:44:08 -08:00
Scott Mabin
248fb356f8
PeripheralRef init: uart (#272)
* Add the peripheral module plus some helper macros in preparation

* peripheral macro

* Add peripheral generation macro

* Fixes after rebase

* Update the signature of Peripherals::take

* syncronise hello world example

* fmt the entire repo

Co-authored-by: Jesse Braham <jesse@beta7.io>
2022-12-12 14:45:33 +00:00
Scott Mabin
0000d46ac5 Embassy init updates:
- Rename timg feature to timg0 to better refect which TG is being used
- Use the time_driver::TimerType in the signature of init to fix #268
- Update examples
- Fix CI features
- Add timg0 cfg to build.rs
2022-12-08 06:36:42 -08:00
Scott Mabin
9064177e99
Initial embassy support (#225)
* wip: timg embassy driver

- read_raw on timg renamed to now()
- timg initialized and stored in static for use in the embassy driver
- timg sets alarm value
- untested whether alarms actually trigger

* TIMG timer driver for esp32, esp32s3

- Adds the timg timer block as a time driver for embassy
- Not enabled on the C3 as it only has one timer block, better to use
  systimer
- s2 example added but can't build due to atomic requirements in
  futures-core

* Add S2 atomic support with emulation, fixup embassy support for the S2

* Move executor & static-cell to dev deps. Make eha optional

* Add c2 support, run fmt

* Update to crates.io embassy releases

* Update eha

* update timg time driver to new trait

* Remove exception feature of esp-backtrace and use the user handler for backtracing

* Add async testing workflow

* Update systick example

* Fix S2 examples

* Update xtensa-toolchain

* set rustflags for s2 target

* Disable systick for esp32s2 until we can fix the noted issues

* review improvements

- Fix intr prio array being off by one
- emabssy time prio interrupt set to max prio
- use cfg instead of feature for systick detection

* Update example time delays
2022-11-09 08:04:38 -08:00