Commit Graph

26 Commits

Author SHA1 Message Date
Gustavo Henrique Nihei
a33c0de7f6 rtc: Add RWDT examples for ESP32, ESP32-S2 and ESP32-S3
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-08-08 13:34:22 -03:00
Gustavo Henrique Nihei
91ea205446
ESP32-C3: Add driver for RTC Watchdog Timer (RWDT) (#134)
* esp32: Fix typo in Frequency word in some identifiers

Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>

* esp32c3: Add support for PLL clock configuration

Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>

* clock: Move definition of Clock types to common level

Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>

* esp32c3: Add support for RTC Clock configuration

Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>

* esp32c3: Add example for the RTC Watchdog Timer driver

Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2022-08-08 15:36:19 +01:00
bjoernQ
275cede963 Fix LEDC divider calculation, use REF_TICK when needed 2022-08-08 14:41:55 +02:00
Scott Mabin
1d02bf87c3
RISCV vectored interrupts (#118)
* RISCV interrupt vectoring

- Adds support for vectoring peripheral interrupts to PAC handlers
- Currently supports level interrupts with priorities from 1-15
- Updated the gpio interrupt example to reflect the new changes

* remove .vscode files

* Support vectored edge interrupts

This is as simple as making sure we clear the CPU interrupt whenever we
receive one. This also documents further what APIs are safe to call when
the `vectored` feature is enabled.

* fix all examples to use vectoring

* doc & cleanup

* run handlers from ram

* make xtensa::interrupt::vectored private, we rexport public items

* fix default handlers

* pass interrupt into EspDefaultHandler
2022-07-26 09:24:47 -07:00
Scott Mabin
1789780d06
Xtensa vectored interrupts (#103)
* Xtensa interrupt vectoring: peripheral source

- Initial Xtensa vectoring, updated esp32 gpio example to use new interrupt macro.
- Only peripheral sources supported.
- Only level one priority supported.
- CPU & Edge interrupts still need to be handled.

* Xtensa interrupt vectoring: CPU & EDGE

- Add support for handling CPU interrupts and edge interrupts
- PR required to xtensa-lx-rt for CPU handlers

* Xtensa interrupt vectoring: Priority

- Finally implement priortization
- Only three priorities available at the moment. Xtensa programmer guide
  discourages using highpri interrupts in Rust/C. Guide also mentions
  using software priortization to increase the number of Priorities
  available

* support CPU interrupts, using patch xtensa-lx-rt

* Update example

* Add support & examples for the s2 & s3 too

* Fix formatting and missing imports

* Run interrupt handling in ram, optionally run the vector handler in ram in the examples

* Use xtensa_lx::Mutex CS when enabling interrupts

* Run clippy on each target

* Remove redundant features

* Fix C3 builds

* make enable unsafe. Add note about preallocated interrupts in vectored mode.

* Remove `INTERRUPT_LEVELS` static

The interrupt levels static introduces a few issues
  - A lock is needed when configuring interrupts to keep
    INTERRUPT_LEVELS in a consistent state
  - Interrupts enabled from outside the Rust domain wouldn't be
    serviced, this is the case with the wifi blobs

To remove it, the prioty configuration is now calculated dynamically in
the interrupt handler. Essentially INTERRUPT_LEVELS is now created once
the interrupt triggers. It has some benefits, such as only having to
look at interrupts configured on the current core, not both, but there
is of course an overhead with doing this in the interrupt.

* Allow raw interrupts on levels 4-7, whilst also supporting vectoring on levels 1-3

* rename core number features

* Fix examples and formatting

* use xtensa-lx-rt release, update pacs

* Support passing the trap frame into interrupt handlers

* cfg away the #[interrupt] macro when not using vectoring

* rename enable to map

move vectored feature to chip specific hals

* export vectored functions

- rename `enable_with_priority` to `enable`
- add docs for interrupt macro

* Update all examples to use vectored interrupts
2022-07-25 07:12:34 -07:00
Björn Quentin
9fa1d1ecdb
Add direct-boot support for ESP32-S3 (#107)
* Add direct-boot support for ESP32-S3
* Make sure to use correct alignments
* Only enable naked_functions and asm_experimental_arch when direct-boot feature is selected
2022-07-20 07:14:19 -07:00
Björn Quentin
147d8de988
Separate TIMG into timer0, (timer1), wdt (#104)
* Separate TIMG into timer0, (timer1), wdt
* Apply suggestions from code review
* Remove left-over code
* Ignore settings.json
2022-07-20 06:51:39 -07:00
Björn Quentin
e612bd1120
Add some config options to the UART driver (#99)
* Add some config options to the UART driver
* Use esp-println 0.2.0
* Remove the NoPin type
* Serial constructor now doesn't return a Result anymore
2022-07-12 08:00:02 -07:00
bjoernQ
1655e36c31 Implement starting a task on second core of ESP32 and ESP32-S3 2022-07-05 17:41:55 +02:00
bjoernQ
8a3a0e7cb9 Reading of some eFuses 2022-06-17 16:51:26 +02:00
bjoernQ
9c244ba16c Make sure that HAL users don't need to depend on esp-hal-common 2022-06-13 16:38:58 +02:00
Scott Mabin
4acdf2516c
[esp32c3] SYSTIMER peripheral (#76)
* initial systimer impl
* Add systimer example
* Make Alarms real singletons
  * Remove runtime Option, turn into compile error
  * Make Systimer::now() not take self
* refactor shared alarm methods
* Implement esp32c3 delay with monotonic SystemTimer::now()
* Add extend systimer support to esp32s3 and add example
* systimer: esp32s2 support
2022-06-10 07:53:45 -07:00
Björn Quentin
3fd4b03144
Add boot-default ClockConfig (#77) 2022-06-09 13:51:17 +01:00
Björn Quentin
76a2067339
Add feature to reserve Bluetooth RAM for ESP32 (#63) 2022-05-20 10:38:39 +01:00
Robert Wiewel
a55c9d77ec Add RMT output channel support for all current ESP32 variants
- Add RMT output channel support for ESP32, ESP32-S2, ESP32-S3, ESP32-C3
- Add add RMT adapter for `smart-leds` crate
- Add example `hello_rgb` for ESP32-S2, ESP32-S3 and ESP32-C3 that either
  drives one LED at the pin where a LED is located on the official devkits
- Add example `hello_rgb` for ESP32 that is driving a 12-element RGB ring.
2022-05-17 15:56:25 +02:00
Jesse Braham
c0a584ecfa
Add a minimal driver for the USB_SERIAL_JTAG peripheral (#56)
* Add a minimal driver  for the USB_SERIAL_JTAG peripheral implementing core::fmt::Write
2022-05-02 03:55:36 -07:00
bjoernQ
15c34c23e4 Merge branch 'main' into feature/spi 2022-03-10 17:51:18 +01:00
Jesse Braham
bad8020abe Implement the embedded-hal Read trait for the RNG peripheral 2022-03-10 08:14:39 -08:00
bjoernQ
3f7a675b1e Implement SPI 2022-03-10 11:03:20 +01:00
bjoernQ
e34319b763 Apply more suggestions from code review 2022-03-02 09:38:06 +01:00
Robert Wiewel
f2884bd3b8 Add RWDT disable in RTC_CNTL for ESP32/S2/S3 2022-02-25 23:41:05 +01:00
bjoernQ
ab046efce3 GPIO for ESP32S3 2022-02-23 15:46:54 +00:00
bjoernQ
545f997b07 Support ESP32S3 2022-02-16 15:44:06 +00:00
Jesse Braham
9a030cbf78 Implement DelayMs and DelayUs traits from embedded-hal 2022-01-10 13:52:46 -08:00
Jesse Braham
4e9ad72839 Assorted updates to make most things build properly... still some errors 2021-11-23 20:12:34 -08:00
Jesse Braham
61e3d6ccf3 Add the (incomplete and non-buildable) esp32s2-hal and esp32s3-hal packages 2021-11-23 14:11:51 -08:00