Commit Graph

141 Commits

Author SHA1 Message Date
Juraj Sadel
40bf086a0c
Add PeripheralClockControl argument to timg, wdt, sha, usb-serial-jtag and uart constructors (#463)
* PeripheralClockControl timer

* Add PeripheralClockControl to timg, wdt, sha, usb-serial-jtag and uart

* ESP32 updated examples

* ESP32C2 updated examples

* ESP32C3 updated examples

* ESP32S2 updated examples

* ESP32S3 updated examples

* ESP32C6 updated examples

* cargo fmt
2023-03-31 09:51:34 +02:00
Jesse Braham
a9104020fc
Minor documentation improvements (#460)
* Add README, improve documentation for `esp-hal-procmacros`

* Improve documentation for `esp-hal-smartled`

* Use esp-rs logo for all packages' documentation
2023-03-30 06:05:28 -07:00
bjoernQ
01f35245f8 Fix 802.15.4 clock enabling (ESP32-C6) 2023-03-28 13:41:21 +02:00
Jesse Braham
aac83644af New releases for all packages 2023-03-27 10:38:46 -07:00
Juraj Sadel
0244c6d6fc
Feature/reset functionalities (#452)
* add `software_reset`, `software_reset_cpu` and `rtc_get_wakeup_cause`

* Add SOC wakeup symbols

* Add SleepSource and WakeupReason enums and get_wakeup_cause() function

* Add other SOC wakeups

* fixups and fmt

* address review comments

* Update symbols in WakeupReason enum

* fmt

---------

Co-authored-by: Anthony Grondin <104731965+AnthonyGrondin@users.noreply.github.com>
2023-03-24 20:37:24 +01:00
Scott Mabin
3444476eb2 ESP32 DRAM linker fix
The ROM code _data_ section is loaded into the middle of the DRAM
address space, unlike the other chips where it is loaded at the end.
Therefore subtracting the previously "reserved" section from heap end
could actually corrupt the ROM data section.

For the ESP32, the DRAM block has been split into two individual
segments, with some reserved segments in the middle (addresses taken
from esp-idf). At the moment we don't use the second segment at all in
esp-hal, but we could utilize it in esp-wifi for placing the internal
allocator for example.
2023-03-24 14:49:45 +00:00
Björn Quentin
593dcb875b
Merge pull request #444 from bjoernQ/feature/spi-half-duplex
Half-duplex SPI
2023-03-23 08:35:25 +01:00
bjoernQ
ba75b151c3 Fix embassy_spi example 2023-03-22 09:06:37 +01:00
bjoernQ
6c7875afef Half-duplex SPI 2023-03-21 15:44:16 +01:00
Scott Mabin
9a5a546228
Unify linker scripts (#443)
* esp32 & esp32s2 sharing scripts

* add wokwi files

* Add fixup section for esp32s2, fix ordering of sectino includes

* Remove debug asm file

* Use shared linker scripts for s3 with fixups

* Add external.x sections back

* Move ld scripts into esp-hal-common

* esp32c3 unified linker scripts

- rework original c3 script to use the xtensa named sections
  (e.g, _SECTIONNAME_start)
- Add fixups in esp32c3 specific linker
- Remove useless text section start and end (not required when using any
  form of bootloader)

* Add RTC alias'. Move some shared fixups to a file

* comment and cleanup

* unify c2 linker script

* unify c6 linker script

* remove debug configs

* use new esp-riscv-rt

* fmt

* align db symbol names

* fix s3 db
2023-03-20 08:12:14 -07:00
Jesse Braham
536adac991
Clean up cfg gating and prelude module (#442)
* Add additional `cfg` gates to re-exports in `esp-hal-common`

This leaves only `clock`, `delay`, `peripheral`, `prelude`, `rom`, and `soc` *not* behind `cfg`s

* Simplify the prelude, update its `cfg`s, and re-export some missing traits

* Update various dependencies
2023-03-20 11:22:55 +00:00
Jesse Braham
a0b72bdfa5 Use latest PACs and make required changes 2023-03-14 06:23:58 -07:00
Jesse Braham
5747ddee14
Extract the esp-hal-smartled package (#429)
* Extract the `esp-hal-smartled` package

This (finally) eliminates the `esp_hal_common::utils` module!

* Remove all references to the old `smartled` feature from CI
2023-03-10 10:36:07 +00:00
Jesse Braham
f7830e2750
Reduce duplication, simplify re-exports, and general cleanup/organization (#424)
* Move some linker scripts into `esp-hal-common` and update the build script

* Move `EspDefaultHandler` and `DefaultHandler` definitions into `esp-hal-common`

* Re-export everything from `esp-hal-common`

* Add a couple cfg symbols, cleanup/organize some exports/modules
2023-03-08 06:35:59 -08:00
Scott Mabin
fd4e8e2778 ensure _heap_end symbol excludes reserved for boot section 2023-03-07 07:33:04 -08:00
Jesse Braham
72b9bcb015 Re-export Peripheral 2023-03-07 06:42:29 -08:00
Sergio Gasquez
1076f54462 docs: 📝 Add comma 2023-03-07 10:36:29 +01:00
Sergio Gasquez
1f69d29316 docs: 📝 Fix typo 2023-03-07 10:35:19 +01:00
Sergio Gasquez
d8c41b47af docs: 📝 Update install instructions 2023-03-07 10:34:52 +01:00
Jesse Braham
dc0911aa0d Use latest version of esp-backtrace for all devices 2023-02-28 09:25:55 -08:00
Jesse Braham
39b4db0cf9 Add examples for the RNG peripheral for all supported devices 2023-02-28 07:58:38 -08:00
Jesse Braham
984b7fc042
Refactor chip-specific code into esp_hal_common::soc module (#412)
* Create an `soc` module with a submodule for each chip, move `peripherals` in

* Move the `cpu_control` module into `soc`

* Move the `efuse` module into `soc`

* Refactor type definitions from `gpio` module into `soc`

* Put all embassy-related files in a common directory

* Change visibility of `GpioPin` constructor
2023-02-28 07:49:41 -08:00
Jesse Braham
d3969c3130 New releases for all HAL packages 2023-02-21 07:43:44 -08:00
RepeatedRoot
912ab3008e
add support for 26mhz esp32 2023-02-16 16:54:26 +10:30
bjoernQ
f385a7dfd2 Make sure to re-export xtensa-lx-rt 2023-02-13 10:09:20 +01:00
Björn Quentin
4e88e48bbe
Remove unnecessary rt crate dependencies (#391)
* Remove unnecessary `rt` crate dependencies

* Bump versions, update to latest released dependencies
2023-02-10 07:24:12 -08:00
Björn Quentin
ab9aeb2443 AnyPin 2023-02-08 14:31:54 +01:00
Scott Mabin
3f7181fece
Async SPI (#385)
* ground work for async dma (gdma only atm)

* Add async DMA (GDMA) - esp32c3/esp32c2

* Add Async SPI impl for esp32c3/c2

* Remove private modules from DMA

* add async spi example for esp32c3

* Switch to assoc wakers instead of a static array

* add support for esp32/esp32s2

* add support for esp32s3

* run fmt

* add c2 example, fix CI

* Remove redundant comments
2023-02-08 11:02:03 +00:00
Scott Mabin
0eac22eba1
Async: GPIO (#333)
* Add `is_listening` to `Pin` trait

* Add `Wait` impl for Gpio Input

* Add GPIO wait example for C3

* Ensure correct bank is accessed in interrupt

* Add esp32c2 wait example

* Add esp32s3 wait example

* Add esp32s2 wait example

* Add esp32 wait example

* Run fmt

* Add example to cargo tomls

* Add top level docs for embassy examples

* Mention the higher MSRV for async in the README

---------

Co-authored-by: Jesse Braham <jesse@beta7.io>
2023-01-27 10:44:08 -08:00
Jesse Braham
d03c267084 New releases for all HAL packages 2023-01-26 08:51:24 -08:00
mhead
586276fd34 aes accelerator implementation 2023-01-24 10:04:57 -08:00
Jesse Braham
832f9ef4d4
Refactor the clock module, provide ROM functions via linker scripts (#353)
* Refactor `clock` and `clocks_ll` into a common module

* Add a ROM function linker script to each HAL and provide some functions

* Use the provided ROM functions instead of transmuting addresses

* Fix CI workflow for ESP32-S2
2023-01-23 07:12:33 -08:00
Jesse Braham
d29c4b1dcf
Update a number of dependencies to get RISC-V HALs building again (#350)
* Update `riscv`, `riscv-rt` dependencies, plus PACs for RISC-V chips

* Update `riscv-atomic-emulation-trap` package

* Update the `embassy-executor` dev dependency to a newer version
2023-01-18 14:08:30 -08:00
liebman
ac206af656
pulse counter implementation (#328)
* start of pulse counter implementation

* implement interrupts
implement pcnt for esp32, esp32s2, and esp32s3

* implement pcnt for esp32s2

* fix esp32 PCNT signal names

* update PCNT register/fields for cleaned up PAC

* implement events/get_events (choosing what events interrupt)

* added pcnt example: simple encoder configuration

* restrict pcnt::channel::Channel::new() to super

* PcntPin -> PcntSignal
added range checks for thresholds and limits

* PcntSource is a better name I think

* handle error for PCNT Unit configure() in example

* update pac versions for status register change

* cargo fmt

* cargo fmt (examples)

* PcntSource now only stores the source id.
add a critical section to protect the ctrl & isr_en registers

* cargo fmt
2023-01-17 17:04:22 +00:00
Scott Mabin
452fde2c12
Peripheral ref/gpio (#323)
* Implement Peripheral for all GPIO pins

* Update i2c & i2s to use the new gpio peripherals ref

* gpio pref: usb

* gpio pref: pulse control (RMT)

* gpio pref: spi

* gpio pref: uart

* gpio pref: ledc

* gpio pref: mcpwm

* fixup smartleds to use new pulse controller traits

* dump msrv

* bump rust-version in cargo tomls
2022-12-19 14:40:29 +00:00
Jesse Braham
220f812625
Peripheral ref/sha (#312)
* Add SHA to list of peripherals to be created

* Refactor SHA peripheral to use PeripheralRef

* Update SHA examples to get them building again
2022-12-14 12:19:53 +00:00
bjoernQ
dc8963c0a8 Support ESP32-C2 with 26MHz Xtal 2022-12-13 05:15:10 -08:00
Scott Mabin
248fb356f8
PeripheralRef init: uart (#272)
* Add the peripheral module plus some helper macros in preparation

* peripheral macro

* Add peripheral generation macro

* Fixes after rebase

* Update the signature of Peripherals::take

* syncronise hello world example

* fmt the entire repo

Co-authored-by: Jesse Braham <jesse@beta7.io>
2022-12-12 14:45:33 +00:00
Jesse Braham
03d94a0ba2 New releases for all HALs 2022-12-12 01:29:49 -08:00
Scott Mabin
0000d46ac5 Embassy init updates:
- Rename timg feature to timg0 to better refect which TG is being used
- Use the time_driver::TimerType in the signature of init to fix #268
- Update examples
- Fix CI features
- Add timg0 cfg to build.rs
2022-12-08 06:36:42 -08:00
bjoernQ
4ab05e8923 Pass trap frame to CPU interrupt handlers (Xtensa) 2022-12-06 02:07:49 -08:00
Björn Quentin
c46719e112
Merge pull request #255 from dimpolo/mcpwm
MCPWM MVP implementation
2022-12-01 08:34:16 +01:00
Björn Quentin
bc4e180a1a
Merge pull request #280 from bjoernQ/gpio-refactoring
GPIO module refactoring
2022-11-30 08:15:13 +01:00
dimi
2d81313475 add PeripheralClockConfig and TimerClockConfig 2022-11-30 00:55:39 +01:00
dimi
4327506bb2 use Clocks.pwm_clock on ESP32 2022-11-30 00:55:38 +01:00
dimi
408243d7e1 improve mcpwm::operator, add PwmPinConfig 2022-11-30 00:55:38 +01:00
dimi
18c7ef7802 WIP MCPWM implementation 2022-11-30 00:55:38 +01:00
dimi
7a51433944 remove i2c::SetupError and make i2c::I2C::new infallible 2022-11-29 14:19:45 +01:00
bjoernQ
878bbc4c0c GPIO module refactoring 2022-11-29 12:03:04 +01:00
C2D
59d02f5f6e
Add SHA accelerator implementation (#257)
* Add untested basic SHA for esp-sX/cX chips

* Fix ptr type inconsistency for S2

* Add ESP32 impl & fix process_buffer latch issue

* Add debug example for SHA accelerator

* Clean up no-op buffer prints

* Test vector parity (on esp32s3)

* Checkpoint for converting to alignment helper

* Finish refactoring & additional parity tests on esp32s3

* Remove core_intrinsics requirement for now

* Fix case where (src.len() % 4) == 3

* Finish sha2 example with performance comparison (12-61x speedup)

* Refactor ESP32 to alignment helper & Clean up example

* Prevent out-of-bounds reads in ESP32 version

* Revert Cargo debug changes

* Remove cargo config.toml

* Clean up example

* Remove common/rust-toolchain & ignore in future

* Might as well use actual size_of const

* Remove SHA512/SHA384 for C2/C3

* Directly import nb::block! to remove unused import warning & fix c2 feature detect

* Remove stray newlines

* Fix esp32c2 having SHA256

* ESP32 also has SHA384

* Remove comments that don't have a purpose

* Clean up example & finish() handling

* Add examples & add ESP32 free()

* Update C2/C3 examples to show accurate algorithm used

* Fix busy check for ESP32

* Remove outdated TODO comment

* Update PAC for ESP3 and (actually) fix busy check

* Refactor ESP32 version to reduce search space

* Add debug printlns to sha example & clean up comments

* Fix ESP32 version, finally

Co-authored-by: ferris <ferris@devdroplets.com>
Co-authored-by: Jesse Braham <jesse@beta7.io>
2022-11-28 14:20:31 -08:00