5 Commits

Author	SHA1	Message	Date
Björn Quentin	3fd4b03144	Add boot-default ClockConfig (#77)	2022-06-09 13:51:17 +01:00
Jesse Braham	ec6a82b3f4	Clean up imports and format all packages	2022-05-05 11:16:05 +02:00
bjoernQ	43c8f34e5f	Update xtensa-lx-rt, fix interrupt related examples	2022-04-04 08:52:27 -07:00
Robert Wiewel	f2884bd3b8	Add RWDT disable in RTC_CNTL for ESP32/S2/S3	2022-02-25 23:41:05 +01:00
bjoernQ	cac30b7544	Add basic interrupt support for ESP32C3 and ESP32	2022-01-31 16:34:45 +00:00