Commit Graph

31 Commits

Author SHA1 Message Date
Seth Pellegrino
c6ac87f4dc Add check for opt-level="z" for esp32c3 2022-09-26 11:01:25 -07:00
Jesse Braham
ee7e9bd0a1 Bump version numbers and update dependencies 2022-09-13 21:01:08 +02:00
har7an
8b9fd8b7a0
embedded-hal SpiDevice on all esp32 variants (#106)
* WIP: common/spi: Implement `SpiDevice`

to get shared access to an SPI bus directly via the HAL.

* WIP: common/spi: add SpiBusDevice::new

to create instances via a function call.

* esp32/examples: Add example for spi device trait

* common/spi: Finish "SpiDevice" implementation

for esp32. Abandons the approach of having the user pass in some generic
mutex in favor of creating the Mutex as part of the API so it isn't
exposed to the user in the first place.

* common/spi: Add more thorough docs

* esp32/examples: Fix example for eh1 "SpiDevice"

* common/spi: Implement `SpiDevice` for xtensa arch

and move the code into a submodule that is fenced with conditional
compilation directives.

* esp32/examples: Update spi device example

to the changed APIs for the timers and clocks, and add more transmission
tests to the example code.

* common/spi: Create devices from buscontroller

directly, instead of offering only the `new` method.

* common/spi: Finish `SpiBusDevice` trait

from embedded-hal 1.0.0-alpha.8.

* esp32: Update `SpiBusDevice` usage example.

* common/spi: Fix mutex types for xtensa32 esp

because the esp32/esp32s3 can use `SpinLockMutex`, whereas the esp32s2
has access only to `CriticalSectionMutex`.

* common/spi: Implement `SpiBusDevice` for riscv

based esp32c3.

* general: Add examples for spi device loopback

to all esp variants.

* common: Use esp_backtrace in spi_eh1_device examples

* common/spi: Update module documentation.

* common/spi: Use `critical_section::Mutex`

to unify locking across all esp variants.

* esp32c3-hal: Fix spi device example

* esp32c3/examples: Fix typo in used spi pins

Co-authored-by: Jesse Braham <jessebraham@users.noreply.github.com>

Co-authored-by: Jesse Braham <jessebraham@users.noreply.github.com>
2022-08-30 06:55:53 -07:00
Jesse Braham
6f20358124
Update the Cargo manifests and top-level README (#168)
* Add the `rust-version` key to each Cargo manifest

* Normalize dependencies and features in each Cargo manifest

* Enable all features in CI when checking examples

* Update the top-level README
2022-08-25 09:20:05 -07:00
Scott Mabin
be184a552d
critical_section implementations & esp_backtrace (#151)
* CS impl

* use CS Mutex in C3 examples

* use CS Mutex in S2 examples

* Update esp32 example

* run fmt

* Update S3 examples

* Remove uses of unsafe where no longer required

* use esp_backtrace in examples

* fix import & fmt once more

* Bump MSRV to 1.60.0

Co-authored-by: Jesse Braham <jesse@beta7.io>
2022-08-22 20:02:28 +01:00
har7an
2fe27536aa
SPI: Implement more SPI traits from embedded-hal 1.0.0-alpha.8 (#101)
* common/spi: Turn fifo size into const

instead of hard-coding it into the code in various places.

* common/spi: Alias `write_bytes` to `send_bytes`

since they share the same interface and the same code anyway.

* common/spi: Implement `read_bytes`

as counterpart to `send_bytes` that is responsible only for reading
bytes received via SPI.

* common/spi: Rewrite `transfer`

to use `send_bytes` and `read_bytes` under the hood and remove duplicate
code.

* common/spi: Create submodule for embedded_hal_1

that is re-exported when the `eh1` feature flag is active. This removes
lots of duplicate `#[cfg(...)]` macros previously part of the code.

* common/spi: Implement `SpiBus` and `SpiBusWrite`

traits from the `embedded-hal 1.0.0-alpha.8`.

* common/spi: Make `mosi` pin optional

* esp32-hal: Add new SPI example with `eh1` traits

* esp32-hal/examples/spi_eh1: Add huge transfer

and bump the SPI speed to 1 MHz.

* common/spi: Apply rustfmt

* common/spi: Use `memcpy` to read from registers

This cuts down the time between consecutive transfers from about 2 ms
to less than 1 ms.

* WIP: common/spi: Use `ptr::copy` to fill write FIFO

cutting down the time between transfers from just below 1 ms to ~370 us.

The implementation is currently broken in that it will always fill the
entire FIFO from the input it is given, even if that isn't FIFO-sized...

* common/spi: Add more documentation

* esp32/examples/spi_eh1: Fix `transfer_in_place`

* esp32/examples/spi_eh1: Add conditional compile

and compile a dummy instead when the "eh1" feature isn't present.

* esp32-hal: Ignore spi_eh1 example

in normal builds, where the feature flag "eh1" isn't given. Building the
example directly via `cargo build --example spi_eh1_loopback` will now
print an error that this requires a feature flag to be active.

* common/spi: Use `write_bytes`

and drop `send_bytes` instead. Previoulsy, both served the same purpose,
but `send_bytes` was introduced more recently and is hence less likely
to cause breaking changes in existing code.

* common/spi: Fix mosi pin setup

* Add SPI examples with ehal 1.0.0-alpha8 traits

to all targets.

* common/spi: Fix `read` behavior

The previous `read` implementation would only read the contents of the
SPI receive FIFO and return that as data. However, the `SpiBusRead`
trait defines that while reading, bytes should be written out to the bus
(Because SPI is transactional, without writing nothing can be read).

Reimplements the `embedded-hal` traits to correctly implement this
behavior.

* common/spi: Use full FIFO size on all variants

All esp variants except for the esp32s2 have a 64 byte FIFO, whereas the
esp32s2 has a 72 byte FIFO.

* common/spi: Use common pad byte for empty writes

* common/spi: Fix reading bytes from FIFO

by reverting to the old method of reading 32 bytes at a time and
assembling the return buffer from that. It turns out that the previous
`core::slice::from_raw_parts()` doesn't work for the esp32s2 and esp32s3
variants, returning bogus data even though the correct data is present
in the registers.

* common/spi: Fix typos

* examples: Fix spi_eh1_loopback examples
2022-08-17 11:57:55 +01:00
Scott Mabin
1d02bf87c3
RISCV vectored interrupts (#118)
* RISCV interrupt vectoring

- Adds support for vectoring peripheral interrupts to PAC handlers
- Currently supports level interrupts with priorities from 1-15
- Updated the gpio interrupt example to reflect the new changes

* remove .vscode files

* Support vectored edge interrupts

This is as simple as making sure we clear the CPU interrupt whenever we
receive one. This also documents further what APIs are safe to call when
the `vectored` feature is enabled.

* fix all examples to use vectoring

* doc & cleanup

* run handlers from ram

* make xtensa::interrupt::vectored private, we rexport public items

* fix default handlers

* pass interrupt into EspDefaultHandler
2022-07-26 09:24:47 -07:00
Jesse Braham
4ba610d38d Do not enable the smartled feature by default 2022-07-20 10:38:48 -07:00
Jesse Braham
b69423451f Bump the riscv-rt dependency version 2022-07-13 08:21:36 -07:00
Björn Quentin
e612bd1120
Add some config options to the UART driver (#99)
* Add some config options to the UART driver
* Use esp-println 0.2.0
* Remove the NoPin type
* Serial constructor now doesn't return a Result anymore
2022-07-12 08:00:02 -07:00
bjoernQ
887798fd6f Reading raw ADC data for ESP32-C3 2022-07-07 18:39:11 +02:00
Jesse Braham
3d481901a5
Put the embedded-hal alpha trait implementations behind a feature (#88)
* Remove unused dependencies from HAL packages

* Put the `embedded-hal` alpha trait implementations behind a feature
2022-06-27 10:13:18 +01:00
Jesse Braham
8663153e12 Implement the embedded-hal alpha traits for the GPIO and I2C drivers 2022-06-14 17:28:03 +02:00
Juraj Sadel
b382a019d4
Feature/time types (#64)
* Use fugit time types for SPI peripheral, update examples

* initial WIP

* fix CI build errors

* Use extension trait in examples

Co-authored-by: Jesse Braham <jesse@beta7.io>
2022-05-31 11:39:44 +01:00
Robert Wiewel
a55c9d77ec Add RMT output channel support for all current ESP32 variants
- Add RMT output channel support for ESP32, ESP32-S2, ESP32-S3, ESP32-C3
- Add add RMT adapter for `smart-leds` crate
- Add example `hello_rgb` for ESP32-S2, ESP32-S3 and ESP32-C3 that either
  drives one LED at the pin where a LED is located on the official devkits
- Add example `hello_rgb` for ESP32 that is driving a 12-element RGB ring.
2022-05-17 15:56:25 +02:00
Jesse Braham
67bd5837cd Make cargo manifests consistent and bump dependencies 2022-05-05 11:56:43 +02:00
Björn Quentin
eb47b0fe21
Bump riscv version (#51)
* Bump riscv version

* Bump riscv version in esp-hal-common
2022-04-22 08:00:17 -07:00
Jesse Braham
fc37bc5d1f Modify esp32c3-hal to use a direct-boot feature instead of normalboot 2022-03-29 09:45:06 -07:00
Douman
9a3b0a530f Introduce optional ufmt support 2022-03-21 16:31:20 +09:00
bjoernQ
651d27430a Replace the precompiled asm.S with global-asm 2022-03-14 09:33:05 -07:00
Robert Wiewel
21b64f5c28 WIP: Prototype of shared I2C implementation
- Add example for I2C display example for ESP32-C3 and ESP32
- Example works for ESP32-C3, but not yet for ESP32
- Dependent on patched and forked `esp-pacs` version (referenced
  relatively for now, please check out and place accordingly)
2022-03-01 14:16:57 +01:00
bjoernQ
83f961431c Support atomic emulation for ESP32C3 if needed 2022-02-24 15:40:41 +00:00
bjoernQ
e7ad8ce7a1 Depend on the published riscv-rt 2022-02-24 15:40:41 +00:00
bjoernQ
cac30b7544 Add basic interrupt support for ESP32C3 and ESP32 2022-01-31 16:34:45 +00:00
Björn Quentin
70109ffe36
Initial implementation of ram proc macro (#6)
* Add .iram section for ESP32C3, make it possible to use direct-boot or normal-boot

* Add ram proc-macro
2022-01-18 10:02:40 -08:00
Jesse Braham
34ca298698 Update each package's Cargo manifest 2022-01-06 08:19:28 -08:00
Björn Quentin
6d94b61268
Shared GPIO Implementation (#3)
* make esp32c3 examples run from flash / flashable
* use gpio3 for blinky
* direct boot in Cargo.toml
* have a shared gpio impl
* use PACs from their original locations again
2022-01-06 07:57:55 -08:00
Jesse Braham
4e9ad72839 Assorted updates to make most things build properly... still some errors 2021-11-23 20:12:34 -08:00
Jesse Braham
2b27d10aa4 Convert to workspace, shortened chip selection feature names 2021-10-29 10:24:24 -07:00
Jesse Braham
dfab5d6c1b Add the esp-hal-common crate and make ESP32/ESP32-C3 use its Timer 2021-10-21 17:28:11 -07:00
Jesse Braham
64d9430d84 Add a minimal HAL crate for the ESP32-C3 with a serial example 2021-10-21 14:44:04 -07:00