- Rename timg feature to timg0 to better refect which TG is being used
- Use the time_driver::TimerType in the signature of init to fix#268
- Update examples
- Fix CI features
- Add timg0 cfg to build.rs
* Add untested basic SHA for esp-sX/cX chips
* Fix ptr type inconsistency for S2
* Add ESP32 impl & fix process_buffer latch issue
* Add debug example for SHA accelerator
* Clean up no-op buffer prints
* Test vector parity (on esp32s3)
* Checkpoint for converting to alignment helper
* Finish refactoring & additional parity tests on esp32s3
* Remove core_intrinsics requirement for now
* Fix case where (src.len() % 4) == 3
* Finish sha2 example with performance comparison (12-61x speedup)
* Refactor ESP32 to alignment helper & Clean up example
* Prevent out-of-bounds reads in ESP32 version
* Revert Cargo debug changes
* Remove cargo config.toml
* Clean up example
* Remove common/rust-toolchain & ignore in future
* Might as well use actual size_of const
* Remove SHA512/SHA384 for C2/C3
* Directly import nb::block! to remove unused import warning & fix c2 feature detect
* Remove stray newlines
* Fix esp32c2 having SHA256
* ESP32 also has SHA384
* Remove comments that don't have a purpose
* Clean up example & finish() handling
* Add examples & add ESP32 free()
* Update C2/C3 examples to show accurate algorithm used
* Fix busy check for ESP32
* Remove outdated TODO comment
* Update PAC for ESP3 and (actually) fix busy check
* Refactor ESP32 version to reduce search space
* Add debug printlns to sha example & clean up comments
* Fix ESP32 version, finally
Co-authored-by: ferris <ferris@devdroplets.com>
Co-authored-by: Jesse Braham <jesse@beta7.io>
* wip: timg embassy driver
- read_raw on timg renamed to now()
- timg initialized and stored in static for use in the embassy driver
- timg sets alarm value
- untested whether alarms actually trigger
* TIMG timer driver for esp32, esp32s3
- Adds the timg timer block as a time driver for embassy
- Not enabled on the C3 as it only has one timer block, better to use
systimer
- s2 example added but can't build due to atomic requirements in
futures-core
* Add S2 atomic support with emulation, fixup embassy support for the S2
* Move executor & static-cell to dev deps. Make eha optional
* Add c2 support, run fmt
* Update to crates.io embassy releases
* Update eha
* update timg time driver to new trait
* Remove exception feature of esp-backtrace and use the user handler for backtracing
* Add async testing workflow
* Update systick example
* Fix S2 examples
* Update xtensa-toolchain
* set rustflags for s2 target
* Disable systick for esp32s2 until we can fix the noted issues
* review improvements
- Fix intr prio array being off by one
- emabssy time prio interrupt set to max prio
- use cfg instead of feature for systick detection
* Update example time delays
Add a feature for the ESP32-C2 to`esp-hal-common` and update some `cfg`s
Organize the `esp-hal-common` imports and exports and update to include the ESP32-C2
