5 Commits

Author	SHA1	Message	Date
Jesse Braham	0064766ef2	No longer publicly expose the PeripheralClockControl struct (#817) ... * No longer publicly expose the `PeripheralClockControl` struct * Update examples as needed to get things building again * Update CHANGELOG.md * Address review feedback, fix a warning * Use a critical section for all devices other than the ESP32-C6/H2, as they modify multiple registers * Rebase and update `etm` driver to fix build errors	2023-09-26 09:07:57 -07:00
Scott Mabin	eeb2d1db6f	Fix UART to handle CPU/APB clock changes (#808) ... * Ensure that uart is configured to account for clock changes, not just boot defaults * fix examples * changelog --------- Co-authored-by: Jesse Braham <jessebraham@users.noreply.github.com>	2023-09-21 09:06:56 -07:00
Jesse Braham	d12a3dbac5	Update all examples to remove unnecessary disabling of watchdogs (#768) ... * Update `esp32-hal` examples * Update `esp32c2-hal` examples * Update `esp32c3-hal` examples * Update `esp32c6-hal` examples * Update `esp32h2-hal` examples * Update `esp32s2-hal` examples * Update `esp32s3-hal` examples * Fix the `ram.rs` examples	2023-08-31 07:17:12 -07:00
Alex Johnson	debe2b8004	fixed async read w/o at_cmd (#652) ... * fixed async read w/o at_cmd * configurtion checks for async `read` * remove fifo thrhd check	2023-07-25 12:19:59 +01:00
Jesse Braham	748512f849	Add interrupt-related examples for the ESP32-H2 (#557) ... * Add interrupt-related examples for the ESP32-H2 * Update CI workflow to actually check `interrupt_preemption` examples	2023-05-25 09:22:26 -07:00