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Merge pull request #244 from bjoernQ/fix-esp32c2-apbclock

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ESP32-C2 APB clock is 40MHz, not 80MHz
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Björn Quentin 2022-11-02 13:59:26 +01:00 committed by GitHub
commit fae2f1add3
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1 changed files with 4 additions and 2 deletions
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6
esp-hal-common/src/clock.rs
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@ -88,6 +88,7 @@ pub(crate) enum PllClock {
#[allow(unused)]
#[derive(Debug, Clone, Copy)]
pub(crate) enum ApbClock {
ApbFreq40MHz,
ApbFreq80MHz,
ApbFreqOther(u32),
}
@ -95,6 +96,7 @@ pub(crate) enum ApbClock {
impl Clock for ApbClock {
fn frequency(&self) -> HertzU32 {
match self {
ApbClock::ApbFreq40MHz => HertzU32::MHz(40),
ApbClock::ApbFreq80MHz => HertzU32::MHz(80),
ApbClock::ApbFreqOther(mhz) => HertzU32::MHz(*mhz),
}
@ -212,7 +214,7 @@ impl ClockControl {
_private: (),
desired_rates: RawClocks {
cpu_clock: HertzU32::MHz(80),
apb_clock: HertzU32::MHz(80),
apb_clock: HertzU32::MHz(40),
xtal_clock: HertzU32::MHz(40),
i2c_clock: HertzU32::MHz(40),
},
@ -231,7 +233,7 @@ impl ClockControl {
clocks_ll::esp32c2_rtc_update_to_xtal(xtal_freq, 1);
clocks_ll::esp32c2_rtc_apb_freq_update(apb_freq);
} else {
apb_freq = ApbClock::ApbFreq80MHz;
apb_freq = ApbClock::ApbFreq40MHz;
clocks_ll::esp32c2_rtc_bbpll_enable();
clocks_ll::esp32c2_rtc_bbpll_configure(xtal_freq, pll_freq);
clocks_ll::esp32c2_rtc_freq_to_pll_mhz(cpu_clock_speed);