diff --git a/esp-hal-common/src/lib.rs b/esp-hal-common/src/lib.rs
index 45881966a..20a666ffe 100644
--- a/esp-hal-common/src/lib.rs
+++ b/esp-hal-common/src/lib.rs
@@ -35,6 +35,8 @@ pub mod gpio;
 #[cfg_attr(feature = "esp32c3", path = "interrupt/riscv.rs")]
 pub mod interrupt;
 pub mod prelude;
+#[cfg(not(feature = "esp32c3"))]
+pub mod rtc_cntl;
 pub mod serial;
 pub mod timer;
 
@@ -43,6 +45,8 @@ pub use gpio::*;
 pub use interrupt::*;
 use procmacros;
 pub use procmacros::ram;
+#[cfg(not(feature = "esp32c3"))]
+pub use rtc_cntl::RtcCntl;
 pub use serial::Serial;
 pub use timer::Timer;
 
diff --git a/esp-hal-common/src/rtc_cntl.rs b/esp-hal-common/src/rtc_cntl.rs
new file mode 100644
index 000000000..f0781f442
--- /dev/null
+++ b/esp-hal-common/src/rtc_cntl.rs
@@ -0,0 +1,29 @@
+use crate::pac::RTC_CNTL;
+
+pub struct RtcCntl {
+    rtc_cntl: RTC_CNTL,
+}
+
+impl RtcCntl {
+    pub fn new(rtc_cntl: RTC_CNTL) -> Self {
+        Self { rtc_cntl }
+    }
+
+    /// Enable/disable write protection for WDT registers
+    fn set_wdt_write_protection(&mut self, enable: bool) {
+        let wkey = if enable { 0u32 } else { 0x50D8_3AA1 };
+
+        self.rtc_cntl.wdtwprotect.write(|w| unsafe { w.bits(wkey) });
+    }
+
+    /// Global switch for RTC_CNTL watchdog functionality
+    pub fn set_wdt_global_enable(&mut self, enable: bool) {
+        self.set_wdt_write_protection(false);
+
+        self.rtc_cntl
+            .wdtconfig0
+            .modify(|_, w| w.wdt_en().bit(enable).wdt_flashboot_mod_en().clear_bit());
+
+        self.set_wdt_write_protection(true);
+    }
+}
diff --git a/esp32-hal/examples/blinky.rs b/esp32-hal/examples/blinky.rs
index fd75b6e01..6bfcb2d0d 100644
--- a/esp32-hal/examples/blinky.rs
+++ b/esp32-hal/examples/blinky.rs
@@ -1,7 +1,7 @@
 #![no_std]
 #![no_main]
 
-use esp32_hal::{gpio::IO, pac::Peripherals, prelude::*, Delay, Timer};
+use esp32_hal::{gpio::IO, pac::Peripherals, prelude::*, Delay, RtcCntl, Timer};
 use panic_halt as _;
 use xtensa_lx_rt::entry;
 
@@ -9,10 +9,12 @@ use xtensa_lx_rt::entry;
 fn main() -> ! {
     let peripherals = Peripherals::take().unwrap();
 
-    // Disable the TIMG watchdog timer.
     let mut timer0 = Timer::new(peripherals.TIMG0);
+    let mut rtc_cntl = RtcCntl::new(peripherals.RTC_CNTL);
 
+    // Disable MWDT and RWDT (Watchdog) flash boot protection
     timer0.disable();
+    rtc_cntl.set_wdt_global_enable(false);
 
     // Set GPIO15 as an output, and set its state high initially.
     let io = IO::new(peripherals.GPIO, peripherals.IO_MUX);
diff --git a/esp32-hal/examples/gpio_interrupt.rs b/esp32-hal/examples/gpio_interrupt.rs
index 01edc2d1b..520c1bff9 100644
--- a/esp32-hal/examples/gpio_interrupt.rs
+++ b/esp32-hal/examples/gpio_interrupt.rs
@@ -8,6 +8,7 @@ use esp32_hal::{
     pac::{self, Peripherals, UART0},
     prelude::*,
     Delay,
+    RtcCntl,
     Serial,
     Timer,
 };
@@ -34,8 +35,11 @@ fn main() -> ! {
     // Disable the TIMG watchdog timer.
     let mut timer0 = Timer::new(peripherals.TIMG0);
     let serial0 = Serial::new(peripherals.UART0).unwrap();
+    let mut rtc_cntl = RtcCntl::new(peripherals.RTC_CNTL);
 
+    // Disable MWDT and RWDT (Watchdog) flash boot protection
     timer0.disable();
+    rtc_cntl.set_wdt_global_enable(false);
 
     // Set GPIO15 as an output, and set its state high initially.
     let io = IO::new(peripherals.GPIO, peripherals.IO_MUX);
diff --git a/esp32-hal/examples/hello_world.rs b/esp32-hal/examples/hello_world.rs
index 3171bf247..def2f3b69 100644
--- a/esp32-hal/examples/hello_world.rs
+++ b/esp32-hal/examples/hello_world.rs
@@ -3,7 +3,7 @@
 
 use core::fmt::Write;
 
-use esp32_hal::{pac::Peripherals, prelude::*, Serial, Timer};
+use esp32_hal::{pac::Peripherals, prelude::*, RtcCntl, Serial, Timer};
 use nb::block;
 use panic_halt as _;
 use xtensa_lx_rt::entry;
@@ -14,9 +14,11 @@ fn main() -> ! {
 
     let mut timer0 = Timer::new(peripherals.TIMG0);
     let mut serial0 = Serial::new(peripherals.UART0).unwrap();
+    let mut rtc_cntl = RtcCntl::new(peripherals.RTC_CNTL);
 
-    // Disable watchdog timer
+    // Disable MWDT and RWDT (Watchdog) flash boot protection
     timer0.disable();
+    rtc_cntl.set_wdt_global_enable(false);
 
     timer0.start(10_000_000u64);
 
diff --git a/esp32-hal/examples/ram.rs b/esp32-hal/examples/ram.rs
index c21eef05f..950b571a4 100644
--- a/esp32-hal/examples/ram.rs
+++ b/esp32-hal/examples/ram.rs
@@ -7,6 +7,7 @@ use esp32_hal::{
     pac::{Peripherals, UART0},
     prelude::*,
     ram,
+    RtcCntl,
     Serial,
     Timer,
 };
@@ -29,9 +30,11 @@ fn main() -> ! {
 
     let mut timer0 = Timer::new(peripherals.TIMG0);
     let mut serial0 = Serial::new(peripherals.UART0).unwrap();
+    let mut rtc_cntl = RtcCntl::new(peripherals.RTC_CNTL);
 
-    // Disable watchdog timer
+    // Disable MWDT and RWDT (Watchdog) flash boot protection
     timer0.disable();
+    rtc_cntl.set_wdt_global_enable(false);
 
     timer0.start(10_000_000u64);
 
diff --git a/esp32-hal/src/lib.rs b/esp32-hal/src/lib.rs
index 80d72f818..578206518 100644
--- a/esp32-hal/src/lib.rs
+++ b/esp32-hal/src/lib.rs
@@ -1,7 +1,7 @@
 #![no_std]
 
 pub use embedded_hal as ehal;
-pub use esp_hal_common::{pac, prelude, Delay, Serial, Timer};
+pub use esp_hal_common::{pac, prelude, Delay, RtcCntl, Serial, Timer};
 
 pub use self::gpio::IO;
 
diff --git a/esp32s2-hal/examples/blinky.rs b/esp32s2-hal/examples/blinky.rs
index 06f8415d7..69fee7ee0 100644
--- a/esp32s2-hal/examples/blinky.rs
+++ b/esp32s2-hal/examples/blinky.rs
@@ -1,7 +1,7 @@
 #![no_std]
 #![no_main]
 
-use esp32s2_hal::{gpio::IO, pac::Peripherals, prelude::*, Delay, Timer};
+use esp32s2_hal::{gpio::IO, pac::Peripherals, prelude::*, Delay, RtcCntl, Timer};
 use panic_halt as _;
 use xtensa_lx_rt::entry;
 
@@ -9,10 +9,12 @@ use xtensa_lx_rt::entry;
 fn main() -> ! {
     let peripherals = Peripherals::take().unwrap();
 
-    // Disable the TIMG watchdog timer.
     let mut timer0 = Timer::new(peripherals.TIMG0);
+    let mut rtc_cntl = RtcCntl::new(peripherals.RTC_CNTL);
 
+    // Disable MWDT and RWDT (Watchdog) flash boot protection
     timer0.disable();
+    rtc_cntl.set_wdt_global_enable(false);
 
     // Set GPIO4 as an output, and set its state high initially.
     let io = IO::new(peripherals.GPIO, peripherals.IO_MUX);
diff --git a/esp32s2-hal/examples/gpio_interrupt.rs b/esp32s2-hal/examples/gpio_interrupt.rs
index ec15fab2e..3346c212b 100644
--- a/esp32s2-hal/examples/gpio_interrupt.rs
+++ b/esp32s2-hal/examples/gpio_interrupt.rs
@@ -8,6 +8,7 @@ use esp32s2_hal::{
     pac::{self, Peripherals, UART0},
     prelude::*,
     Delay,
+    RtcCntl,
     Serial,
     Timer,
 };
@@ -31,11 +32,13 @@ static mut BUTTON: CriticalSectionMutex<RefCell<Option<Gpio0<Input<PullDown>>>>>
 fn main() -> ! {
     let peripherals = Peripherals::take().unwrap();
 
-    // Disable the TIMG watchdog timer.
     let mut timer0 = Timer::new(peripherals.TIMG0);
+    let mut rtc_cntl = RtcCntl::new(peripherals.RTC_CNTL);
     let serial0 = Serial::new(peripherals.UART0).unwrap();
 
+    // Disable MWDT and RWDT (Watchdog) flash boot protection
     timer0.disable();
+    rtc_cntl.set_wdt_global_enable(false);
 
     // Set GPIO4 as an output, and set its state high initially.
     let io = IO::new(peripherals.GPIO, peripherals.IO_MUX);
diff --git a/esp32s2-hal/examples/hello_world.rs b/esp32s2-hal/examples/hello_world.rs
index 2b8882cc4..520a65cb1 100644
--- a/esp32s2-hal/examples/hello_world.rs
+++ b/esp32s2-hal/examples/hello_world.rs
@@ -3,7 +3,7 @@
 
 use core::fmt::Write;
 
-use esp32s2_hal::{pac::Peripherals, prelude::*, Serial, Timer};
+use esp32s2_hal::{pac::Peripherals, prelude::*, RtcCntl, Serial, Timer};
 use nb::block;
 use panic_halt as _;
 use xtensa_lx_rt::entry;
@@ -13,10 +13,12 @@ fn main() -> ! {
     let peripherals = Peripherals::take().unwrap();
 
     let mut timer0 = Timer::new(peripherals.TIMG0);
+    let mut rtc_cntl = RtcCntl::new(peripherals.RTC_CNTL);
     let mut serial0 = Serial::new(peripherals.UART0).unwrap();
 
-    // Disable watchdog timer
+    // Disable MWDT and RWDT (Watchdog) flash boot protection
     timer0.disable();
+    rtc_cntl.set_wdt_global_enable(false);
 
     timer0.start(40_000_000u64);
 
diff --git a/esp32s2-hal/examples/ram.rs b/esp32s2-hal/examples/ram.rs
index 782ddfea1..3d1abd416 100644
--- a/esp32s2-hal/examples/ram.rs
+++ b/esp32s2-hal/examples/ram.rs
@@ -7,6 +7,7 @@ use esp32s2_hal::{
     pac::{Peripherals, UART0},
     prelude::*,
     ram,
+    RtcCntl,
     Serial,
     Timer,
 };
@@ -28,10 +29,12 @@ fn main() -> ! {
     let peripherals = Peripherals::take().unwrap();
 
     let mut timer0 = Timer::new(peripherals.TIMG0);
+    let mut rtc_cntl = RtcCntl::new(peripherals.RTC_CNTL);
     let mut serial0 = Serial::new(peripherals.UART0).unwrap();
 
-    // Disable watchdog timer
+    // Disable MWDT and RWDT (Watchdog) flash boot protection
     timer0.disable();
+    rtc_cntl.set_wdt_global_enable(false);
 
     timer0.start(10_000_000u64);
 
diff --git a/esp32s2-hal/src/lib.rs b/esp32s2-hal/src/lib.rs
index e1340c2b4..6a363cc49 100644
--- a/esp32s2-hal/src/lib.rs
+++ b/esp32s2-hal/src/lib.rs
@@ -1,7 +1,7 @@
 #![no_std]
 
 pub use embedded_hal as ehal;
-pub use esp_hal_common::{pac, prelude, ram, Delay, Serial, Timer};
+pub use esp_hal_common::{pac, prelude, ram, Delay, RtcCntl, Serial, Timer};
 
 pub use self::gpio::IO;
 
diff --git a/esp32s3-hal/examples/blinky.rs b/esp32s3-hal/examples/blinky.rs
index 6b3b3b4e8..5692d3dd9 100644
--- a/esp32s3-hal/examples/blinky.rs
+++ b/esp32s3-hal/examples/blinky.rs
@@ -1,7 +1,7 @@
 #![no_std]
 #![no_main]
 
-use esp32s3_hal::{gpio::IO, pac::Peripherals, prelude::*, Delay, Timer};
+use esp32s3_hal::{gpio::IO, pac::Peripherals, prelude::*, Delay, RtcCntl, Timer};
 use panic_halt as _;
 use xtensa_lx_rt::entry;
 
@@ -9,10 +9,12 @@ use xtensa_lx_rt::entry;
 fn main() -> ! {
     let peripherals = Peripherals::take().unwrap();
 
-    // Disable the TIMG watchdog timer.
     let mut timer0 = Timer::new(peripherals.TIMG0);
+    let mut rtc_cntl = RtcCntl::new(peripherals.RTC_CNTL);
 
+    // Disable MWDT and RWDT (Watchdog) flash boot protection
     timer0.disable();
+    rtc_cntl.set_wdt_global_enable(false);
 
     // Set GPIO4 as an output, and set its state high initially.
     let io = IO::new(peripherals.GPIO, peripherals.IO_MUX);
diff --git a/esp32s3-hal/examples/gpio_interrupt.rs b/esp32s3-hal/examples/gpio_interrupt.rs
index 31775f26c..b46e4c852 100644
--- a/esp32s3-hal/examples/gpio_interrupt.rs
+++ b/esp32s3-hal/examples/gpio_interrupt.rs
@@ -8,6 +8,7 @@ use esp32s3_hal::{
     pac::{self, Peripherals, UART0},
     prelude::*,
     Delay,
+    RtcCntl,
     Serial,
     Timer,
 };
@@ -31,11 +32,13 @@ static mut BUTTON: SpinLockMutex<RefCell<Option<Gpio0<Input<PullDown>>>>> =
 fn main() -> ! {
     let peripherals = Peripherals::take().unwrap();
 
-    // Disable the TIMG watchdog timer.
     let mut timer0 = Timer::new(peripherals.TIMG0);
+    let mut rtc_cntl = RtcCntl::new(peripherals.RTC_CNTL);
     let serial0 = Serial::new(peripherals.UART0).unwrap();
 
+    // Disable MWDT and RWDT (Watchdog) flash boot protection
     timer0.disable();
+    rtc_cntl.set_wdt_global_enable(false);
 
     // Set GPIO4 as an output, and set its state high initially.
     let io = IO::new(peripherals.GPIO, peripherals.IO_MUX);
diff --git a/esp32s3-hal/examples/hello_world.rs b/esp32s3-hal/examples/hello_world.rs
index d3c1d9054..ce17d3cd8 100644
--- a/esp32s3-hal/examples/hello_world.rs
+++ b/esp32s3-hal/examples/hello_world.rs
@@ -3,7 +3,7 @@
 
 use core::fmt::Write;
 
-use esp32s3_hal::{pac::Peripherals, prelude::*, Serial, Timer};
+use esp32s3_hal::{pac::Peripherals, prelude::*, RtcCntl, Serial, Timer};
 use nb::block;
 use panic_halt as _;
 use xtensa_lx_rt::entry;
@@ -13,10 +13,12 @@ fn main() -> ! {
     let peripherals = Peripherals::take().unwrap();
 
     let mut timer0 = Timer::new(peripherals.TIMG0);
+    let mut rtc_cntl = RtcCntl::new(peripherals.RTC_CNTL);
     let mut serial0 = Serial::new(peripherals.UART0).unwrap();
 
-    // Disable watchdog timer
+    // Disable MWDT and RWDT (Watchdog) flash boot protection
     timer0.disable();
+    rtc_cntl.set_wdt_global_enable(false);
 
     timer0.start(40_000_000u64);
 
diff --git a/esp32s3-hal/examples/ram.rs b/esp32s3-hal/examples/ram.rs
index 0376355f2..6eaa52075 100644
--- a/esp32s3-hal/examples/ram.rs
+++ b/esp32s3-hal/examples/ram.rs
@@ -7,6 +7,7 @@ use esp32s3_hal::{
     pac::{Peripherals, UART0},
     prelude::*,
     ram,
+    RtcCntl,
     Serial,
     Timer,
 };
@@ -28,10 +29,12 @@ fn main() -> ! {
     let peripherals = Peripherals::take().unwrap();
 
     let mut timer0 = Timer::new(peripherals.TIMG0);
+    let mut rtc_cntl = RtcCntl::new(peripherals.RTC_CNTL);
     let mut serial0 = Serial::new(peripherals.UART0).unwrap();
 
-    // Disable watchdog timer
+    // Disable MWDT and RWDT (Watchdog) flash boot protection
     timer0.disable();
+    rtc_cntl.set_wdt_global_enable(false);
 
     timer0.start(10_000_000u64);
 
diff --git a/esp32s3-hal/src/lib.rs b/esp32s3-hal/src/lib.rs
index e4ce63845..03f9d360e 100644
--- a/esp32s3-hal/src/lib.rs
+++ b/esp32s3-hal/src/lib.rs
@@ -1,7 +1,7 @@
 #![no_std]
 
 pub use embedded_hal as ehal;
-pub use esp_hal_common::{pac, prelude, ram, Delay, Serial, Timer};
+pub use esp_hal_common::{pac, prelude, ram, Delay, RtcCntl, Serial, Timer};
 
 pub use self::gpio::IO;