Simplify traits and erratum 36 workaround, add Pins::steal (#2335)
* Simplify erratum 36 * Add Pins::steal * Fix typo * Move pin operations into Flex * Cleanup braces * Avoid panicking when handling erratum * Add disable_usb_pad to other devices * Touch up changelog * Fix changelog
This commit is contained in:
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@ -11,8 +11,9 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
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- A new config option `PLACE_SWITCH_TABLES_IN_RAM` to improve performance (especially for interrupts) at the cost of slightly more RAM usage (#2331)
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- A new config option `PLACE_SWITCH_TABLES_IN_RAM` to improve performance (especially for interrupts) at the cost of slightly more RAM usage (#2331)
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- A new config option `PLACE_ANON_IN_RAM` to improve performance (especially for interrupts) at the cost of RAM usage (#2331)
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- A new config option `PLACE_ANON_IN_RAM` to improve performance (especially for interrupts) at the cost of RAM usage (#2331)
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- Add burst transfer support to DMA buffers (#2236)
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- Add burst transfer support to DMA buffers (#2336)
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- `AnyPin` now implements `From<GpioPin<N>>`. (#2326)
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- `AnyPin` now implements `From<GpioPin<N>>`. (#2326)
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- `Pins::steal()` to unsafely obtain GPIO. (#2335)
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### Changed
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### Changed
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@ -448,75 +448,7 @@ pub trait PeripheralOutput: PeripheralSignal {
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}
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}
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/// Trait implemented by pins which can be used as inputs.
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/// Trait implemented by pins which can be used as inputs.
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pub trait InputPin: Pin + PeripheralInput + Into<AnyPin> + 'static {
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pub trait InputPin: Pin + PeripheralInput + Into<AnyPin> + 'static {}
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/// Listen for interrupts
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#[doc(hidden)]
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fn listen(&mut self, event: Event, _: private::Internal) {
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self.listen_with_options(event, true, false, false, private::Internal)
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}
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/// Checks if listening for interrupts is enabled for this Pin
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#[doc(hidden)]
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fn is_listening(&self, _: private::Internal) -> bool {
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is_listening(self.number())
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}
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/// Listen for interrupts
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#[doc(hidden)]
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fn listen_with_options(
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&mut self,
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event: Event,
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int_enable: bool,
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nmi_enable: bool,
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wake_up_from_light_sleep: bool,
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_: private::Internal,
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) {
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if wake_up_from_light_sleep {
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match event {
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Event::AnyEdge | Event::RisingEdge | Event::FallingEdge => {
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panic!("Edge triggering is not supported for wake-up from light sleep");
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}
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_ => {}
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}
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}
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set_int_enable(
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self.number(),
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gpio_intr_enable(int_enable, nmi_enable),
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event as u8,
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wake_up_from_light_sleep,
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)
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}
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/// Stop listening for interrupts
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#[doc(hidden)]
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fn unlisten(&mut self, _: private::Internal) {
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unsafe {
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(*GPIO::PTR)
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.pin(self.number() as usize)
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.modify(|_, w| w.int_ena().bits(0).int_type().bits(0).int_ena().bits(0));
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}
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}
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/// Checks if the interrupt status bit for this Pin is set
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#[doc(hidden)]
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fn is_interrupt_set(&self, _: private::Internal) -> bool {
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self.gpio_bank(private::Internal).read_interrupt_status() & 1 << (self.number() % 32) != 0
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}
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/// Clear the interrupt status bit for this Pin
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#[doc(hidden)]
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fn clear_interrupt(&mut self, _: private::Internal) {
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self.gpio_bank(private::Internal)
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.write_interrupt_status_clear(1 << (self.number() % 32));
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}
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/// Enable this pin as a wake up source
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#[doc(hidden)]
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fn wakeup_enable(&mut self, enable: bool, event: WakeEvent, _: private::Internal) {
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self.listen_with_options(event.into(), false, false, enable, private::Internal);
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}
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}
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/// Trait implemented by pins which can be used as outputs.
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/// Trait implemented by pins which can be used as outputs.
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pub trait OutputPin: Pin + PeripheralOutput + Into<AnyPin> + 'static {}
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pub trait OutputPin: Pin + PeripheralOutput + Into<AnyPin> + 'static {}
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@ -722,17 +654,13 @@ impl<const GPIONUM: u8> GpioPin<GPIONUM>
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where
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where
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Self: Pin,
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Self: Pin,
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{
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{
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pub(crate) fn new() -> Self {
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Self
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}
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/// Create a pin out of thin air.
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/// Create a pin out of thin air.
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///
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///
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/// # Safety
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/// # Safety
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///
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///
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/// Ensure that only one instance of a pin exists at one time.
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/// Ensure that only one instance of a pin exists at one time.
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pub unsafe fn steal() -> Self {
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pub unsafe fn steal() -> Self {
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Self::new()
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Self
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}
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}
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/// Returns a peripheral [input][interconnect::InputSignal] connected to
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/// Returns a peripheral [input][interconnect::InputSignal] connected to
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@ -747,13 +675,19 @@ where
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/// Workaround to make D+ and D- work on the ESP32-C3 and ESP32-S3, which by
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/// Workaround to make D+ and D- work on the ESP32-C3 and ESP32-S3, which by
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/// default are assigned to the `USB_SERIAL_JTAG` peripheral.
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/// default are assigned to the `USB_SERIAL_JTAG` peripheral.
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#[cfg(any(esp32c3, esp32s3))]
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#[cfg(usb_device)]
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fn disable_usb_pads(gpionum: u8) {
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fn disable_usb_pads(gpionum: u8) {
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cfg_if::cfg_if! {
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cfg_if::cfg_if! {
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if #[cfg(esp32c3)] {
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if #[cfg(esp32c3)] {
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let pins = [18, 19];
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let pins = [18, 19];
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} else if #[cfg(esp32c6)] {
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let pins = [12, 13];
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} else if #[cfg(esp32h2)] {
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let pins = [26, 27];
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} else if #[cfg(esp32s3)] {
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} else if #[cfg(esp32s3)] {
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let pins = [19, 20];
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let pins = [19, 20];
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} else {
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compile_error!("Please define USB pins for this chip");
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}
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}
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}
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}
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@ -792,7 +726,7 @@ where
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let pull_down = pull == Pull::Down;
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let pull_down = pull == Pull::Down;
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#[cfg(esp32)]
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#[cfg(esp32)]
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crate::soc::gpio::errata36(GPIONUM, Some(pull_up), Some(pull_down));
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crate::soc::gpio::errata36(self.degrade_pin(private::Internal), pull_up, pull_down);
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get_io_mux_reg(GPIONUM).modify(|_, w| {
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get_io_mux_reg(GPIONUM).modify(|_, w| {
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w.fun_wpd().bit(pull_down);
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w.fun_wpd().bit(pull_down);
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@ -808,7 +742,7 @@ where
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fn init_input(&self, pull: Pull, _: private::Internal) {
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fn init_input(&self, pull: Pull, _: private::Internal) {
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self.pull_direction(pull, private::Internal);
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self.pull_direction(pull, private::Internal);
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#[cfg(any(esp32c3, esp32s3))]
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#[cfg(usb_device)]
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disable_usb_pads(GPIONUM);
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disable_usb_pads(GPIONUM);
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get_io_mux_reg(GPIONUM).modify(|_, w| unsafe {
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get_io_mux_reg(GPIONUM).modify(|_, w| unsafe {
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@ -982,10 +916,10 @@ impl Io {
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/// *Note:* You probably don't want to use this, it is intended to be used
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/// *Note:* You probably don't want to use this, it is intended to be used
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/// in very specific use cases. Async GPIO functionality will not work
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/// in very specific use cases. Async GPIO functionality will not work
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/// when instantiating `Io` using this constructor.
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/// when instantiating `Io` using this constructor.
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pub fn new_no_bind_interrupt(gpio: GPIO, _io_mux: IO_MUX) -> Self {
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pub fn new_no_bind_interrupt(_gpio: GPIO, _io_mux: IO_MUX) -> Self {
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Io {
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Io {
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_io_mux,
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_io_mux,
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pins: gpio.pins(),
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pins: unsafe { Pins::steal() },
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}
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}
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}
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}
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}
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}
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@ -1080,11 +1014,16 @@ macro_rules! gpio {
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)+
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)+
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}
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}
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impl GPIO {
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impl Pins {
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pub(crate) fn pins(self) -> Pins {
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/// Unsafely create GPIO pins.
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Pins {
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///
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/// # Safety
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///
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/// The caller must ensure that only one instance of a pin is in use at one time.
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pub unsafe fn steal() -> Self {
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Self {
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$(
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$(
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[< gpio $gpionum >]: GpioPin::new(),
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[< gpio $gpionum >]: GpioPin::steal(),
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)+
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)+
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}
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}
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}
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}
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@ -1255,7 +1194,7 @@ macro_rules! rtc_pins {
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let rtcio = unsafe { &*$crate::peripherals::RTC_IO::PTR };
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let rtcio = unsafe { &*$crate::peripherals::RTC_IO::PTR };
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paste::paste! {
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paste::paste! {
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rtcio.$pin_reg.modify(|_, w| w.[< $prefix rue >]().bit([< enable >]));
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rtcio.$pin_reg.modify(|_, w| w.[< $prefix rue >]().bit(enable));
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}
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}
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}
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}
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@ -1263,7 +1202,7 @@ macro_rules! rtc_pins {
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let rtcio = unsafe { &*$crate::peripherals::RTC_IO::PTR };
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let rtcio = unsafe { &*$crate::peripherals::RTC_IO::PTR };
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paste::paste! {
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paste::paste! {
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rtcio.$pin_reg.modify(|_, w| w.[< $prefix rde >]().bit([< enable >]));
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rtcio.$pin_reg.modify(|_, w| w.[< $prefix rde >]().bit(enable));
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}
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}
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}
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}
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}
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}
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@ -1277,6 +1216,23 @@ macro_rules! rtc_pins {
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$crate::gpio::rtc_pins!($pin_num, $rtc_pin, $pin_reg, $prefix, $hold $(, $rue )?);
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$crate::gpio::rtc_pins!($pin_num, $rtc_pin, $pin_reg, $prefix, $hold $(, $rue )?);
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)+
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)+
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#[cfg(esp32)]
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pub(crate) fn errata36(mut pin: AnyPin, pull_up: bool, pull_down: bool) {
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use $crate::gpio::{Pin, RtcPinWithResistors};
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let has_pullups = match pin.number() {
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$(
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$( $pin_num => $rue, )?
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)+
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_ => false,
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};
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if has_pullups {
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pin.rtcio_pullup(pull_up);
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pin.rtcio_pulldown(pull_down);
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}
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}
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#[doc(hidden)]
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#[doc(hidden)]
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#[macro_export]
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#[macro_export]
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macro_rules! handle_rtcio {
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macro_rules! handle_rtcio {
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@ -1474,7 +1430,7 @@ macro_rules! analog {
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impl $crate::gpio::AnalogPin for GpioPin<$pin_num> {
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impl $crate::gpio::AnalogPin for GpioPin<$pin_num> {
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/// Configures the pin for analog mode.
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/// Configures the pin for analog mode.
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fn set_analog(&self, _: $crate::private::Internal) {
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fn set_analog(&self, _: $crate::private::Internal) {
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use $crate::peripherals::{GPIO};
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use $crate::peripherals::GPIO;
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get_io_mux_reg($pin_num).modify(|_,w| unsafe {
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get_io_mux_reg($pin_num).modify(|_,w| unsafe {
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w.mcu_sel().bits(1);
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w.mcu_sel().bits(1);
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@ -1986,27 +1942,57 @@ where
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self.pin.is_input_high(private::Internal).into()
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self.pin.is_input_high(private::Internal).into()
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}
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}
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fn listen_with_options(
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&self,
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event: Event,
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int_enable: bool,
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nmi_enable: bool,
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wake_up_from_light_sleep: bool,
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) {
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if wake_up_from_light_sleep {
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match event {
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Event::AnyEdge | Event::RisingEdge | Event::FallingEdge => {
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panic!("Edge triggering is not supported for wake-up from light sleep");
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}
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_ => {}
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}
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}
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set_int_enable(
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self.pin.number(),
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gpio_intr_enable(int_enable, nmi_enable),
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event as u8,
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wake_up_from_light_sleep,
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)
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}
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/// Listen for interrupts
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/// Listen for interrupts
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#[inline]
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#[inline]
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pub fn listen(&mut self, event: Event) {
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pub fn listen(&mut self, event: Event) {
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self.pin.listen(event, private::Internal);
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self.listen_with_options(event, true, false, false)
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}
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}
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/// Stop listening for interrupts
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/// Stop listening for interrupts
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pub fn unlisten(&mut self) {
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pub fn unlisten(&mut self) {
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self.pin.unlisten(private::Internal);
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set_int_enable(self.pin.number(), 0, 0, false);
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}
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}
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/// Clear the interrupt status bit for this Pin
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/// Clear the interrupt status bit for this Pin
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#[inline]
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#[inline]
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pub fn clear_interrupt(&mut self) {
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pub fn clear_interrupt(&mut self) {
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self.pin.clear_interrupt(private::Internal);
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self.pin
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.gpio_bank(private::Internal)
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.write_interrupt_status_clear(1 << (self.pin.number() % 32));
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}
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}
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/// Checks if the interrupt status bit for this Pin is set
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/// Checks if the interrupt status bit for this Pin is set
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#[inline]
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#[inline]
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pub fn is_interrupt_set(&self) -> bool {
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pub fn is_interrupt_set(&self) -> bool {
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self.pin.is_interrupt_set(private::Internal)
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self.pin
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.gpio_bank(private::Internal)
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.read_interrupt_status()
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& 1 << (self.pin.number() % 32)
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!= 0
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}
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}
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/// Enable as a wake-up source.
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/// Enable as a wake-up source.
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@ -2014,7 +2000,7 @@ where
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/// This will unlisten for interrupts
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/// This will unlisten for interrupts
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#[inline]
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#[inline]
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pub fn wakeup_enable(&mut self, enable: bool, event: WakeEvent) {
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pub fn wakeup_enable(&mut self, enable: bool, event: WakeEvent) {
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self.pin.wakeup_enable(enable, event, private::Internal);
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self.listen_with_options(event.into(), false, false, enable);
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}
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}
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|
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/// Returns a peripheral [input][interconnect::InputSignal] connected to
|
/// Returns a peripheral [input][interconnect::InputSignal] connected to
|
||||||
@ -2230,51 +2216,7 @@ pub(crate) mod internal {
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}
|
}
|
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}
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}
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|
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impl InputPin for AnyPin {
|
impl InputPin for AnyPin {}
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fn listen_with_options(
|
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&mut self,
|
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event: Event,
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|
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int_enable: bool,
|
|
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nmi_enable: bool,
|
|
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wake_up_from_light_sleep: bool,
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_: private::Internal,
|
|
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) {
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handle_gpio_input!(&mut self.0, target, {
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InputPin::listen_with_options(
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target,
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event,
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int_enable,
|
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nmi_enable,
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wake_up_from_light_sleep,
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private::Internal,
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|
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)
|
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})
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}
|
|
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|
|
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fn unlisten(&mut self, _: private::Internal) {
|
|
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handle_gpio_input!(&mut self.0, target, {
|
|
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InputPin::unlisten(target, private::Internal)
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})
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}
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|
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|
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fn is_interrupt_set(&self, _: private::Internal) -> bool {
|
|
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handle_gpio_input!(&self.0, target, {
|
|
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InputPin::is_interrupt_set(target, private::Internal)
|
|
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})
|
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}
|
|
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|
|
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fn clear_interrupt(&mut self, _: private::Internal) {
|
|
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handle_gpio_input!(&mut self.0, target, {
|
|
||||||
InputPin::clear_interrupt(target, private::Internal)
|
|
||||||
})
|
|
||||||
}
|
|
||||||
|
|
||||||
fn listen(&mut self, event: Event, _: private::Internal) {
|
|
||||||
handle_gpio_input!(&mut self.0, target, {
|
|
||||||
InputPin::listen(target, event, private::Internal)
|
|
||||||
})
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
impl PeripheralOutput for AnyPin {
|
impl PeripheralOutput for AnyPin {
|
||||||
fn set_to_open_drain_output(&mut self, _: private::Internal) {
|
fn set_to_open_drain_output(&mut self, _: private::Internal) {
|
||||||
@ -2415,7 +2357,7 @@ fn is_listening(pin_num: u8) -> bool {
|
|||||||
}
|
}
|
||||||
|
|
||||||
fn set_int_enable(gpio_num: u8, int_ena: u8, int_type: u8, wake_up_from_light_sleep: bool) {
|
fn set_int_enable(gpio_num: u8, int_ena: u8, int_type: u8, wake_up_from_light_sleep: bool) {
|
||||||
let gpio = unsafe { &*crate::peripherals::GPIO::PTR };
|
let gpio = unsafe { &*GPIO::PTR };
|
||||||
gpio.pin(gpio_num as usize).modify(|_, w| unsafe {
|
gpio.pin(gpio_num as usize).modify(|_, w| unsafe {
|
||||||
w.int_ena().bits(int_ena);
|
w.int_ena().bits(int_ena);
|
||||||
w.int_type().bits(int_type);
|
w.int_type().bits(int_type);
|
||||||
|
|||||||
@ -4,7 +4,6 @@ use crate::{
|
|||||||
clock::Clock,
|
clock::Clock,
|
||||||
efuse::Efuse,
|
efuse::Efuse,
|
||||||
gpio::{Pins, RtcFunction},
|
gpio::{Pins, RtcFunction},
|
||||||
peripherals::Peripherals,
|
|
||||||
rtc_cntl::{
|
rtc_cntl::{
|
||||||
rtc::{
|
rtc::{
|
||||||
rtc_clk_cpu_freq_set_xtal,
|
rtc_clk_cpu_freq_set_xtal,
|
||||||
@ -900,13 +899,12 @@ impl RtcSleepConfig {
|
|||||||
fn wake_io_reset() {
|
fn wake_io_reset() {
|
||||||
// loosely based on esp_deep_sleep_wakeup_io_reset
|
// loosely based on esp_deep_sleep_wakeup_io_reset
|
||||||
|
|
||||||
let peripherals = unsafe {
|
let mut pins = unsafe {
|
||||||
// We're stealing peripherals to do some uninitialization after waking up from
|
// We're stealing pins to do some uninitialization after waking up from
|
||||||
// deep sleep. We have to be careful to only touch settings that were enabled
|
// deep sleep. We have to be careful to only touch settings that were enabled
|
||||||
// by deep sleep setup.
|
// by deep sleep setup.
|
||||||
Peripherals::steal()
|
Pins::steal()
|
||||||
};
|
};
|
||||||
let mut pins = peripherals.GPIO.pins();
|
|
||||||
|
|
||||||
Ext1WakeupSource::wake_io_reset(&mut pins);
|
Ext1WakeupSource::wake_io_reset(&mut pins);
|
||||||
}
|
}
|
||||||
|
|||||||
@ -527,147 +527,6 @@ pub enum OutputSignal {
|
|||||||
MTDO,
|
MTDO,
|
||||||
}
|
}
|
||||||
|
|
||||||
pub(crate) fn errata36(pin_num: u8, pull_up: Option<bool>, pull_down: Option<bool>) {
|
|
||||||
use crate::peripherals::RTC_IO;
|
|
||||||
let rtcio = unsafe { &*RTC_IO::PTR };
|
|
||||||
|
|
||||||
match pin_num {
|
|
||||||
0 => {
|
|
||||||
rtcio.touch_pad1().modify(|_, w| {
|
|
||||||
if let Some(pull_up) = pull_up {
|
|
||||||
w.rue().bit(pull_up);
|
|
||||||
}
|
|
||||||
if let Some(pull_down) = pull_down {
|
|
||||||
w.rde().bit(pull_down);
|
|
||||||
}
|
|
||||||
w
|
|
||||||
});
|
|
||||||
}
|
|
||||||
2 => {
|
|
||||||
rtcio.touch_pad2().modify(|_, w| {
|
|
||||||
if let Some(pull_up) = pull_up {
|
|
||||||
w.rue().bit(pull_up);
|
|
||||||
}
|
|
||||||
if let Some(pull_down) = pull_down {
|
|
||||||
w.rde().bit(pull_down);
|
|
||||||
}
|
|
||||||
w
|
|
||||||
});
|
|
||||||
}
|
|
||||||
4 => {
|
|
||||||
rtcio.touch_pad0().modify(|_, w| {
|
|
||||||
if let Some(pull_up) = pull_up {
|
|
||||||
w.rue().bit(pull_up);
|
|
||||||
}
|
|
||||||
if let Some(pull_down) = pull_down {
|
|
||||||
w.rde().bit(pull_down);
|
|
||||||
}
|
|
||||||
w
|
|
||||||
});
|
|
||||||
}
|
|
||||||
12 => {
|
|
||||||
rtcio.touch_pad5().modify(|_, w| {
|
|
||||||
if let Some(pull_up) = pull_up {
|
|
||||||
w.rue().bit(pull_up);
|
|
||||||
}
|
|
||||||
if let Some(pull_down) = pull_down {
|
|
||||||
w.rde().bit(pull_down);
|
|
||||||
}
|
|
||||||
w
|
|
||||||
});
|
|
||||||
}
|
|
||||||
13 => {
|
|
||||||
rtcio.touch_pad4().modify(|_, w| {
|
|
||||||
if let Some(pull_up) = pull_up {
|
|
||||||
w.rue().bit(pull_up);
|
|
||||||
}
|
|
||||||
if let Some(pull_down) = pull_down {
|
|
||||||
w.rde().bit(pull_down);
|
|
||||||
}
|
|
||||||
w
|
|
||||||
});
|
|
||||||
}
|
|
||||||
14 => {
|
|
||||||
rtcio.touch_pad6().modify(|_, w| {
|
|
||||||
if let Some(pull_up) = pull_up {
|
|
||||||
w.rue().bit(pull_up);
|
|
||||||
}
|
|
||||||
if let Some(pull_down) = pull_down {
|
|
||||||
w.rde().bit(pull_down);
|
|
||||||
}
|
|
||||||
w
|
|
||||||
});
|
|
||||||
}
|
|
||||||
15 => {
|
|
||||||
rtcio.touch_pad3().modify(|_, w| {
|
|
||||||
if let Some(pull_up) = pull_up {
|
|
||||||
w.rue().bit(pull_up);
|
|
||||||
}
|
|
||||||
if let Some(pull_down) = pull_down {
|
|
||||||
w.rde().bit(pull_down);
|
|
||||||
}
|
|
||||||
w
|
|
||||||
});
|
|
||||||
}
|
|
||||||
25 => {
|
|
||||||
rtcio.pad_dac1().modify(|_, w| {
|
|
||||||
if let Some(pull_up) = pull_up {
|
|
||||||
w.rue().bit(pull_up);
|
|
||||||
}
|
|
||||||
if let Some(pull_down) = pull_down {
|
|
||||||
w.rde().bit(pull_down);
|
|
||||||
}
|
|
||||||
w
|
|
||||||
});
|
|
||||||
}
|
|
||||||
26 => {
|
|
||||||
rtcio.pad_dac2().modify(|_, w| {
|
|
||||||
if let Some(pull_up) = pull_up {
|
|
||||||
w.rue().bit(pull_up);
|
|
||||||
}
|
|
||||||
if let Some(pull_down) = pull_down {
|
|
||||||
w.rde().bit(pull_down);
|
|
||||||
}
|
|
||||||
w
|
|
||||||
});
|
|
||||||
}
|
|
||||||
27 => {
|
|
||||||
rtcio.touch_pad7().modify(|_, w| {
|
|
||||||
if let Some(pull_up) = pull_up {
|
|
||||||
w.rue().bit(pull_up);
|
|
||||||
}
|
|
||||||
if let Some(pull_down) = pull_down {
|
|
||||||
w.rde().bit(pull_down);
|
|
||||||
}
|
|
||||||
w
|
|
||||||
});
|
|
||||||
}
|
|
||||||
32 => {
|
|
||||||
rtcio.xtal_32k_pad().modify(|_, w| {
|
|
||||||
if let Some(pull_up) = pull_up {
|
|
||||||
w.x32p_rue().bit(pull_up);
|
|
||||||
}
|
|
||||||
if let Some(pull_down) = pull_down {
|
|
||||||
w.x32p_rde().bit(pull_down);
|
|
||||||
}
|
|
||||||
w
|
|
||||||
});
|
|
||||||
}
|
|
||||||
33 => {
|
|
||||||
rtcio.xtal_32k_pad().modify(|_, w| {
|
|
||||||
if let Some(pull_up) = pull_up {
|
|
||||||
w.x32n_rue().bit(pull_up);
|
|
||||||
}
|
|
||||||
if let Some(pull_down) = pull_down {
|
|
||||||
w.x32n_rde().bit(pull_down);
|
|
||||||
}
|
|
||||||
w
|
|
||||||
});
|
|
||||||
}
|
|
||||||
_ => (),
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
crate::gpio::gpio! {
|
crate::gpio::gpio! {
|
||||||
(0, 0, InputOutputAnalogTouch (5 => EMAC_TX_CLK) (1 => CLK_OUT1))
|
(0, 0, InputOutputAnalogTouch (5 => EMAC_TX_CLK) (1 => CLK_OUT1))
|
||||||
(1, 0, InputOutput (5 => EMAC_RXD2) (0 => U0TXD 1 => CLK_OUT3))
|
(1, 0, InputOutput (5 => EMAC_RXD2) (0 => U0TXD 1 => CLK_OUT3))
|
||||||
|
|||||||
@ -69,7 +69,7 @@ mod tests {
|
|||||||
}
|
}
|
||||||
|
|
||||||
#[test]
|
#[test]
|
||||||
async fn test_async_edge(ctx: Context) {
|
async fn async_edge(ctx: Context) {
|
||||||
let counter = AtomicUsize::new(0);
|
let counter = AtomicUsize::new(0);
|
||||||
let Context {
|
let Context {
|
||||||
test_gpio1,
|
test_gpio1,
|
||||||
@ -99,7 +99,7 @@ mod tests {
|
|||||||
}
|
}
|
||||||
|
|
||||||
#[test]
|
#[test]
|
||||||
async fn test_a_pin_can_wait(ctx: Context) {
|
async fn a_pin_can_wait(ctx: Context) {
|
||||||
let mut first = Input::new(ctx.test_gpio1, Pull::Down);
|
let mut first = Input::new(ctx.test_gpio1, Pull::Down);
|
||||||
|
|
||||||
embassy_futures::select::select(
|
embassy_futures::select::select(
|
||||||
@ -112,7 +112,7 @@ mod tests {
|
|||||||
}
|
}
|
||||||
|
|
||||||
#[test]
|
#[test]
|
||||||
fn test_gpio_input(ctx: Context) {
|
fn gpio_input(ctx: Context) {
|
||||||
let test_gpio1 = Input::new(ctx.test_gpio1, Pull::Down);
|
let test_gpio1 = Input::new(ctx.test_gpio1, Pull::Down);
|
||||||
// `InputPin`:
|
// `InputPin`:
|
||||||
assert_eq!(test_gpio1.is_low(), true);
|
assert_eq!(test_gpio1.is_low(), true);
|
||||||
@ -120,7 +120,7 @@ mod tests {
|
|||||||
}
|
}
|
||||||
|
|
||||||
#[test]
|
#[test]
|
||||||
fn test_gpio_output(ctx: Context) {
|
fn gpio_output(ctx: Context) {
|
||||||
let mut test_gpio2 = Output::new(ctx.test_gpio2, Level::Low);
|
let mut test_gpio2 = Output::new(ctx.test_gpio2, Level::Low);
|
||||||
|
|
||||||
// `StatefulOutputPin`:
|
// `StatefulOutputPin`:
|
||||||
@ -140,7 +140,7 @@ mod tests {
|
|||||||
}
|
}
|
||||||
|
|
||||||
#[test]
|
#[test]
|
||||||
fn test_gpio_output_embedded_hal_0_2(ctx: Context) {
|
fn gpio_output_embedded_hal_0_2(ctx: Context) {
|
||||||
let test_gpio1 = Input::new(ctx.test_gpio1, Pull::Down);
|
let test_gpio1 = Input::new(ctx.test_gpio1, Pull::Down);
|
||||||
let mut test_gpio2 = Output::new(ctx.test_gpio2, Level::Low);
|
let mut test_gpio2 = Output::new(ctx.test_gpio2, Level::Low);
|
||||||
|
|
||||||
@ -187,7 +187,7 @@ mod tests {
|
|||||||
}
|
}
|
||||||
|
|
||||||
#[test]
|
#[test]
|
||||||
fn test_gpio_output_embedded_hal_1_0(ctx: Context) {
|
fn gpio_output_embedded_hal_1_0(ctx: Context) {
|
||||||
let test_gpio1 = Input::new(ctx.test_gpio1, Pull::Down);
|
let test_gpio1 = Input::new(ctx.test_gpio1, Pull::Down);
|
||||||
let mut test_gpio2 = Output::new(ctx.test_gpio2, Level::Low);
|
let mut test_gpio2 = Output::new(ctx.test_gpio2, Level::Low);
|
||||||
|
|
||||||
@ -234,7 +234,7 @@ mod tests {
|
|||||||
}
|
}
|
||||||
|
|
||||||
#[test]
|
#[test]
|
||||||
fn test_gpio_interrupt(ctx: Context) {
|
fn gpio_interrupt(ctx: Context) {
|
||||||
let mut test_gpio1 = Input::new(ctx.test_gpio1, Pull::Down);
|
let mut test_gpio1 = Input::new(ctx.test_gpio1, Pull::Down);
|
||||||
let mut test_gpio2 = Output::new(ctx.test_gpio2, Level::Low);
|
let mut test_gpio2 = Output::new(ctx.test_gpio2, Level::Low);
|
||||||
|
|
||||||
@ -271,7 +271,7 @@ mod tests {
|
|||||||
}
|
}
|
||||||
|
|
||||||
#[test]
|
#[test]
|
||||||
fn test_gpio_od(ctx: Context) {
|
fn gpio_od(ctx: Context) {
|
||||||
let mut test_gpio1 = OutputOpenDrain::new(ctx.test_gpio1, Level::High, Pull::Up);
|
let mut test_gpio1 = OutputOpenDrain::new(ctx.test_gpio1, Level::High, Pull::Up);
|
||||||
let mut test_gpio2 = OutputOpenDrain::new(ctx.test_gpio2, Level::High, Pull::Up);
|
let mut test_gpio2 = OutputOpenDrain::new(ctx.test_gpio2, Level::High, Pull::Up);
|
||||||
|
|
||||||
@ -317,7 +317,7 @@ mod tests {
|
|||||||
}
|
}
|
||||||
|
|
||||||
#[test]
|
#[test]
|
||||||
fn test_gpio_flex(ctx: Context) {
|
fn gpio_flex(ctx: Context) {
|
||||||
let mut test_gpio1 = Flex::new(ctx.test_gpio1);
|
let mut test_gpio1 = Flex::new(ctx.test_gpio1);
|
||||||
let mut test_gpio2 = Flex::new(ctx.test_gpio2);
|
let mut test_gpio2 = Flex::new(ctx.test_gpio2);
|
||||||
|
|
||||||
@ -359,7 +359,7 @@ mod tests {
|
|||||||
// Tests touch pin (GPIO2) as AnyPin and Output
|
// Tests touch pin (GPIO2) as AnyPin and Output
|
||||||
// https://github.com/esp-rs/esp-hal/issues/1943
|
// https://github.com/esp-rs/esp-hal/issues/1943
|
||||||
#[test]
|
#[test]
|
||||||
fn test_gpio_touch_anypin_output(ctx: Context) {
|
fn gpio_touch_anypin_output(ctx: Context) {
|
||||||
let any_pin2 = ctx.test_gpio1;
|
let any_pin2 = ctx.test_gpio1;
|
||||||
let any_pin3 = ctx.test_gpio2;
|
let any_pin3 = ctx.test_gpio2;
|
||||||
|
|
||||||
@ -373,7 +373,7 @@ mod tests {
|
|||||||
// Tests touch pin (GPIO2) as AnyPin and Input
|
// Tests touch pin (GPIO2) as AnyPin and Input
|
||||||
// https://github.com/esp-rs/esp-hal/issues/1943
|
// https://github.com/esp-rs/esp-hal/issues/1943
|
||||||
#[test]
|
#[test]
|
||||||
fn test_gpio_touch_anypin_input(ctx: Context) {
|
fn gpio_touch_anypin_input(ctx: Context) {
|
||||||
let any_pin2 = ctx.test_gpio1;
|
let any_pin2 = ctx.test_gpio1;
|
||||||
let any_pin3 = ctx.test_gpio2;
|
let any_pin3 = ctx.test_gpio2;
|
||||||
|
|
||||||
@ -383,4 +383,12 @@ mod tests {
|
|||||||
assert_eq!(out_pin.is_set_high(), false);
|
assert_eq!(out_pin.is_set_high(), false);
|
||||||
assert_eq!(in_pin.is_high(), false);
|
assert_eq!(in_pin.is_high(), false);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
#[cfg(esp32)]
|
||||||
|
#[test]
|
||||||
|
fn can_configure_rtcio_pins_as_input() {
|
||||||
|
let pins = unsafe { esp_hal::gpio::Pins::steal() };
|
||||||
|
|
||||||
|
_ = Input::new(pins.gpio37, Pull::Down);
|
||||||
|
}
|
||||||
}
|
}
|
||||||
|
|||||||
Loading…
Reference in New Issue
Block a user