From c55ef277d8246cd3a0d85d410e96be679e9f2d6e Mon Sep 17 00:00:00 2001 From: Jesse Braham Date: Thu, 6 Oct 2022 13:32:18 -0700 Subject: [PATCH] Add the ESP32-C2 to the CI workflow, update README --- .github/workflows/ci.yml | 6 +++--- README.md | 7 +++++-- 2 files changed, 8 insertions(+), 5 deletions(-) diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml index 7104032fd..23f698c5c 100644 --- a/.github/workflows/ci.yml +++ b/.github/workflows/ci.yml @@ -20,7 +20,7 @@ jobs: strategy: fail-fast: false matrix: - chip: [esp32c3] + chip: [esp32c2, esp32c3] toolchain: [stable, nightly] steps: - uses: actions/checkout@v2 @@ -65,7 +65,7 @@ jobs: strategy: fail-fast: false matrix: - chip: [esp32c3] + chip: [esp32c2, esp32c3] toolchain: [stable, nightly] steps: - uses: actions/checkout@v2 @@ -111,7 +111,7 @@ jobs: strategy: fail-fast: false matrix: - chip: [esp32c3] + chip: [esp32c2, esp32c3] steps: - uses: actions/checkout@v2 - uses: actions-rs/toolchain@v1 diff --git a/README.md b/README.md index dd58159a5..e12772992 100644 --- a/README.md +++ b/README.md @@ -4,7 +4,7 @@ ![MIT/Apache-2.0 licensed](https://img.shields.io/badge/license-MIT%2FApache--2.0-blue?style=flat-square) [![Matrix](https://img.shields.io/matrix/esp-rs:matrix.org?label=join%20matrix&color=BEC5C9&logo=matrix&style=flat-square)](https://matrix.to/#/#esp-rs:matrix.org) -**H**ardware **A**bstraction **L**ayer crates for the **ESP32**, **ESP32-C3**, **ESP32-S2**, and **ESP32-S3** from Espressif. +**H**ardware **A**bstraction **L**ayer crates for the **ESP32**, **ESP32-C2**, **ESP32-C3**, **ESP32-S2**, and **ESP32-S3** from Espressif. These HALs are `no_std`; if you are looking for `std` support please use [esp-idf-hal] instead. @@ -15,6 +15,7 @@ If you have any questions, comments, or concerns please [open an issue], [start | Crate | Target | Technical Reference Manual | | :-----------: | :-----------------------------------------------------------------: | :------------------------: | | [esp32-hal] | `xtensa-esp32-none-elf` | [ESP32] | +| [esp32c2-hal] | `riscv32imc-unknown-none-elf`
`riscv32imac-unknown-none-elf`\* | [ESP32-C2] | | [esp32c3-hal] | `riscv32imc-unknown-none-elf`
`riscv32imac-unknown-none-elf`\* | [ESP32-C3] | | [esp32s2-hal] | `xtensa-esp32s2-none-elf` | [ESP32-S2] | | [esp32s3-hal] | `xtensa-esp32s3-none-elf` | [ESP32-S3] | @@ -27,10 +28,12 @@ _\* via [atomic emulation]_ [start a new discussion]: https://github.com/esp-rs/esp-hal/discussions/new [matrix]: https://matrix.to/#/#esp-rs:matrix.org [esp32-hal]: https://github.com/esp-rs/esp-hal/tree/main/esp32-hal +[esp32c2-hal]: https://github.com/esp-rs/esp-hal/tree/main/esp32c2-hal [esp32c3-hal]: https://github.com/esp-rs/esp-hal/tree/main/esp32c3-hal [esp32s2-hal]: https://github.com/esp-rs/esp-hal/tree/main/esp32s2-hal [esp32s3-hal]: https://github.com/esp-rs/esp-hal/tree/main/esp32s3-hal [esp32]: https://www.espressif.com/sites/default/files/documentation/esp32_technical_reference_manual_en.pdf +[esp32-c2]: https://www.espressif.com/sites/default/files/documentation/esp8684_technical_reference_manual_en.pdf [esp32-c3]: https://www.espressif.com/sites/default/files/documentation/esp32-c3_technical_reference_manual_en.pdf [esp32-s2]: https://www.espressif.com/sites/default/files/documentation/esp32-s2_technical_reference_manual_en.pdf [esp32-s3]: https://www.espressif.com/sites/default/files/documentation/esp32-s3_technical_reference_manual_en.pdf @@ -71,7 +74,7 @@ There are a number of other crates within the [esp-rs organization] which can be The **M**inimum **S**upported **R**ust **V**ersions are: -- `1.60.0` for RISC-V devices (**ESP32-C3**) +- `1.60.0` for RISC-V devices (**ESP32-C2**, **ESP32-C3**) - `1.60.0` for Xtensa devices (**ESP32**, **ESP32-S2**, **ESP32-S3**) Note that targeting the Xtensa ISA currently requires the use of the [esp-rs/rust] compiler fork. The [esp-rs/rust-build] repository has pre-compiled release artifacts for most common platforms, and provides installation scripts to aid you in the process.