Fix first UART print (#2318)

* Fix first UART print

* Add test case

* Explicitly set level to cause problems

esp-hal/src/uart.rs

@@ -461,6 +461,8 @@ where
 
     fn with_tx<TX: PeripheralOutput>(self, tx: impl Peripheral<P = TX> + 'd) -> Self {
         crate::into_ref!(tx);
+        // Make sure we don't cause an unexpected low pulse on the pin.
+        tx.set_output_high(true, Internal);
         tx.set_to_push_pull_output(Internal);
         tx.connect_peripheral_to_output(T::tx_signal(), Internal);
 

hil-test/Cargo.toml

@@ -148,6 +148,10 @@ name              = "uart_async"
 harness           = false
 required-features = ["embassy"]
 
+[[test]]
+name    = "uart_regression"
+harness = false
+
 [[test]]
 name    = "uart_tx_rx"
 harness = false

hil-test/tests/uart_regression.rs

@@ -0,0 +1,44 @@
+//! Misc UART TX/RX regression tests
+
+//% CHIPS: esp32 esp32c2 esp32c3 esp32c6 esp32h2 esp32s2 esp32s3
+
+#![no_std]
+#![no_main]
+
+#[cfg(test)]
+#[embedded_test::tests]
+mod tests {
+    use esp_hal::{
+        gpio::{Io, PeripheralOutput},
+        prelude::*,
+        uart::{UartRx, UartTx},
+    };
+    use hil_test as _;
+    use nb::block;
+
+    #[test]
+    #[timeout(3)]
+    fn test_that_creating_tx_does_not_cause_a_pulse() {
+        let peripherals = esp_hal::init(esp_hal::Config::default());
+
+        let io = Io::new(peripherals.GPIO, peripherals.IO_MUX);
+
+        let (rx, mut tx) = hil_test::common_test_pins!(io);
+
+        let mut rx = UartRx::new(peripherals.UART1, rx).unwrap();
+
+        // start reception
+        _ = rx.read_byte(); // this will just return WouldBlock
+
+        unsafe { tx.set_output_high(false, esp_hal::Internal::conjure()) };
+
+        // set up TX and send a byte
+        let mut tx = UartTx::new(peripherals.UART0, tx).unwrap();
+
+        tx.flush_tx().unwrap();
+        tx.write_bytes(&[0x42]).unwrap();
+        let read = block!(rx.read_byte());
+
+        assert_eq!(read, Ok(0x42));
+    }
+}