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Improve spi master constructor (#901)

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* make pins optional for Spi::new (master, full-duplex mode)

* add additional method to setup spi pins (master, full-duplex mode)

* add additional method to setup spi pins (master, half-duplex mode)

* remove generic type parameters for Spi::new

* update documentation

* make `with_pins` could be chained

* update CHANGELOG.md

* update CHANGELOG.md

* make the return value of a method like `with_{*}` owned

* fix (maybe?) all broken examples caused by the change (esp32-hal)

* fix (maybe?) all broken examples caused by the change (esp32c2-hal)

* fix (maybe?) all broken examples caused by the change (esp32c3-hal)

* fix (maybe?) all broken examples caused by the change (esp32c6-hal)

* fix (maybe?) all broken examples caused by the change (esp32h2-hal)

* fix (maybe?) all broken examples caused by the change (esp32s2-hal)

* fix (maybe?) all broken examples caused by the change (esp32s3-hal)

* rerun 'cargo fmt' for esp-hal-common

* rerun 'cargo fmt' for the rest of examples
This commit is contained in:
sanxus 2023-11-08 19:11:58 +08:00 committed by GitHub
parent aa1fefdc8c
commit c196b67587
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51 changed files with 574 additions and 743 deletions
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2
CHANGELOG.md
View File

@ -23,8 +23,8 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
### Removed
### Breaking
- Direct boot support has been removed (#903).
- `Spi::new`/`Spi::new_half_duplex` takes no gpio pin now, instead you need to call `with_pins` to setup those (#901).
## [0.13.1] - 2023-11-02

272
esp-hal-common/src/spi/master.rs
View File

@ -16,15 +16,12 @@
//!
//! let mut spi = hal::spi::Spi::new(
//! peripherals.SPI2,
//! sclk,
//! mosi,
//! miso,
//! cs,
//! 100u32.kHz(),
//! SpiMode::Mode0,
//! &mut peripheral_clock_control,
//! &mut clocks,
//! );
//! )
//! .with_pins(Some(sclk), Some(mosi), Some(miso), Some(cs));
//! ```
//!
//! ## Exclusive access to the SPI bus
@ -392,114 +389,87 @@ where
T: Instance,
{
/// Constructs an SPI instance in 8bit dataframe mode.
pub fn new<SCK: OutputPin, MOSI: OutputPin, MISO: InputPin, CS: OutputPin>(
///
/// All pins are optional. Setup these pins using
/// [with_pins](Self::with_pins) or individual methods for each pin.
pub fn new(
spi: impl Peripheral<P = T> + 'd,
sck: impl Peripheral<P = SCK> + 'd,
mosi: impl Peripheral<P = MOSI> + 'd,
miso: impl Peripheral<P = MISO> + 'd,
cs: impl Peripheral<P = CS> + 'd,
frequency: HertzU32,
mode: SpiMode,
clocks: &Clocks,
) -> Spi<'d, T, FullDuplexMode> {
crate::into_ref!(spi, sck, mosi, miso, cs);
crate::into_ref!(spi);
Self::new_internal(spi, frequency, mode, clocks)
}
pub fn with_sck<SCK: OutputPin>(self, sck: impl Peripheral<P = SCK> + 'd) -> Self {
crate::into_ref!(sck);
sck.set_to_push_pull_output()
.connect_peripheral_to_output(spi.sclk_signal());
.connect_peripheral_to_output(self.spi.sclk_signal());
self
}
pub fn with_mosi<MOSI: OutputPin>(self, mosi: impl Peripheral<P = MOSI> + 'd) -> Self {
crate::into_ref!(mosi);
mosi.set_to_push_pull_output()
.connect_peripheral_to_output(spi.mosi_signal());
.connect_peripheral_to_output(self.spi.mosi_signal());
self
}
pub fn with_miso<MISO: InputPin>(self, miso: impl Peripheral<P = MISO> + 'd) -> Self {
crate::into_ref!(miso);
miso.set_to_input()
.connect_input_to_peripheral(spi.miso_signal());
.connect_input_to_peripheral(self.spi.miso_signal());
self
}
pub fn with_cs<CS: OutputPin>(self, cs: impl Peripheral<P = CS> + 'd) -> Self {
crate::into_ref!(cs);
cs.set_to_push_pull_output()
.connect_peripheral_to_output(spi.cs_signal());
.connect_peripheral_to_output(self.spi.cs_signal());
Self::new_internal(spi, frequency, mode, clocks)
self
}
/// Constructs an SPI instance in 8bit dataframe mode without CS pin.
pub fn new_no_cs<SCK: OutputPin, MOSI: OutputPin, MISO: InputPin>(
spi: impl Peripheral<P = T> + 'd,
sck: impl Peripheral<P = SCK> + 'd,
mosi: impl Peripheral<P = MOSI> + 'd,
miso: impl Peripheral<P = MISO> + 'd,
frequency: HertzU32,
mode: SpiMode,
clocks: &Clocks,
) -> Spi<'d, T, FullDuplexMode> {
crate::into_ref!(spi, sck, mosi, miso);
sck.set_to_push_pull_output()
.connect_peripheral_to_output(spi.sclk_signal());
/// Setup pins for this SPI instance.
///
/// All pins are optional. Pass [crate::gpio::NO_PIN] if you don't need the
/// given pin.
pub fn with_pins<SCK: OutputPin, MOSI: OutputPin, MISO: InputPin, CS: OutputPin>(
self,
sck: Option<impl Peripheral<P = SCK> + 'd>,
mosi: Option<impl Peripheral<P = MOSI> + 'd>,
miso: Option<impl Peripheral<P = MISO> + 'd>,
cs: Option<impl Peripheral<P = CS> + 'd>,
) -> Self {
if let Some(sck) = sck {
crate::into_ref!(sck);
sck.set_to_push_pull_output()
.connect_peripheral_to_output(self.spi.sclk_signal());
}
mosi.set_to_push_pull_output()
.connect_peripheral_to_output(spi.mosi_signal());
if let Some(mosi) = mosi {
crate::into_ref!(mosi);
mosi.set_to_push_pull_output()
.connect_peripheral_to_output(self.spi.mosi_signal());
}
miso.set_to_input()
.connect_input_to_peripheral(spi.miso_signal());
if let Some(miso) = miso {
crate::into_ref!(miso);
miso.set_to_input()
.connect_input_to_peripheral(self.spi.miso_signal());
}
Self::new_internal(spi, frequency, mode, clocks)
}
if let Some(cs) = cs {
crate::into_ref!(cs);
cs.set_to_push_pull_output()
.connect_peripheral_to_output(self.spi.cs_signal());
}
/// Constructs an SPI instance in 8bit dataframe mode without MISO pin.
pub fn new_no_miso<SCK: OutputPin, MOSI: OutputPin, CS: OutputPin>(
spi: impl Peripheral<P = T> + 'd,
sck: impl Peripheral<P = SCK> + 'd,
mosi: impl Peripheral<P = MOSI> + 'd,
cs: impl Peripheral<P = CS> + 'd,
frequency: HertzU32,
mode: SpiMode,
clocks: &Clocks,
) -> Spi<'d, T, FullDuplexMode> {
crate::into_ref!(spi, sck, mosi, cs);
sck.set_to_push_pull_output()
.connect_peripheral_to_output(spi.sclk_signal());
mosi.set_to_push_pull_output()
.connect_peripheral_to_output(spi.mosi_signal());
cs.set_to_push_pull_output()
.connect_peripheral_to_output(spi.cs_signal());
Self::new_internal(spi, frequency, mode, clocks)
}
/// Constructs an SPI instance in 8bit dataframe mode without CS and MISO
/// pin.
pub fn new_no_cs_no_miso<SCK: OutputPin, MOSI: OutputPin>(
spi: impl Peripheral<P = T> + 'd,
sck: impl Peripheral<P = SCK> + 'd,
mosi: impl Peripheral<P = MOSI> + 'd,
frequency: HertzU32,
mode: SpiMode,
clocks: &Clocks,
) -> Spi<'d, T, FullDuplexMode> {
crate::into_ref!(spi, sck, mosi);
sck.set_to_push_pull_output()
.connect_peripheral_to_output(spi.sclk_signal());
mosi.set_to_push_pull_output()
.connect_peripheral_to_output(spi.mosi_signal());
Self::new_internal(spi, frequency, mode, clocks)
}
/// Constructs an SPI instance in 8bit dataframe mode with only MOSI
/// connected. This might be useful for (ab)using SPI to implement
/// other protocols by bitbanging (WS2812B, onewire, generating arbitrary
/// waveforms…)
pub fn new_mosi_only<MOSI: OutputPin>(
spi: impl Peripheral<P = T> + 'd,
mosi: impl Peripheral<P = MOSI> + 'd,
frequency: HertzU32,
mode: SpiMode,
clocks: &Clocks,
) -> Spi<'d, T, FullDuplexMode> {
crate::into_ref!(spi, mosi);
mosi.set_to_push_pull_output()
.connect_peripheral_to_output(spi.mosi_signal());
Self::new_internal(spi, frequency, mode, clocks)
self
}
pub(crate) fn new_internal(
@ -532,9 +502,91 @@ where
{
/// Constructs an SPI instance in half-duplex mode.
///
/// All pins are optional. Setup these pins using
/// [with_pins](Self::with_pins) or individual methods for each pin.
pub fn new_half_duplex(
spi: impl Peripheral<P = T> + 'd,
frequency: HertzU32,
mode: SpiMode,
clocks: &Clocks,
) -> Spi<'d, T, HalfDuplexMode> {
crate::into_ref!(spi);
Self::new_internal(spi, frequency, mode, clocks)
}
pub fn with_sck<SCK: OutputPin>(self, sck: impl Peripheral<P = SCK> + 'd) -> Self {
crate::into_ref!(sck);
sck.set_to_push_pull_output()
.connect_peripheral_to_output(self.spi.sclk_signal());
self
}
pub fn with_mosi<MOSI: OutputPin + InputPin>(
self,
mosi: impl Peripheral<P = MOSI> + 'd,
) -> Self {
crate::into_ref!(mosi);
mosi.enable_output(true);
mosi.connect_peripheral_to_output(self.spi.mosi_signal());
mosi.enable_input(true);
mosi.connect_input_to_peripheral(self.spi.sio0_input_signal());
self
}
pub fn with_miso<MISO: OutputPin + InputPin>(
self,
miso: impl Peripheral<P = MISO> + 'd,
) -> Self {
crate::into_ref!(miso);
miso.enable_output(true);
miso.connect_peripheral_to_output(self.spi.sio1_output_signal());
miso.enable_input(true);
miso.connect_input_to_peripheral(self.spi.miso_signal());
self
}
pub fn with_sio2<SIO2: OutputPin + InputPin>(
self,
sio2: impl Peripheral<P = SIO2> + 'd,
) -> Self {
crate::into_ref!(sio2);
sio2.enable_output(true);
sio2.connect_peripheral_to_output(self.spi.sio2_output_signal());
sio2.enable_input(true);
sio2.connect_input_to_peripheral(self.spi.sio2_input_signal());
self
}
pub fn with_sio3<SIO3: OutputPin + InputPin>(
self,
sio3: impl Peripheral<P = SIO3> + 'd,
) -> Self {
crate::into_ref!(sio3);
sio3.enable_output(true);
sio3.connect_peripheral_to_output(self.spi.sio3_output_signal());
sio3.enable_input(true);
sio3.connect_input_to_peripheral(self.spi.sio3_input_signal());
self
}
pub fn with_cs<CS: OutputPin>(self, cs: impl Peripheral<P = CS> + 'd) -> Self {
crate::into_ref!(cs);
cs.set_to_push_pull_output()
.connect_peripheral_to_output(self.spi.cs_signal());
self
}
/// Setup pins for this SPI instance.
///
/// All pins are optional. Pass [crate::gpio::NO_PIN] if you don't need the
/// given pin.
pub fn new_half_duplex<
pub fn with_pins<
SCK: OutputPin,
MOSI: OutputPin + InputPin,
MISO: OutputPin + InputPin,
@ -542,63 +594,59 @@ where
SIO3: OutputPin + InputPin,
CS: OutputPin,
>(
spi: impl Peripheral<P = T> + 'd,
self,
sck: Option<impl Peripheral<P = SCK> + 'd>,
mosi: Option<impl Peripheral<P = MOSI> + 'd>,
miso: Option<impl Peripheral<P = MISO> + 'd>,
sio2: Option<impl Peripheral<P = SIO2> + 'd>,
sio3: Option<impl Peripheral<P = SIO3> + 'd>,
cs: Option<impl Peripheral<P = CS> + 'd>,
frequency: HertzU32,
mode: SpiMode,
clocks: &Clocks,
) -> Spi<'d, T, HalfDuplexMode> {
crate::into_ref!(spi);
) -> Self {
if let Some(sck) = sck {
crate::into_ref!(sck);
sck.set_to_push_pull_output()
.connect_peripheral_to_output(spi.sclk_signal());
.connect_peripheral_to_output(self.spi.sclk_signal());
}
if let Some(mosi) = mosi {
crate::into_ref!(mosi);
mosi.enable_output(true);
mosi.connect_peripheral_to_output(spi.mosi_signal());
mosi.connect_peripheral_to_output(self.spi.mosi_signal());
mosi.enable_input(true);
mosi.connect_input_to_peripheral(spi.sio0_input_signal());
mosi.connect_input_to_peripheral(self.spi.sio0_input_signal());
}
if let Some(miso) = miso {
crate::into_ref!(miso);
miso.enable_output(true);
miso.connect_peripheral_to_output(spi.sio1_output_signal());
miso.connect_peripheral_to_output(self.spi.sio1_output_signal());
miso.enable_input(true);
miso.connect_input_to_peripheral(spi.miso_signal());
miso.connect_input_to_peripheral(self.spi.miso_signal());
}
if let Some(sio2) = sio2 {
crate::into_ref!(sio2);
sio2.enable_output(true);
sio2.connect_peripheral_to_output(spi.sio2_output_signal());
sio2.connect_peripheral_to_output(self.spi.sio2_output_signal());
sio2.enable_input(true);
sio2.connect_input_to_peripheral(spi.sio2_input_signal());
sio2.connect_input_to_peripheral(self.spi.sio2_input_signal());
}
if let Some(sio3) = sio3 {
crate::into_ref!(sio3);
sio3.enable_output(true);
sio3.connect_peripheral_to_output(spi.sio3_output_signal());
sio3.connect_peripheral_to_output(self.spi.sio3_output_signal());
sio3.enable_input(true);
sio3.connect_input_to_peripheral(spi.sio3_input_signal());
sio3.connect_input_to_peripheral(self.spi.sio3_input_signal());
}
if let Some(cs) = cs {
crate::into_ref!(cs);
cs.set_to_push_pull_output()
.connect_peripheral_to_output(spi.cs_signal());
.connect_peripheral_to_output(self.spi.cs_signal());
}
Self::new_internal(spi, frequency, mode, clocks)
self
}
pub(crate) fn new_internal(

24
esp32-hal/examples/embassy_spi.rs
View File

@ -64,22 +64,14 @@ async fn main(_spawner: Spawner) -> ! {
let mut descriptors = [0u32; 8 * 3];
let mut rx_descriptors = [0u32; 8 * 3];
let mut spi = Spi::new(
peripherals.SPI2,
sclk,
mosi,
miso,
cs,
100u32.kHz(),
SpiMode::Mode0,
&clocks,
)
.with_dma(dma_channel.configure(
false,
&mut descriptors,
&mut rx_descriptors,
DmaPriority::Priority0,
));
let mut spi = Spi::new(peripherals.SPI2, 100u32.kHz(), SpiMode::Mode0, &clocks)
.with_pins(Some(sclk), Some(mosi), Some(miso), Some(cs))
.with_dma(dma_channel.configure(
false,
&mut descriptors,
&mut rx_descriptors,
DmaPriority::Priority0,
));
let send_buffer = [0, 1, 2, 3, 4, 5, 6, 7];
loop {

33
esp32-hal/examples/qspi_flash.rs
View File

@ -54,24 +54,21 @@ fn main() -> ! {
let mut descriptors = [0u32; 8 * 3];
let mut rx_descriptors = [0u32; 8 * 3];
let mut spi = Spi::new_half_duplex(
peripherals.SPI2,
Some(sclk),
Some(mosi),
Some(miso),
Some(sio2),
Some(sio3),
Some(cs),
100u32.kHz(),
SpiMode::Mode0,
&clocks,
)
.with_dma(dma_channel.configure(
false,
&mut descriptors,
&mut rx_descriptors,
DmaPriority::Priority0,
));
let mut spi = Spi::new_half_duplex(peripherals.SPI2, 100u32.kHz(), SpiMode::Mode0, &clocks)
.with_pins(
Some(sclk),
Some(mosi),
Some(miso),
Some(sio2),
Some(sio3),
Some(cs),
)
.with_dma(dma_channel.configure(
false,
&mut descriptors,
&mut rx_descriptors,
DmaPriority::Priority0,
));
let mut delay = Delay::new(&clocks);

19
esp32-hal/examples/spi_eh1_device_loopback.rs
View File

@ -21,7 +21,7 @@
use embedded_hal_1::spi::SpiDevice;
use esp32_hal::{
clock::ClockControl,
gpio::IO,
gpio::{self, IO},
peripherals::Peripherals,
prelude::*,
spi::{
@ -44,15 +44,14 @@ fn main() -> ! {
let miso = io.pins.gpio25;
let mosi = io.pins.gpio23;
let spi_controller = SpiBusController::from_spi(Spi::new_no_cs(
peripherals.SPI2,
sclk,
mosi,
miso,
1000u32.kHz(),
SpiMode::Mode0,
&clocks,
));
let spi_controller = SpiBusController::from_spi(
Spi::new(peripherals.SPI2, 1000u32.kHz(), SpiMode::Mode0, &clocks).with_pins(
Some(sclk),
Some(mosi),
Some(miso),
gpio::NO_PIN,
),
);
let mut spi_device_1 = spi_controller.add_device(io.pins.gpio12);
let mut spi_device_2 = spi_controller.add_device(io.pins.gpio13);
let mut spi_device_3 = spi_controller.add_device(io.pins.gpio14);

14
esp32-hal/examples/spi_eh1_loopback.rs
View File

@ -43,15 +43,11 @@ fn main() -> ! {
let mosi = io.pins.gpio23;
let cs = io.pins.gpio22;
let mut spi = Spi::new(
peripherals.SPI2,
sclk,
mosi,
miso,
cs,
1000u32.kHz(),
SpiMode::Mode0,
&clocks,
let mut spi = Spi::new(peripherals.SPI2, 1000u32.kHz(), SpiMode::Mode0, &clocks).with_pins(
Some(sclk),
Some(mosi),
Some(miso),
Some(cs),
);
let mut delay = Delay::new(&clocks);

21
esp32-hal/examples/spi_halfduplex_read_manufacturer_id.rs
View File

@ -46,18 +46,15 @@ fn main() -> ! {
let sio3 = io.pins.gpio16;
let cs = io.pins.gpio4;
let mut spi = Spi::new_half_duplex(
peripherals.SPI2,
Some(sclk),
Some(mosi),
Some(miso),
Some(sio2),
Some(sio3),
Some(cs),
100u32.kHz(),
SpiMode::Mode0,
&clocks,
);
let mut spi = Spi::new_half_duplex(peripherals.SPI2, 100u32.kHz(), SpiMode::Mode0, &clocks)
.with_pins(
Some(sclk),
Some(mosi),
Some(miso),
Some(sio2),
Some(sio3),
Some(cs),
);
let mut delay = Delay::new(&clocks);

14
esp32-hal/examples/spi_loopback.rs
View File

@ -42,15 +42,11 @@ fn main() -> ! {
let mosi = io.pins.gpio23;
let cs = io.pins.gpio22;
let mut spi = Spi::new(
peripherals.SPI2,
sclk,
mosi,
miso,
cs,
100u32.kHz(),
SpiMode::Mode0,
&clocks,
let mut spi = Spi::new(peripherals.SPI2, 100u32.kHz(), SpiMode::Mode0, &clocks).with_pins(
Some(sclk),
Some(mosi),
Some(miso),
Some(cs),
);
let mut delay = Delay::new(&clocks);

24
esp32-hal/examples/spi_loopback_dma.rs
View File

@ -50,22 +50,14 @@ fn main() -> ! {
let mut descriptors = [0u32; 8 * 3];
let mut rx_descriptors = [0u32; 8 * 3];
let mut spi = Spi::new(
peripherals.SPI2,
sclk,
mosi,
miso,
cs,
100u32.kHz(),
SpiMode::Mode0,
&clocks,
)
.with_dma(dma_channel.configure(
false,
&mut descriptors,
&mut rx_descriptors,
DmaPriority::Priority0,
));
let mut spi = Spi::new(peripherals.SPI2, 100u32.kHz(), SpiMode::Mode0, &clocks)
.with_pins(Some(sclk), Some(mosi), Some(miso), Some(cs))
.with_dma(dma_channel.configure(
false,
&mut descriptors,
&mut rx_descriptors,
DmaPriority::Priority0,
));
let mut delay = Delay::new(&clocks);

24
esp32c2-hal/examples/embassy_spi.rs
View File

@ -72,22 +72,14 @@ async fn main(_spawner: Spawner) -> ! {
let mut descriptors = [0u32; 8 * 3];
let mut rx_descriptors = [0u32; 8 * 3];
let mut spi = Spi::new(
peripherals.SPI2,
sclk,
mosi,
miso,
cs,
100u32.kHz(),
SpiMode::Mode0,
&clocks,
)
.with_dma(dma_channel.configure(
false,
&mut descriptors,
&mut rx_descriptors,
DmaPriority::Priority0,
));
let mut spi = Spi::new(peripherals.SPI2, 100u32.kHz(), SpiMode::Mode0, &clocks)
.with_pins(Some(sclk), Some(mosi), Some(miso), Some(cs))
.with_dma(dma_channel.configure(
false,
&mut descriptors,
&mut rx_descriptors,
DmaPriority::Priority0,
));
let send_buffer = [0, 1, 2, 3, 4, 5, 6, 7];
loop {

33
esp32c2-hal/examples/qspi_flash.rs
View File

@ -54,24 +54,21 @@ fn main() -> ! {
let mut descriptors = [0u32; 8 * 3];
let mut rx_descriptors = [0u32; 8 * 3];
let mut spi = Spi::new_half_duplex(
peripherals.SPI2,
Some(sclk),
Some(mosi),
Some(miso),
Some(sio2),
Some(sio3),
Some(cs),
100u32.kHz(),
SpiMode::Mode0,
&clocks,
)
.with_dma(dma_channel.configure(
false,
&mut descriptors,
&mut rx_descriptors,
DmaPriority::Priority0,
));
let mut spi = Spi::new_half_duplex(peripherals.SPI2, 100u32.kHz(), SpiMode::Mode0, &clocks)
.with_pins(
Some(sclk),
Some(mosi),
Some(miso),
Some(sio2),
Some(sio3),
Some(cs),
)
.with_dma(dma_channel.configure(
false,
&mut descriptors,
&mut rx_descriptors,
DmaPriority::Priority0,
));
let mut delay = Delay::new(&clocks);

19
esp32c2-hal/examples/spi_eh1_device_loopback.rs
View File

@ -21,7 +21,7 @@
use embedded_hal_1::spi::SpiDevice;
use esp32c2_hal::{
clock::ClockControl,
gpio::IO,
gpio::{self, IO},
peripherals::Peripherals,
prelude::*,
spi::{
@ -44,15 +44,14 @@ fn main() -> ! {
let miso = io.pins.gpio2;
let mosi = io.pins.gpio7;
let spi_controller = SpiBusController::from_spi(Spi::new_no_cs(
peripherals.SPI2,
sclk,
mosi,
miso,
1000u32.kHz(),
SpiMode::Mode0,
&clocks,
));
let spi_controller = SpiBusController::from_spi(
Spi::new(peripherals.SPI2, 1000u32.kHz(), SpiMode::Mode0, &clocks).with_pins(
Some(sclk),
Some(mosi),
Some(miso),
gpio::NO_PIN,
),
);
let mut spi_device_1 = spi_controller.add_device(io.pins.gpio3);
let mut spi_device_2 = spi_controller.add_device(io.pins.gpio4);
let mut spi_device_3 = spi_controller.add_device(io.pins.gpio5);

14
esp32c2-hal/examples/spi_eh1_loopback.rs
View File

@ -43,15 +43,11 @@ fn main() -> ! {
let mosi = io.pins.gpio7;
let cs = io.pins.gpio10;
let mut spi = Spi::new(
peripherals.SPI2,
sclk,
mosi,
miso,
cs,
1000u32.kHz(),
SpiMode::Mode0,
&clocks,
let mut spi = Spi::new(peripherals.SPI2, 1000u32.kHz(), SpiMode::Mode0, &clocks).with_pins(
Some(sclk),
Some(mosi),
Some(miso),
Some(cs),
);
let mut delay = Delay::new(&clocks);

21
esp32c2-hal/examples/spi_halfduplex_read_manufacturer_id.rs
View File

@ -46,18 +46,15 @@ fn main() -> ! {
let sio3 = io.pins.gpio8;
let cs = io.pins.gpio9;
let mut spi = Spi::new_half_duplex(
peripherals.SPI2,
Some(sclk),
Some(mosi),
Some(miso),
Some(sio2),
Some(sio3),
Some(cs),
100u32.kHz(),
SpiMode::Mode0,
&clocks,
);
let mut spi = Spi::new_half_duplex(peripherals.SPI2, 100u32.kHz(), SpiMode::Mode0, &clocks)
.with_pins(
Some(sclk),
Some(mosi),
Some(miso),
Some(sio2),
Some(sio3),
Some(cs),
);
let mut delay = Delay::new(&clocks);

14
esp32c2-hal/examples/spi_loopback.rs
View File

@ -42,15 +42,11 @@ fn main() -> ! {
let mosi = io.pins.gpio7;
let cs = io.pins.gpio10;
let mut spi = Spi::new(
peripherals.SPI2,
sclk,
mosi,
miso,
cs,
100u32.kHz(),
SpiMode::Mode0,
&clocks,
let mut spi = Spi::new(peripherals.SPI2, 100u32.kHz(), SpiMode::Mode0, &clocks).with_pins(
Some(sclk),
Some(mosi),
Some(miso),
Some(cs),
);
let mut delay = Delay::new(&clocks);

24
esp32c2-hal/examples/spi_loopback_dma.rs
View File

@ -50,22 +50,14 @@ fn main() -> ! {
let mut descriptors = [0u32; 8 * 3];
let mut rx_descriptors = [0u32; 8 * 3];
let mut spi = Spi::new(
peripherals.SPI2,
sclk,
mosi,
miso,
cs,
100u32.kHz(),
SpiMode::Mode0,
&clocks,
)
.with_dma(dma_channel.configure(
false,
&mut descriptors,
&mut rx_descriptors,
DmaPriority::Priority0,
));
let mut spi = Spi::new(peripherals.SPI2, 100u32.kHz(), SpiMode::Mode0, &clocks)
.with_pins(Some(sclk), Some(mosi), Some(miso), Some(cs))
.with_dma(dma_channel.configure(
false,
&mut descriptors,
&mut rx_descriptors,
DmaPriority::Priority0,
));
let mut delay = Delay::new(&clocks);

24
esp32c3-hal/examples/embassy_spi.rs
View File

@ -72,22 +72,14 @@ async fn main(_spawner: Spawner) -> ! {
let mut descriptors = [0u32; 8 * 3];
let mut rx_descriptors = [0u32; 8 * 3];
let mut spi = Spi::new(
peripherals.SPI2,
sclk,
mosi,
miso,
cs,
100u32.kHz(),
SpiMode::Mode0,
&clocks,
)
.with_dma(dma_channel.configure(
false,
&mut descriptors,
&mut rx_descriptors,
DmaPriority::Priority0,
));
let mut spi = Spi::new(peripherals.SPI2, 100u32.kHz(), SpiMode::Mode0, &clocks)
.with_pins(Some(sclk), Some(mosi), Some(miso), Some(cs))
.with_dma(dma_channel.configure(
false,
&mut descriptors,
&mut rx_descriptors,
DmaPriority::Priority0,
));
let send_buffer = [0, 1, 2, 3, 4, 5, 6, 7];
loop {

33
esp32c3-hal/examples/qspi_flash.rs
View File

@ -54,24 +54,21 @@ fn main() -> ! {
let mut descriptors = [0u32; 8 * 3];
let mut rx_descriptors = [0u32; 8 * 3];
let mut spi = Spi::new_half_duplex(
peripherals.SPI2,
Some(sclk),
Some(mosi),
Some(miso),
Some(sio2),
Some(sio3),
Some(cs),
100u32.kHz(),
SpiMode::Mode0,
&clocks,
)
.with_dma(dma_channel.configure(
false,
&mut descriptors,
&mut rx_descriptors,
DmaPriority::Priority0,
));
let mut spi = Spi::new_half_duplex(peripherals.SPI2, 100u32.kHz(), SpiMode::Mode0, &clocks)
.with_pins(
Some(sclk),
Some(mosi),
Some(miso),
Some(sio2),
Some(sio3),
Some(cs),
)
.with_dma(dma_channel.configure(
false,
&mut descriptors,
&mut rx_descriptors,
DmaPriority::Priority0,
));
let mut delay = Delay::new(&clocks);

19
esp32c3-hal/examples/spi_eh1_device_loopback.rs
View File

@ -21,7 +21,7 @@
use embedded_hal_1::spi::SpiDevice;
use esp32c3_hal::{
clock::ClockControl,
gpio::IO,
gpio::{self, IO},
peripherals::Peripherals,
prelude::*,
spi::{
@ -44,15 +44,14 @@ fn main() -> ! {
let miso = io.pins.gpio2;
let mosi = io.pins.gpio7;
let spi_controller = SpiBusController::from_spi(Spi::new_no_cs(
peripherals.SPI2,
sclk,
mosi,
miso,
1000u32.kHz(),
SpiMode::Mode0,
&clocks,
));
let spi_controller = SpiBusController::from_spi(
Spi::new(peripherals.SPI2, 1000u32.kHz(), SpiMode::Mode0, &clocks).with_pins(
Some(sclk),
Some(mosi),
Some(miso),
gpio::NO_PIN,
),
);
let mut spi_device_1 = spi_controller.add_device(io.pins.gpio3);
let mut spi_device_2 = spi_controller.add_device(io.pins.gpio4);
let mut spi_device_3 = spi_controller.add_device(io.pins.gpio5);

14
esp32c3-hal/examples/spi_eh1_loopback.rs
View File

@ -43,15 +43,11 @@ fn main() -> ! {
let mosi = io.pins.gpio7;
let cs = io.pins.gpio10;
let mut spi = Spi::new(
peripherals.SPI2,
sclk,
mosi,
miso,
cs,
1000u32.kHz(),
SpiMode::Mode0,
&clocks,
let mut spi = Spi::new(peripherals.SPI2, 1000u32.kHz(), SpiMode::Mode0, &clocks).with_pins(
Some(sclk),
Some(mosi),
Some(miso),
Some(cs),
);
let mut delay = Delay::new(&clocks);

21
esp32c3-hal/examples/spi_halfduplex_read_manufacturer_id.rs
View File

@ -46,18 +46,15 @@ fn main() -> ! {
let sio3 = io.pins.gpio5;
let cs = io.pins.gpio10;
let mut spi = Spi::new_half_duplex(
peripherals.SPI2,
Some(sclk),
Some(mosi),
Some(miso),
Some(sio2),
Some(sio3),
Some(cs),
100u32.kHz(),
SpiMode::Mode0,
&clocks,
);
let mut spi = Spi::new_half_duplex(peripherals.SPI2, 100u32.kHz(), SpiMode::Mode0, &clocks)
.with_pins(
Some(sclk),
Some(mosi),
Some(miso),
Some(sio2),
Some(sio3),
Some(cs),
);
let mut delay = Delay::new(&clocks);

14
esp32c3-hal/examples/spi_loopback.rs
View File

@ -42,15 +42,11 @@ fn main() -> ! {
let mosi = io.pins.gpio7;
let cs = io.pins.gpio10;
let mut spi = Spi::new(
peripherals.SPI2,
sclk,
mosi,
miso,
cs,
100u32.kHz(),
SpiMode::Mode0,
&clocks,
let mut spi = Spi::new(peripherals.SPI2, 100u32.kHz(), SpiMode::Mode0, &clocks).with_pins(
Some(sclk),
Some(mosi),
Some(miso),
Some(cs),
);
let mut delay = Delay::new(&clocks);

24
esp32c3-hal/examples/spi_loopback_dma.rs
View File

@ -50,22 +50,14 @@ fn main() -> ! {
let mut descriptors = [0u32; 8 * 3];
let mut rx_descriptors = [0u32; 8 * 3];
let mut spi = Spi::new(
peripherals.SPI2,
sclk,
mosi,
miso,
cs,
100u32.kHz(),
SpiMode::Mode0,
&clocks,
)
.with_dma(dma_channel.configure(
false,
&mut descriptors,
&mut rx_descriptors,
DmaPriority::Priority0,
));
let mut spi = Spi::new(peripherals.SPI2, 100u32.kHz(), SpiMode::Mode0, &clocks)
.with_pins(Some(sclk), Some(mosi), Some(miso), Some(cs))
.with_dma(dma_channel.configure(
false,
&mut descriptors,
&mut rx_descriptors,
DmaPriority::Priority0,
));
let mut delay = Delay::new(&clocks);

24
esp32c6-hal/examples/embassy_spi.rs
View File

@ -77,22 +77,14 @@ async fn main(_spawner: Spawner) -> ! {
let mut descriptors = [0u32; 8 * 3];
let mut rx_descriptors = [0u32; 8 * 3];
let mut spi = Spi::new(
peripherals.SPI2,
sclk,
mosi,
miso,
cs,
100u32.kHz(),
SpiMode::Mode0,
&clocks,
)
.with_dma(dma_channel.configure(
false,
&mut descriptors,
&mut rx_descriptors,
DmaPriority::Priority0,
));
let mut spi = Spi::new(peripherals.SPI2, 100u32.kHz(), SpiMode::Mode0, &clocks)
.with_pins(Some(sclk), Some(mosi), Some(miso), Some(cs))
.with_dma(dma_channel.configure(
false,
&mut descriptors,
&mut rx_descriptors,
DmaPriority::Priority0,
));
let send_buffer = [0, 1, 2, 3, 4, 5, 6, 7];
loop {

33
esp32c6-hal/examples/qspi_flash.rs
View File

@ -54,24 +54,21 @@ fn main() -> ! {
let mut descriptors = [0u32; 8 * 3];
let mut rx_descriptors = [0u32; 8 * 3];
let mut spi = Spi::new_half_duplex(
peripherals.SPI2,
Some(sclk),
Some(mosi),
Some(miso),
Some(sio2),
Some(sio3),
Some(cs),
100u32.kHz(),
SpiMode::Mode0,
&clocks,
)
.with_dma(dma_channel.configure(
false,
&mut descriptors,
&mut rx_descriptors,
DmaPriority::Priority0,
));
let mut spi = Spi::new_half_duplex(peripherals.SPI2, 100u32.kHz(), SpiMode::Mode0, &clocks)
.with_pins(
Some(sclk),
Some(mosi),
Some(miso),
Some(sio2),
Some(sio3),
Some(cs),
)
.with_dma(dma_channel.configure(
false,
&mut descriptors,
&mut rx_descriptors,
DmaPriority::Priority0,
));
let mut delay = Delay::new(&clocks);

19
esp32c6-hal/examples/spi_eh1_device_loopback.rs
View File

@ -21,7 +21,7 @@
use embedded_hal_1::spi::SpiDevice;
use esp32c6_hal::{
clock::ClockControl,
gpio::IO,
gpio::{self, IO},
peripherals::Peripherals,
prelude::*,
spi::{
@ -44,15 +44,14 @@ fn main() -> ! {
let miso = io.pins.gpio2;
let mosi = io.pins.gpio7;
let spi_controller = SpiBusController::from_spi(Spi::new_no_cs(
peripherals.SPI2,
sclk,
mosi,
miso,
1000u32.kHz(),
SpiMode::Mode0,
&clocks,
));
let spi_controller = SpiBusController::from_spi(
Spi::new(peripherals.SPI2, 1000u32.kHz(), SpiMode::Mode0, &clocks).with_pins(
Some(sclk),
Some(mosi),
Some(miso),
gpio::NO_PIN,
),
);
let mut spi_device_1 = spi_controller.add_device(io.pins.gpio3);
let mut spi_device_2 = spi_controller.add_device(io.pins.gpio4);
let mut spi_device_3 = spi_controller.add_device(io.pins.gpio5);

14
esp32c6-hal/examples/spi_eh1_loopback.rs
View File

@ -43,15 +43,11 @@ fn main() -> ! {
let mosi = io.pins.gpio7;
let cs = io.pins.gpio10;
let mut spi = Spi::new(
peripherals.SPI2,
sclk,
mosi,
miso,
cs,
1000u32.kHz(),
SpiMode::Mode0,
&clocks,
let mut spi = Spi::new(peripherals.SPI2, 1000u32.kHz(), SpiMode::Mode0, &clocks).with_pins(
Some(sclk),
Some(mosi),
Some(miso),
Some(cs),
);
let mut delay = Delay::new(&clocks);

21
esp32c6-hal/examples/spi_halfduplex_read_manufacturer_id.rs
View File

@ -46,18 +46,15 @@ fn main() -> ! {
let sio3 = io.pins.gpio0;
let cs = io.pins.gpio1;
let mut spi = Spi::new_half_duplex(
peripherals.SPI2,
Some(sclk),
Some(mosi),
Some(miso),
Some(sio2),
Some(sio3),
Some(cs),
100u32.kHz(),
SpiMode::Mode0,
&clocks,
);
let mut spi = Spi::new_half_duplex(peripherals.SPI2, 100u32.kHz(), SpiMode::Mode0, &clocks)
.with_pins(
Some(sclk),
Some(mosi),
Some(miso),
Some(sio2),
Some(sio3),
Some(cs),
);
let mut delay = Delay::new(&clocks);

14
esp32c6-hal/examples/spi_loopback.rs
View File

@ -42,15 +42,11 @@ fn main() -> ! {
let mosi = io.pins.gpio7;
let cs = io.pins.gpio10;
let mut spi = Spi::new(
peripherals.SPI2,
sclk,
mosi,
miso,
cs,
100u32.kHz(),
SpiMode::Mode0,
&clocks,
let mut spi = Spi::new(peripherals.SPI2, 100u32.kHz(), SpiMode::Mode0, &clocks).with_pins(
Some(sclk),
Some(mosi),
Some(miso),
Some(cs),
);
let mut delay = Delay::new(&clocks);

24
esp32c6-hal/examples/spi_loopback_dma.rs
View File

@ -50,22 +50,14 @@ fn main() -> ! {
let mut descriptors = [0u32; 8 * 3];
let mut rx_descriptors = [0u32; 8 * 3];
let mut spi = Spi::new(
peripherals.SPI2,
sclk,
mosi,
miso,
cs,
100u32.kHz(),
SpiMode::Mode0,
&clocks,
)
.with_dma(dma_channel.configure(
false,
&mut descriptors,
&mut rx_descriptors,
DmaPriority::Priority0,
));
let mut spi = Spi::new(peripherals.SPI2, 100u32.kHz(), SpiMode::Mode0, &clocks)
.with_pins(Some(sclk), Some(mosi), Some(miso), Some(cs))
.with_dma(dma_channel.configure(
false,
&mut descriptors,
&mut rx_descriptors,
DmaPriority::Priority0,
));
let mut delay = Delay::new(&clocks);

24
esp32h2-hal/examples/embassy_spi.rs
View File

@ -77,22 +77,14 @@ async fn main(_spawner: Spawner) -> ! {
let mut descriptors = [0u32; 8 * 3];
let mut rx_descriptors = [0u32; 8 * 3];
let mut spi = Spi::new(
peripherals.SPI2,
sclk,
mosi,
miso,
cs,
100u32.kHz(),
SpiMode::Mode0,
&clocks,
)
.with_dma(dma_channel.configure(
false,
&mut descriptors,
&mut rx_descriptors,
DmaPriority::Priority0,
));
let mut spi = Spi::new(peripherals.SPI2, 100u32.kHz(), SpiMode::Mode0, &clocks)
.with_pins(Some(sclk), Some(mosi), Some(miso), Some(cs))
.with_dma(dma_channel.configure(
false,
&mut descriptors,
&mut rx_descriptors,
DmaPriority::Priority0,
));
let send_buffer = [0, 1, 2, 3, 4, 5, 6, 7];
loop {

33
esp32h2-hal/examples/qspi_flash.rs
View File

@ -54,24 +54,21 @@ fn main() -> ! {
let mut descriptors = [0u32; 8 * 3];
let mut rx_descriptors = [0u32; 8 * 3];
let mut spi = Spi::new_half_duplex(
peripherals.SPI2,
Some(sclk),
Some(mosi),
Some(miso),
Some(sio2),
Some(sio3),
Some(cs),
100u32.kHz(),
SpiMode::Mode0,
&clocks,
)
.with_dma(dma_channel.configure(
false,
&mut descriptors,
&mut rx_descriptors,
DmaPriority::Priority0,
));
let mut spi = Spi::new_half_duplex(peripherals.SPI2, 100u32.kHz(), SpiMode::Mode0, &clocks)
.with_pins(
Some(sclk),
Some(mosi),
Some(miso),
Some(sio2),
Some(sio3),
Some(cs),
)
.with_dma(dma_channel.configure(
false,
&mut descriptors,
&mut rx_descriptors,
DmaPriority::Priority0,
));
let mut delay = Delay::new(&clocks);

19
esp32h2-hal/examples/spi_eh1_device_loopback.rs
View File

@ -21,7 +21,7 @@
use embedded_hal_1::spi::SpiDevice;
use esp32h2_hal::{
clock::ClockControl,
gpio::IO,
gpio::{self, IO},
peripherals::Peripherals,
prelude::*,
spi::{
@ -44,15 +44,14 @@ fn main() -> ! {
let miso = io.pins.gpio2;
let mosi = io.pins.gpio3;
let spi_controller = SpiBusController::from_spi(Spi::new_no_cs(
peripherals.SPI2,
sclk,
mosi,
miso,
1000u32.kHz(),
SpiMode::Mode0,
&clocks,
));
let spi_controller = SpiBusController::from_spi(
Spi::new(peripherals.SPI2, 1000u32.kHz(), SpiMode::Mode0, &clocks).with_pins(
Some(sclk),
Some(mosi),
Some(miso),
gpio::NO_PIN,
),
);
let mut spi_device_1 = spi_controller.add_device(io.pins.gpio11);
let mut spi_device_2 = spi_controller.add_device(io.pins.gpio12);
let mut spi_device_3 = spi_controller.add_device(io.pins.gpio25);

14
esp32h2-hal/examples/spi_eh1_loopback.rs
View File

@ -43,15 +43,11 @@ fn main() -> ! {
let mosi = io.pins.gpio3;
let cs = io.pins.gpio11;
let mut spi = Spi::new(
peripherals.SPI2,
sclk,
mosi,
miso,
cs,
1000u32.kHz(),
SpiMode::Mode0,
&clocks,
let mut spi = Spi::new(peripherals.SPI2, 1000u32.kHz(), SpiMode::Mode0, &clocks).with_pins(
Some(sclk),
Some(mosi),
Some(miso),
Some(cs),
);
let mut delay = Delay::new(&clocks);

21
esp32h2-hal/examples/spi_halfduplex_read_manufacturer_id.rs
View File

@ -46,18 +46,15 @@ fn main() -> ! {
let sio3 = io.pins.gpio5;
let cs = io.pins.gpio11;
let mut spi = Spi::new_half_duplex(
peripherals.SPI2,
Some(sclk),
Some(mosi),
Some(miso),
Some(sio2),
Some(sio3),
Some(cs),
100u32.kHz(),
SpiMode::Mode0,
&clocks,
);
let mut spi = Spi::new_half_duplex(peripherals.SPI2, 100u32.kHz(), SpiMode::Mode0, &clocks)
.with_pins(
Some(sclk),
Some(mosi),
Some(miso),
Some(sio2),
Some(sio3),
Some(cs),
);
let mut delay = Delay::new(&clocks);

14
esp32h2-hal/examples/spi_loopback.rs
View File

@ -42,15 +42,11 @@ fn main() -> ! {
let mosi = io.pins.gpio3;
let cs = io.pins.gpio11;
let mut spi = Spi::new(
peripherals.SPI2,
sclk,
mosi,
miso,
cs,
100u32.kHz(),
SpiMode::Mode0,
&clocks,
let mut spi = Spi::new(peripherals.SPI2, 100u32.kHz(), SpiMode::Mode0, &clocks).with_pins(
Some(sclk),
Some(mosi),
Some(miso),
Some(cs),
);
let mut delay = Delay::new(&clocks);

24
esp32h2-hal/examples/spi_loopback_dma.rs
View File

@ -50,22 +50,14 @@ fn main() -> ! {
let mut descriptors = [0u32; 8 * 3];
let mut rx_descriptors = [0u32; 8 * 3];
let mut spi = Spi::new(
peripherals.SPI2,
sclk,
mosi,
miso,
cs,
100u32.kHz(),
SpiMode::Mode0,
&clocks,
)
.with_dma(dma_channel.configure(
false,
&mut descriptors,
&mut rx_descriptors,
DmaPriority::Priority0,
));
let mut spi = Spi::new(peripherals.SPI2, 100u32.kHz(), SpiMode::Mode0, &clocks)
.with_pins(Some(sclk), Some(mosi), Some(miso), Some(cs))
.with_dma(dma_channel.configure(
false,
&mut descriptors,
&mut rx_descriptors,
DmaPriority::Priority0,
));
let mut delay = Delay::new(&clocks);

24
esp32s2-hal/examples/embassy_spi.rs
View File

@ -72,22 +72,14 @@ async fn main(_spawner: Spawner) -> ! {
let mut descriptors = [0u32; 8 * 3];
let mut rx_descriptors = [0u32; 8 * 3];
let mut spi = Spi::new(
peripherals.SPI2,
sclk,
mosi,
miso,
cs,
100u32.kHz(),
SpiMode::Mode0,
&clocks,
)
.with_dma(dma_channel.configure(
false,
&mut descriptors,
&mut rx_descriptors,
DmaPriority::Priority0,
));
let mut spi = Spi::new(peripherals.SPI2, 100u32.kHz(), SpiMode::Mode0, &clocks)
.with_pins(Some(sclk), Some(mosi), Some(miso), Some(cs))
.with_dma(dma_channel.configure(
false,
&mut descriptors,
&mut rx_descriptors,
DmaPriority::Priority0,
));
let send_buffer = [0, 1, 2, 3, 4, 5, 6, 7];
loop {

33
esp32s2-hal/examples/qspi_flash.rs
View File

@ -54,24 +54,21 @@ fn main() -> ! {
let mut descriptors = [0u32; 8 * 3];
let mut rx_descriptors = [0u32; 8 * 3];
let mut spi = Spi::new_half_duplex(
peripherals.SPI2,
Some(sclk),
Some(mosi),
Some(miso),
Some(sio2),
Some(sio3),
Some(cs),
100u32.kHz(),
SpiMode::Mode0,
&clocks,
)
.with_dma(dma_channel.configure(
false,
&mut descriptors,
&mut rx_descriptors,
DmaPriority::Priority0,
));
let mut spi = Spi::new_half_duplex(peripherals.SPI2, 100u32.kHz(), SpiMode::Mode0, &clocks)
.with_pins(
Some(sclk),
Some(mosi),
Some(miso),
Some(sio2),
Some(sio3),
Some(cs),
)
.with_dma(dma_channel.configure(
false,
&mut descriptors,
&mut rx_descriptors,
DmaPriority::Priority0,
));
let mut delay = Delay::new(&clocks);

19
esp32s2-hal/examples/spi_eh1_device_loopback.rs
View File

@ -21,7 +21,7 @@
use embedded_hal_1::spi::SpiDevice;
use esp32s2_hal::{
clock::ClockControl,
gpio::IO,
gpio::{self, IO},
peripherals::Peripherals,
prelude::*,
spi::{
@ -44,15 +44,14 @@ fn main() -> ! {
let miso = io.pins.gpio37;
let mosi = io.pins.gpio35;
let spi_controller = SpiBusController::from_spi(Spi::new_no_cs(
peripherals.SPI2,
sclk,
mosi,
miso,
1000u32.kHz(),
SpiMode::Mode0,
&clocks,
));
let spi_controller = SpiBusController::from_spi(
Spi::new(peripherals.SPI2, 1000u32.kHz(), SpiMode::Mode0, &clocks).with_pins(
Some(sclk),
Some(mosi),
Some(miso),
gpio::NO_PIN,
),
);
let mut spi_device_1 = spi_controller.add_device(io.pins.gpio1);
let mut spi_device_2 = spi_controller.add_device(io.pins.gpio2);
let mut spi_device_3 = spi_controller.add_device(io.pins.gpio3);

14
esp32s2-hal/examples/spi_eh1_loopback.rs
View File

@ -43,15 +43,11 @@ fn main() -> ! {
let mosi = io.pins.gpio35;
let cs = io.pins.gpio34;
let mut spi = Spi::new(
peripherals.SPI2,
sclk,
mosi,
miso,
cs,
1000u32.kHz(),
SpiMode::Mode0,
&clocks,
let mut spi = Spi::new(peripherals.SPI2, 1000u32.kHz(), SpiMode::Mode0, &clocks).with_pins(
Some(sclk),
Some(mosi),
Some(miso),
Some(cs),
);
let mut delay = Delay::new(&clocks);

21
esp32s2-hal/examples/spi_halfduplex_read_manufacturer_id.rs
View File

@ -46,18 +46,15 @@ fn main() -> ! {
let sio3 = io.pins.gpio15;
let cs = io.pins.gpio16;
let mut spi = Spi::new_half_duplex(
peripherals.SPI2,
Some(sclk),
Some(mosi),
Some(miso),
Some(sio2),
Some(sio3),
Some(cs),
100u32.kHz(),
SpiMode::Mode0,
&clocks,
);
let mut spi = Spi::new_half_duplex(peripherals.SPI2, 100u32.kHz(), SpiMode::Mode0, &clocks)
.with_pins(
Some(sclk),
Some(mosi),
Some(miso),
Some(sio2),
Some(sio3),
Some(cs),
);
let mut delay = Delay::new(&clocks);

14
esp32s2-hal/examples/spi_loopback.rs
View File

@ -42,15 +42,11 @@ fn main() -> ! {
let mosi = io.pins.gpio35;
let cs = io.pins.gpio34;
let mut spi = Spi::new(
peripherals.SPI2,
sclk,
mosi,
miso,
cs,
100u32.kHz(),
SpiMode::Mode0,
&clocks,
let mut spi = Spi::new(peripherals.SPI2, 100u32.kHz(), SpiMode::Mode0, &clocks).with_pins(
Some(sclk),
Some(mosi),
Some(miso),
Some(cs),
);
let mut delay = Delay::new(&clocks);

24
esp32s2-hal/examples/spi_loopback_dma.rs
View File

@ -50,22 +50,14 @@ fn main() -> ! {
let mut descriptors = [0u32; 8 * 3];
let mut rx_descriptors = [0u32; 8 * 3];
let mut spi = Spi::new(
peripherals.SPI2,
sclk,
mosi,
miso,
cs,
100u32.kHz(),
SpiMode::Mode0,
&clocks,
)
.with_dma(dma_channel.configure(
false,
&mut descriptors,
&mut rx_descriptors,
DmaPriority::Priority0,
));
let mut spi = Spi::new(peripherals.SPI2, 100u32.kHz(), SpiMode::Mode0, &clocks)
.with_pins(Some(sclk), Some(mosi), Some(miso), Some(cs))
.with_dma(dma_channel.configure(
false,
&mut descriptors,
&mut rx_descriptors,
DmaPriority::Priority0,
));
let mut delay = Delay::new(&clocks);

24
esp32s3-hal/examples/embassy_spi.rs
View File

@ -77,22 +77,14 @@ async fn main(_spawner: Spawner) -> ! {
let mut descriptors = [0u32; 8 * 3];
let mut rx_descriptors = [0u32; 8 * 3];
let mut spi = Spi::new(
peripherals.SPI3,
sclk,
mosi,
miso,
cs,
100u32.kHz(),
SpiMode::Mode0,
&clocks,
)
.with_dma(dma_channel.configure(
false,
&mut descriptors,
&mut rx_descriptors,
DmaPriority::Priority0,
));
let mut spi = Spi::new(peripherals.SPI3, 100u32.kHz(), SpiMode::Mode0, &clocks)
.with_pins(Some(sclk), Some(mosi), Some(miso), Some(cs))
.with_dma(dma_channel.configure(
false,
&mut descriptors,
&mut rx_descriptors,
DmaPriority::Priority0,
));
let send_buffer = [0, 1, 2, 3, 4, 5, 6, 7];
loop {

33
esp32s3-hal/examples/qspi_flash.rs
View File

@ -54,24 +54,21 @@ fn main() -> ! {
let mut descriptors = [0u32; 8 * 3];
let mut rx_descriptors = [0u32; 8 * 3];
let mut spi = Spi::new_half_duplex(
peripherals.SPI2,
Some(sclk),
Some(mosi),
Some(miso),
Some(sio2),
Some(sio3),
Some(cs),
100u32.kHz(),
SpiMode::Mode0,
&clocks,
)
.with_dma(dma_channel.configure(
false,
&mut descriptors,
&mut rx_descriptors,
DmaPriority::Priority0,
));
let mut spi = Spi::new_half_duplex(peripherals.SPI2, 100u32.kHz(), SpiMode::Mode0, &clocks)
.with_pins(
Some(sclk),
Some(mosi),
Some(miso),
Some(sio2),
Some(sio3),
Some(cs),
)
.with_dma(dma_channel.configure(
false,
&mut descriptors,
&mut rx_descriptors,
DmaPriority::Priority0,
));
let mut delay = Delay::new(&clocks);

19
esp32s3-hal/examples/spi_eh1_device_loopback.rs
View File

@ -21,7 +21,7 @@
use embedded_hal_1::spi::SpiDevice;
use esp32s3_hal::{
clock::ClockControl,
gpio::IO,
gpio::{self, IO},
peripherals::Peripherals,
prelude::*,
spi::{
@ -44,15 +44,14 @@ fn main() -> ! {
let miso = io.pins.gpio11;
let mosi = io.pins.gpio13;
let spi_controller = SpiBusController::from_spi(Spi::new_no_cs(
peripherals.SPI2,
sclk,
mosi,
miso,
1000u32.kHz(),
SpiMode::Mode0,
&clocks,
));
let spi_controller = SpiBusController::from_spi(
Spi::new(peripherals.SPI2, 1000u32.kHz(), SpiMode::Mode0, &clocks).with_pins(
Some(sclk),
Some(mosi),
Some(miso),
gpio::NO_PIN,
),
);
let mut spi_device_1 = spi_controller.add_device(io.pins.gpio4);
let mut spi_device_2 = spi_controller.add_device(io.pins.gpio5);
let mut spi_device_3 = spi_controller.add_device(io.pins.gpio6);

14
esp32s3-hal/examples/spi_eh1_loopback.rs
View File

@ -43,15 +43,11 @@ fn main() -> ! {
let mosi = io.pins.gpio13;
let cs = io.pins.gpio10;
let mut spi = Spi::new(
peripherals.SPI2,
sclk,
mosi,
miso,
cs,
1000u32.kHz(),
SpiMode::Mode0,
&clocks,
let mut spi = Spi::new(peripherals.SPI2, 1000u32.kHz(), SpiMode::Mode0, &clocks).with_pins(
Some(sclk),
Some(mosi),
Some(miso),
Some(cs),
);
let mut delay = Delay::new(&clocks);

21
esp32s3-hal/examples/spi_halfduplex_read_manufacturer_id.rs
View File

@ -46,18 +46,15 @@ fn main() -> ! {
let sio3 = io.pins.gpio15;
let cs = io.pins.gpio16;
let mut spi = Spi::new_half_duplex(
peripherals.SPI2,
Some(sclk),
Some(mosi),
Some(miso),
Some(sio2),
Some(sio3),
Some(cs),
100u32.kHz(),
SpiMode::Mode0,
&clocks,
);
let mut spi = Spi::new_half_duplex(peripherals.SPI2, 100u32.kHz(), SpiMode::Mode0, &clocks)
.with_pins(
Some(sclk),
Some(mosi),
Some(miso),
Some(sio2),
Some(sio3),
Some(cs),
);
let mut delay = Delay::new(&clocks);

14
esp32s3-hal/examples/spi_loopback.rs
View File

@ -42,15 +42,11 @@ fn main() -> ! {
let mosi = io.pins.gpio13;
let cs = io.pins.gpio10;
let mut spi = Spi::new(
peripherals.SPI2,
sclk,
mosi,
miso,
cs,
100u32.kHz(),
SpiMode::Mode0,
&clocks,
let mut spi = Spi::new(peripherals.SPI2, 100u32.kHz(), SpiMode::Mode0, &clocks).with_pins(
Some(sclk),
Some(mosi),
Some(miso),
Some(cs),
);
let mut delay = Delay::new(&clocks);

24
esp32s3-hal/examples/spi_loopback_dma.rs
View File

@ -50,22 +50,14 @@ fn main() -> ! {
let mut descriptors = [0u32; 8 * 3];
let mut rx_descriptors = [0u32; 8 * 3];
let mut spi = Spi::new(
peripherals.SPI2,
sclk,
mosi,
miso,
cs,
100u32.kHz(),
SpiMode::Mode0,
&clocks,
)
.with_dma(dma_channel.configure(
false,
&mut descriptors,
&mut rx_descriptors,
DmaPriority::Priority0,
));
let mut spi = Spi::new(peripherals.SPI2, 100u32.kHz(), SpiMode::Mode0, &clocks)
.with_pins(Some(sclk), Some(mosi), Some(miso), Some(cs))
.with_dma(dma_channel.configure(
false,
&mut descriptors,
&mut rx_descriptors,
DmaPriority::Priority0,
));
let mut delay = Delay::new(&clocks);