Explicitly set unstable feature in HIL tests

hil-test/Cargo.toml

@@ -206,7 +206,7 @@ embedded-hal-async = "1.0.0"
 embedded-hal-nb    = "1.0.0"
 esp-alloc          = { path = "../esp-alloc", optional = true }
 esp-backtrace      = { path = "../esp-backtrace", default-features = false, features = ["exception-handler", "defmt", "semihosting"] }
-esp-hal            = { path = "../esp-hal", features = ["digest", "unstable"], optional = true }
+esp-hal            = { path = "../esp-hal", features = ["digest"], optional = true }
 esp-hal-embassy    = { path = "../esp-hal-embassy", optional = true }
 esp-wifi           = { path = "../esp-wifi", optional = true, features = ["wifi"] }
 portable-atomic    = "1.9.0"
@@ -235,6 +235,7 @@ esp-metadata = { path = "../esp-metadata" }
 
 [features]
 default = ["embassy"]
+unstable = ["esp-hal/unstable"]
 
 defmt = ["dep:defmt-rtt", "esp-hal/defmt", "embedded-test/defmt"]
 

hil-test/tests/aes.rs

@@ -1,6 +1,7 @@
 //! AES Test
 
 //% CHIPS: esp32 esp32c3 esp32c6 esp32h2 esp32s2 esp32s3
+//% FEATURES: unstable
 
 #![no_std]
 #![no_main]

hil-test/tests/aes_dma.rs

@@ -1,6 +1,7 @@
 //! AES DMA Test
 
 //% CHIPS: esp32c3 esp32c6 esp32h2 esp32s2 esp32s3
+//% FEATURES: unstable
 
 #![no_std]
 #![no_main]

hil-test/tests/clock_monitor.rs

@@ -1,6 +1,7 @@
 //! Clock Monitor Test
 
 //% CHIPS: esp32 esp32c2 esp32c3 esp32c6 esp32h2 esp32s2 esp32s3
+//% FEATURES: unstable
 
 #![no_std]
 #![no_main]

hil-test/tests/crc.rs

@@ -1,6 +1,7 @@
 //! CRC and MD5 Tests
 
 //% CHIPS: esp32 esp32c2 esp32c3 esp32c6 esp32h2 esp32s2 esp32s3
+//% FEATURES: unstable
 
 #![no_std]
 #![no_main]

hil-test/tests/critical_section.rs

@@ -1,6 +1,7 @@
 //! Ensure invariants of locks are upheld.
 
 //% CHIPS: esp32 esp32c2 esp32c3 esp32c6 esp32h2 esp32s2 esp32s3
+//% FEATURES: unstable
 
 // TODO: add multi-core tests
 

hil-test/tests/delay.rs

@@ -1,6 +1,7 @@
 //! Delay Test
 
 //% CHIPS: esp32 esp32c2 esp32c3 esp32c6 esp32h2 esp32s2 esp32s3
+//% FEATURES: unstable
 
 #![no_std]
 #![no_main]

hil-test/tests/delay_async.rs

@@ -4,6 +4,7 @@
 //! `embedded_hal_async::delay::DelayNs` trait.
 
 //% CHIPS: esp32 esp32c2 esp32c3 esp32c6 esp32h2 esp32s2 esp32s3
+//% FEATURES: unstable
 
 #![no_std]
 #![no_main]

hil-test/tests/dma_macros.rs

@@ -1,6 +1,7 @@
 //! DMA macro tests
 
 //% CHIPS: esp32 esp32c2 esp32c3 esp32c6 esp32h2 esp32s2 esp32s3
+//% FEATURES: unstable
 
 #![no_std]
 #![no_main]

hil-test/tests/dma_mem2mem.rs

@@ -1,6 +1,7 @@
 //! DMA Mem2Mem Tests
 
 //% CHIPS: esp32c2 esp32c3 esp32c6 esp32h2 esp32s3
+//% FEATURES: unstable
 
 #![no_std]
 #![no_main]

hil-test/tests/ecc.rs

@@ -1,6 +1,7 @@
 //! ECC Test
 
 //% CHIPS: esp32c2 esp32c6 esp32h2
+//% FEATURES: unstable
 
 #![no_std]
 #![no_main]

hil-test/tests/embassy_interrupt_executor.rs

@@ -2,8 +2,8 @@
 //! code.
 
 //% CHIPS: esp32 esp32c2 esp32c3 esp32c6 esp32h2 esp32s2 esp32s3
-//% FEATURES: integrated-timers
+//% FEATURES: unstable integrated-timers
-//% FEATURES: generic-queue
+//% FEATURES: unstable generic-queue
 
 #![no_std]
 #![no_main]

hil-test/tests/embassy_interrupt_spi_dma.rs

@@ -1,8 +1,8 @@
 //! Reproduction and regression test for a sneaky issue.
 
 //% CHIPS: esp32 esp32s2 esp32s3 esp32c3 esp32c6 esp32h2
-//% FEATURES: integrated-timers
+//% FEATURES: unstable integrated-timers
-//% FEATURES: generic-queue
+//% FEATURES: unstable generic-queue
 
 #![no_std]
 #![no_main]

hil-test/tests/embassy_timers_executors.rs

@@ -1,8 +1,8 @@
 //! Embassy timer and executor Test
 
 //% CHIPS: esp32 esp32c2 esp32c3 esp32c6 esp32h2 esp32s2 esp32s3
-//% FEATURES: integrated-timers
+//% FEATURES: unstable integrated-timers
-//% FEATURES: generic-queue
+//% FEATURES: unstable generic-queue
 
 #![no_std]
 #![no_main]

hil-test/tests/esp_wifi_floats.rs

@@ -1,7 +1,7 @@
 //! Cp0Disable exception regression test
 
 //% CHIPS: esp32 esp32s2 esp32s3
-//% FEATURES: esp-wifi esp-alloc
+//% FEATURES: unstable esp-wifi esp-alloc
 
 #![no_std]
 #![no_main]

hil-test/tests/get_time.rs

@@ -1,6 +1,7 @@
 //! time::now Test
 
 //% CHIPS: esp32 esp32c2 esp32c3 esp32c6 esp32h2 esp32s2 esp32s3
+//% FEATURES: unstable
 
 #![no_std]
 #![no_main]

hil-test/tests/gpio.rs

@@ -1,7 +1,7 @@
 //! GPIO Test
 
 //% CHIPS: esp32 esp32c2 esp32c3 esp32c6 esp32h2 esp32s2 esp32s3
-//% FEATURES: generic-queue
+//% FEATURES: unstable generic-queue
 
 #![no_std]
 #![no_main]
@@ -58,8 +58,11 @@ mod tests {
 
         let (gpio1, gpio2) = hil_test::common_test_pins!(peripherals);
 
+        #[cfg(feature = "unstable")]
+        {
             let timg0 = TimerGroup::new(peripherals.TIMG0);
             esp_hal_embassy::init(timg0.timer0);
+        }
 
         Context {
             test_gpio1: gpio1.degrade(),
@@ -147,53 +150,6 @@ mod tests {
         assert_eq!(test_gpio2.is_set_high(), true);
     }
 
-    #[test]
-    fn gpio_output_embedded_hal_0_2(ctx: Context) {
-        let test_gpio1 = Input::new(ctx.test_gpio1, Pull::Down);
-        let mut test_gpio2 = Output::new(ctx.test_gpio2, Level::Low);
-
-        fn set<T>(pin: &mut T, state: bool)
-        where
-            T: embedded_hal::digital::OutputPin,
-        {
-            if state {
-                pin.set_high().ok();
-            } else {
-                pin.set_low().ok();
-            }
-        }
-
-        fn toggle<T>(pin: &mut T)
-        where
-            T: embedded_hal::digital::StatefulOutputPin,
-        {
-            pin.toggle().ok();
-        }
-
-        // `StatefulOutputPin`:
-        assert_eq!(test_gpio2.is_set_low(), true);
-        assert_eq!(test_gpio2.is_set_high(), false);
-        assert_eq!(test_gpio1.is_low(), true);
-        assert_eq!(test_gpio1.is_high(), false);
-        set(&mut test_gpio2, true);
-        assert_eq!(test_gpio2.is_set_low(), false);
-        assert_eq!(test_gpio2.is_set_high(), true);
-        assert_eq!(test_gpio1.is_low(), false);
-        assert_eq!(test_gpio1.is_high(), true);
-
-        // `ToggleableOutputPin`:
-        toggle(&mut test_gpio2);
-        assert_eq!(test_gpio2.is_set_low(), true);
-        assert_eq!(test_gpio2.is_set_high(), false);
-        assert_eq!(test_gpio1.is_low(), true);
-        assert_eq!(test_gpio1.is_high(), false);
-        toggle(&mut test_gpio2);
-        assert_eq!(test_gpio2.is_set_low(), false);
-        assert_eq!(test_gpio2.is_set_high(), true);
-        assert_eq!(test_gpio1.is_low(), false);
-        assert_eq!(test_gpio1.is_high(), true);
-    }
-
     #[test]
     fn gpio_output_embedded_hal_1_0(ctx: Context) {
         let test_gpio1 = Input::new(ctx.test_gpio1, Pull::Down);
@@ -242,6 +198,7 @@ mod tests {
     }
 
     #[test]
+    #[cfg(feature = "unstable")]
     fn gpio_interrupt(ctx: Context) {
         let mut test_gpio1 = Input::new(ctx.test_gpio1, Pull::Down);
         let mut test_gpio2 = Output::new(ctx.test_gpio2, Level::Low);
@@ -325,6 +282,7 @@ mod tests {
     }
 
     #[test]
+    #[cfg(feature = "unstable")]
     fn gpio_flex(ctx: Context) {
         let mut test_gpio1 = Flex::new(ctx.test_gpio1);
         let mut test_gpio2 = Flex::new(ctx.test_gpio2);
@@ -401,6 +359,7 @@ mod tests {
     }
 
     #[test]
+    #[cfg(feature = "unstable")]
     fn interrupt_executor_is_not_frozen(ctx: Context) {
         use esp_hal::interrupt::{software::SoftwareInterrupt, Priority};
         use esp_hal_embassy::InterruptExecutor;

hil-test/tests/gpio_custom_handler.rs

@@ -6,7 +6,7 @@
 //! async API works for user handlers automatically.
 
 //% CHIPS: esp32 esp32c2 esp32c3 esp32c6 esp32h2 esp32s2 esp32s3
-//% FEATURES: integrated-timers
+//% FEATURES: unstable integrated-timers
 
 #![no_std]
 #![no_main]

hil-test/tests/i2c.rs

@@ -1,6 +1,7 @@
 //! I2C test
 
 //% CHIPS: esp32 esp32c2 esp32c3 esp32c6 esp32h2 esp32s2 esp32s3
+//% FEATURES: unstable
 
 #![no_std]
 #![no_main]

hil-test/tests/i2s.rs

@@ -4,7 +4,7 @@
 //! with loopback mode enabled).
 
 //% CHIPS: esp32c3 esp32c6 esp32h2 esp32s2 esp32s3
-//% FEATURES: generic-queue
+//% FEATURES: unstable generic-queue
 // FIXME: re-enable on ESP32 when it no longer fails spuriously
 
 #![no_std]

hil-test/tests/init.rs

@@ -1,6 +1,7 @@
 //! Initialization tests
 
 //% CHIPS: esp32 esp32c2 esp32c3 esp32c6 esp32h2 esp32s2 esp32s3
+//% FEATURES: unstable
 
 #![no_std]
 #![no_main]

hil-test/tests/interrupt.rs

@@ -3,6 +3,7 @@
 //! "Disabled" for now - see https://github.com/esp-rs/esp-hal/pull/1635#issuecomment-2137405251
 
 //% CHIPS: esp32c2 esp32c3 esp32c6 esp32h2
+//% FEATURES: unstable
 
 #![no_std]
 #![no_main]

hil-test/tests/lcd_cam.rs

@@ -1,6 +1,7 @@
 //! LCD_CAM Camera and DPI tests
 
 //% CHIPS: esp32s3
+//% FEATURES: unstable
 
 #![no_std]
 #![no_main]

hil-test/tests/lcd_cam_i8080.rs

@@ -1,6 +1,7 @@
 //! lcd_cam i8080 tests
 
 //% CHIPS: esp32s3
+//% FEATURES: unstable
 
 #![no_std]
 #![no_main]

hil-test/tests/lcd_cam_i8080_async.rs

@@ -1,7 +1,7 @@
 //! lcd_cam i8080 tests
 
 //% CHIPS: esp32s3
-//% FEATURES: generic-queue
+//% FEATURES: unstable generic-queue
 
 #![no_std]
 #![no_main]

hil-test/tests/parl_io_tx.rs

@@ -1,6 +1,8 @@
 //! PARL_IO TX test
 
 //% CHIPS: esp32c6 esp32h2
+//% FEATURES: unstable
+
 #![no_std]
 #![no_main]
 

hil-test/tests/parl_io_tx_async.rs

@@ -1,7 +1,7 @@
 //! PARL_IO TX async test
 
 //% CHIPS: esp32c6 esp32h2
-//% FEATURES: generic-queue
+//% FEATURES: unstable generic-queue
 
 #![no_std]
 #![no_main]

hil-test/tests/pcnt.rs

@@ -1,6 +1,7 @@
 //! PCNT tests
 
 //% CHIPS: esp32 esp32c6 esp32h2 esp32s2 esp32s3
+//% FEATURES: unstable
 
 #![no_std]
 #![no_main]

hil-test/tests/qspi.rs

@@ -1,6 +1,7 @@
 //! QSPI Test Suite
 
 //% CHIPS: esp32 esp32c2 esp32c3 esp32c6 esp32h2 esp32s2 esp32s3
+//% FEATURES: unstable
 
 #![no_std]
 #![no_main]

hil-test/tests/rmt.rs

@@ -1,6 +1,7 @@
 //! RMT Loopback Test
 
 //% CHIPS: esp32 esp32c3 esp32c6 esp32h2 esp32s2 esp32s3
+//% FEATURES: unstable
 
 #![no_std]
 #![no_main]

hil-test/tests/rsa.rs

@@ -1,6 +1,7 @@
 //! RSA Test
 
 //% CHIPS: esp32 esp32c3 esp32c6 esp32h2 esp32s2 esp32s3
+//% FEATURES: unstable
 
 #![no_std]
 #![no_main]

hil-test/tests/rsa_async.rs

@@ -1,6 +1,7 @@
 //! Async RSA Test
 
 //% CHIPS: esp32 esp32c3 esp32c6 esp32h2 esp32s2 esp32s3
+//% FEATURES: unstable
 
 #![no_std]
 #![no_main]

hil-test/tests/sha.rs

@@ -1,6 +1,7 @@
 //! SHA Test
 
 //% CHIPS: esp32 esp32c2 esp32c3 esp32c6 esp32h2 esp32s2 esp32s3
+//% FEATURES: unstable
 
 #![no_std]
 #![no_main]

hil-test/tests/spi_full_duplex.rs

@@ -1,7 +1,7 @@
 //! SPI Full Duplex test suite.
 
 //% CHIPS: esp32 esp32c2 esp32c3 esp32c6 esp32h2 esp32s2 esp32s3
-//% FEATURES: generic-queue
+//% FEATURES: unstable generic-queue
 
 // FIXME: add async test cases that don't rely on PCNT
 

hil-test/tests/spi_half_duplex_read.rs

@@ -1,6 +1,7 @@
 //! SPI Half Duplex Read Test
 
 //% CHIPS: esp32 esp32c2 esp32c3 esp32c6 esp32h2 esp32s2 esp32s3
+//% FEATURES: unstable
 
 #![no_std]
 #![no_main]

hil-test/tests/spi_half_duplex_write.rs

@@ -1,6 +1,7 @@
 //! SPI Half Duplex Write Test
 
 //% CHIPS: esp32 esp32c6 esp32h2 esp32s2 esp32s3
+//% FEATURES: unstable
 
 #![no_std]
 #![no_main]

hil-test/tests/spi_half_duplex_write_psram.rs

@@ -1,6 +1,7 @@
 //! SPI Half Duplex Write Test
-//% FEATURES: octal-psram
+
 //% CHIPS: esp32s3
+//% FEATURES: unstable octal-psram
 
 #![no_std]
 #![no_main]

hil-test/tests/spi_slave.rs

@@ -4,6 +4,7 @@
 //! testing Mode 1.
 
 //% CHIPS: esp32 esp32c2 esp32c3 esp32c6 esp32h2 esp32s2 esp32s3
+//% FEATURES: unstable
 
 #![no_std]
 #![no_main]

hil-test/tests/systimer.rs

@@ -2,6 +2,7 @@
 
 // esp32 disabled as it does not have a systimer
 //% CHIPS: esp32c2 esp32c3 esp32c6 esp32h2 esp32s2 esp32s3
+//% FEATURES: unstable
 
 #![no_std]
 #![no_main]

hil-test/tests/twai.rs

@@ -1,6 +1,7 @@
 //! TWAI test
 
 //% CHIPS: esp32 esp32c3 esp32c6 esp32h2 esp32s2 esp32s3
+//% FEATURES: unstable
 
 #![no_std]
 #![no_main]

hil-test/tests/uart.rs

@@ -1,6 +1,7 @@
 //! UART Test
 
 //% CHIPS: esp32 esp32c2 esp32c3 esp32c6 esp32h2 esp32s2 esp32s3
+//% FEATURES: unstable
 
 #![no_std]
 #![no_main]

hil-test/tests/uart_async.rs

@@ -1,7 +1,7 @@
 //! UART Test
 
 //% CHIPS: esp32 esp32c2 esp32c3 esp32c6 esp32h2 esp32s2 esp32s3
-//% FEATURES: generic-queue
+//% FEATURES: unstable generic-queue
 
 #![no_std]
 #![no_main]

hil-test/tests/uart_regression.rs

@@ -1,6 +1,7 @@
 //! Misc UART TX/RX regression tests
 
 //% CHIPS: esp32 esp32c2 esp32c3 esp32c6 esp32h2 esp32s2 esp32s3
+//% FEATURES: unstable
 
 #![no_std]
 #![no_main]

hil-test/tests/uart_tx_rx.rs

@@ -1,6 +1,7 @@
 //! UART TX/RX Test
 
 //% CHIPS: esp32 esp32c2 esp32c3 esp32c6 esp32h2 esp32s2 esp32s3
+//% FEATURES: unstable
 
 #![no_std]
 #![no_main]

hil-test/tests/uart_tx_rx_async.rs

@@ -1,7 +1,7 @@
 //! UART TX/RX Async Test
 
 //% CHIPS: esp32 esp32c2 esp32c3 esp32c6 esp32h2 esp32s2 esp32s3
-//% FEATURES: generic-queue
+//% FEATURES: unstable generic-queue
 
 #![no_std]
 #![no_main]

hil-test/tests/usb_serial_jtag.rs

@@ -1,6 +1,7 @@
 //! USB Serial JTAG tests
 
 //% CHIPS: esp32c3 esp32c6 esp32h2 esp32s3
+//% FEATURES: unstable
 
 #![no_std]
 #![no_main]