GetLitFam/esp-hal
1
0
Fork 0
Code Issues Pull Requests Actions 1 Packages Projects Releases Wiki Activity

Fix naming violations for spi::Mode enum variants (#2902)

Browse Source 
* Fix naming violations for `spi::Mode`

* Update migration guide

* Update `CHANGELOG.md`
This commit is contained in:
Jesse Braham 2025-01-07 07:55:19 -08:00 committed by GitHub
parent 66d2effee2
commit bb406cec6b
No known key found for this signature in database
GPG Key ID: B5690EEEBB952194
18 changed files with 47 additions and 38 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
esp-hal/CHANGELOG.md
View File

@ -95,6 +95,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
- UART: Fix naming violations for `DataBits`, `Parity`, and `StopBits` enum variants (#2893)
- UART: Remove blocking version of `read_bytes` and rename `drain_fifo` to `read_bytes` instead (#2895)
- Renamed variants of `CpuClock`, made the enum non-exhaustive (#2899)
- SPI: Fix naming violations for `Mode` enum variants (#2902)
### Fixed

11
esp-hal/MIGRATING-0.22.md
View File

@ -245,7 +245,7 @@ is not compatible with the hardware.
peripherals.SPI2,
Config {
frequency: 100.kHz(),
mode: SpiMode::Mode0,
mode: SpiMode::_0,
..Config::default()
},
-);
@ -405,3 +405,12 @@ The specific CPU clock variants are renamed from e.g. `Clock80MHz` to `_80MHz`.
```
Additionally the enum is marked as non-exhaustive.
## SPI Modes
The SPI mode variants are renamed from e.g. `Mode0` to `_0`.
```diff
- Mode::Mode0
+ Mode::_0
```

2
esp-hal/src/dma/mod.rs
View File

@ -28,7 +28,7 @@
//!
//! let mut spi = Spi::new(
//! peripherals.SPI2,
//! Config::default().with_frequency(100.kHz()).with_mode(Mode::Mode0)
//! Config::default().with_frequency(100.kHz()).with_mode(Mode::_0)
//! )
//! .unwrap()
//! .with_sck(sclk)

8
esp-hal/src/spi/master.rs
View File

@ -44,7 +44,7 @@
//!
//! let mut spi = Spi::new(
//! peripherals.SPI2,
//! Config::default().with_frequency(100.kHz()).with_mode(Mode::Mode0)
//! Config::default().with_frequency(100.kHz()).with_mode(Mode::_0)
//! )
//! .unwrap()
//! .with_sck(sclk)
@ -469,7 +469,7 @@ impl Default for Config {
use fugit::RateExtU32;
Config {
frequency: 1_u32.MHz(),
mode: Mode::Mode0,
mode: Mode::_0,
read_bit_order: BitOrder::MsbFirst,
write_bit_order: BitOrder::MsbFirst,
}
@ -2945,11 +2945,11 @@ impl Driver {
pin_reg.modify(|_, w| {
w.ck_idle_edge()
.bit(matches!(data_mode, Mode::Mode2 | Mode::Mode3))
.bit(matches!(data_mode, Mode::_2 | Mode::_3))
});
reg_block.user().modify(|_, w| {
w.ck_out_edge()
.bit(matches!(data_mode, Mode::Mode1 | Mode::Mode2))
.bit(matches!(data_mode, Mode::_1 | Mode::_2))
});
}

8
esp-hal/src/spi/mod.rs
View File

@ -71,16 +71,16 @@ impl embedded_hal::spi::Error for Error {
pub enum Mode {
/// Mode 0 (CPOL = 0, CPHA = 0): Clock is low when idle, data is captured on
/// the rising edge and propagated on the falling edge.
Mode0,
_0,
/// Mode 1 (CPOL = 0, CPHA = 1): Clock is low when idle, data is captured on
/// the falling edge and propagated on the rising edge.
Mode1,
_1,
/// Mode 2 (CPOL = 1, CPHA = 0): Clock is high when idle, data is captured
/// on the falling edge and propagated on the rising edge.
Mode2,
_2,
/// Mode 3 (CPOL = 1, CPHA = 1): Clock is high when idle, data is captured
/// on the rising edge and propagated on the falling edge.
Mode3,
_3,
}
/// SPI Bit Order

27
esp-hal/src/spi/slave.rs
View File

@ -29,7 +29,7 @@
//! dma_buffers!(32000);
//! let mut spi = Spi::new(
//! peripherals.SPI2,
//! Mode::Mode0,
//! Mode::_0,
//! )
//! .with_sck(sclk)
//! .with_mosi(mosi)
@ -699,33 +699,32 @@ impl Info {
{
reg_block.pin().modify(|_, w| {
w.ck_idle_edge()
.bit(matches!(data_mode, Mode::Mode0 | Mode::Mode1))
});
reg_block.user().modify(|_, w| {
w.ck_i_edge()
.bit(matches!(data_mode, Mode::Mode1 | Mode::Mode2))
.bit(matches!(data_mode, Mode::_0 | Mode::_1))
});
reg_block
.user()
.modify(|_, w| w.ck_i_edge().bit(matches!(data_mode, Mode::_1 | Mode::_2)));
reg_block.ctrl2().modify(|_, w| unsafe {
match data_mode {
Mode::Mode0 => {
Mode::_0 => {
w.miso_delay_mode().bits(0);
w.miso_delay_num().bits(0);
w.mosi_delay_mode().bits(2);
w.mosi_delay_num().bits(2)
}
Mode::Mode1 => {
Mode::_1 => {
w.miso_delay_mode().bits(2);
w.miso_delay_num().bits(0);
w.mosi_delay_mode().bits(0);
w.mosi_delay_num().bits(0)
}
Mode::Mode2 => {
Mode::_2 => {
w.miso_delay_mode().bits(0);
w.miso_delay_num().bits(0);
w.mosi_delay_mode().bits(1);
w.mosi_delay_num().bits(2)
}
Mode::Mode3 => {
Mode::_3 => {
w.miso_delay_mode().bits(1);
w.miso_delay_num().bits(0);
w.mosi_delay_mode().bits(0);
@ -736,7 +735,7 @@ impl Info {
if dma {
assert!(
matches!(data_mode, Mode::Mode1 | Mode::Mode3),
matches!(data_mode, Mode::_1 | Mode::_3),
"Mode {:?} is not supported with DMA",
data_mode
);
@ -755,13 +754,13 @@ impl Info {
}
reg_block.user().modify(|_, w| {
w.tsck_i_edge()
.bit(matches!(data_mode, Mode::Mode1 | Mode::Mode2));
.bit(matches!(data_mode, Mode::_1 | Mode::_2));
w.rsck_i_edge()
.bit(matches!(data_mode, Mode::Mode1 | Mode::Mode2))
.bit(matches!(data_mode, Mode::_1 | Mode::_2))
});
ctrl1_reg.modify(|_, w| {
w.clk_mode_13()
.bit(matches!(data_mode, Mode::Mode1 | Mode::Mode3))
.bit(matches!(data_mode, Mode::_1 | Mode::_3))
});
}
}

2
examples/src/bin/embassy_spi.rs
View File

@ -61,7 +61,7 @@ async fn main(_spawner: Spawner) {
peripherals.SPI2,
Config::default()
.with_frequency(100.kHz())
.with_mode(Mode::Mode0),
.with_mode(Mode::_0),
)
.unwrap()
.with_sck(sclk)

2
examples/src/bin/spi_loopback.rs
View File

@ -43,7 +43,7 @@ fn main() -> ! {
peripherals.SPI2,
Config::default()
.with_frequency(100.kHz())
.with_mode(Mode::Mode0),
.with_mode(Mode::_0),
)
.unwrap()
.with_sck(sclk)

2
examples/src/bin/spi_loopback_dma_psram.rs
View File

@ -93,7 +93,7 @@ fn main() -> ! {
peripherals.SPI2,
Config::default()
.with_frequency(100.kHz())
.with_mode(Mode::Mode0),
.with_mode(Mode::_0),
)
.unwrap()
.with_sck(sclk)

2
examples/src/bin/spi_slave_dma.rs
View File

@ -64,7 +64,7 @@ fn main() -> ! {
let (rx_buffer, rx_descriptors, tx_buffer, tx_descriptors) = dma_buffers!(32000);
let mut spi = Spi::new(peripherals.SPI2, Mode::Mode0)
let mut spi = Spi::new(peripherals.SPI2, Mode::_0)
.with_sck(slave_sclk)
.with_mosi(slave_mosi)
.with_miso(slave_miso)

6
hil-test/tests/embassy_interrupt_spi_dma.rs
View File

@ -121,7 +121,7 @@ mod test {
peripherals.SPI2,
Config::default()
.with_frequency(10000.kHz())
.with_mode(Mode::Mode0),
.with_mode(Mode::_0),
)
.unwrap()
.with_miso(unsafe { mosi.clone_unchecked() })
@ -135,7 +135,7 @@ mod test {
peripherals.SPI3,
Config::default()
.with_frequency(10000.kHz())
.with_mode(Mode::Mode0),
.with_mode(Mode::_0),
)
.unwrap()
.with_dma(dma_channel2)
@ -229,7 +229,7 @@ mod test {
peripherals.spi,
Config::default()
.with_frequency(100.kHz())
.with_mode(Mode::Mode0),
.with_mode(Mode::_0),
)
.unwrap()
.with_dma(peripherals.dma_channel)

2
hil-test/tests/qspi.rs
View File

@ -212,7 +212,7 @@ mod tests {
peripherals.SPI2,
Config::default()
.with_frequency(100.kHz())
.with_mode(Mode::Mode0),
.with_mode(Mode::_0),
)
.unwrap();

2
hil-test/tests/spi_half_duplex_read.rs
View File

@ -50,7 +50,7 @@ mod tests {
peripherals.SPI2,
Config::default()
.with_frequency(100.kHz())
.with_mode(Mode::Mode0),
.with_mode(Mode::_0),
)
.unwrap()
.with_sck(sclk)

2
hil-test/tests/spi_half_duplex_write.rs
View File

@ -54,7 +54,7 @@ mod tests {
peripherals.SPI2,
Config::default()
.with_frequency(100.kHz())
.with_mode(Mode::Mode0),
.with_mode(Mode::_0),
)
.unwrap()
.with_sck(sclk)

2
hil-test/tests/spi_half_duplex_write_psram.rs
View File

@ -66,7 +66,7 @@ mod tests {
peripherals.SPI2,
Config::default()
.with_frequency(100.kHz())
.with_mode(Mode::Mode0),
.with_mode(Mode::_0),
)
.unwrap()
.with_sck(sclk)

2
hil-test/tests/spi_slave.rs
View File

@ -125,7 +125,7 @@ mod tests {
let miso = unsafe { miso_gpio.clone_unchecked() }.into_peripheral_output();
Context {
spi: Spi::new(peripherals.SPI2, Mode::Mode1)
spi: Spi::new(peripherals.SPI2, Mode::_1)
.with_sck(sclk)
.with_mosi(mosi)
.with_miso(miso)

2
qa-test/src/bin/qspi_flash.rs
View File

@ -81,7 +81,7 @@ fn main() -> ! {
peripherals.SPI2,
Config::default()
.with_frequency(100.kHz())
.with_mode(Mode::Mode0),
.with_mode(Mode::_0),
)
.unwrap()
.with_sck(sclk)

2
qa-test/src/bin/spi_halfduplex_read_manufacturer_id.rs
View File

@ -67,7 +67,7 @@ fn main() -> ! {
peripherals.SPI2,
Config::default()
.with_frequency(100.kHz())
.with_mode(Mode::Mode0),
.with_mode(Mode::_0),
)
.unwrap()
.with_sck(sclk)