Fix naming violations for spi::Mode enum variants (#2902)

* Fix naming violations for `spi::Mode`

* Update migration guide

* Update `CHANGELOG.md`
This commit is contained in:
Jesse Braham 2025-01-07 07:55:19 -08:00 committed by GitHub
parent 66d2effee2
commit bb406cec6b
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18 changed files with 47 additions and 38 deletions

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@ -95,6 +95,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
- UART: Fix naming violations for `DataBits`, `Parity`, and `StopBits` enum variants (#2893) - UART: Fix naming violations for `DataBits`, `Parity`, and `StopBits` enum variants (#2893)
- UART: Remove blocking version of `read_bytes` and rename `drain_fifo` to `read_bytes` instead (#2895) - UART: Remove blocking version of `read_bytes` and rename `drain_fifo` to `read_bytes` instead (#2895)
- Renamed variants of `CpuClock`, made the enum non-exhaustive (#2899) - Renamed variants of `CpuClock`, made the enum non-exhaustive (#2899)
- SPI: Fix naming violations for `Mode` enum variants (#2902)
### Fixed ### Fixed

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@ -245,7 +245,7 @@ is not compatible with the hardware.
peripherals.SPI2, peripherals.SPI2,
Config { Config {
frequency: 100.kHz(), frequency: 100.kHz(),
mode: SpiMode::Mode0, mode: SpiMode::_0,
..Config::default() ..Config::default()
}, },
-); -);
@ -405,3 +405,12 @@ The specific CPU clock variants are renamed from e.g. `Clock80MHz` to `_80MHz`.
``` ```
Additionally the enum is marked as non-exhaustive. Additionally the enum is marked as non-exhaustive.
## SPI Modes
The SPI mode variants are renamed from e.g. `Mode0` to `_0`.
```diff
- Mode::Mode0
+ Mode::_0
```

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@ -28,7 +28,7 @@
//! //!
//! let mut spi = Spi::new( //! let mut spi = Spi::new(
//! peripherals.SPI2, //! peripherals.SPI2,
//! Config::default().with_frequency(100.kHz()).with_mode(Mode::Mode0) //! Config::default().with_frequency(100.kHz()).with_mode(Mode::_0)
//! ) //! )
//! .unwrap() //! .unwrap()
//! .with_sck(sclk) //! .with_sck(sclk)

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@ -44,7 +44,7 @@
//! //!
//! let mut spi = Spi::new( //! let mut spi = Spi::new(
//! peripherals.SPI2, //! peripherals.SPI2,
//! Config::default().with_frequency(100.kHz()).with_mode(Mode::Mode0) //! Config::default().with_frequency(100.kHz()).with_mode(Mode::_0)
//! ) //! )
//! .unwrap() //! .unwrap()
//! .with_sck(sclk) //! .with_sck(sclk)
@ -469,7 +469,7 @@ impl Default for Config {
use fugit::RateExtU32; use fugit::RateExtU32;
Config { Config {
frequency: 1_u32.MHz(), frequency: 1_u32.MHz(),
mode: Mode::Mode0, mode: Mode::_0,
read_bit_order: BitOrder::MsbFirst, read_bit_order: BitOrder::MsbFirst,
write_bit_order: BitOrder::MsbFirst, write_bit_order: BitOrder::MsbFirst,
} }
@ -2945,11 +2945,11 @@ impl Driver {
pin_reg.modify(|_, w| { pin_reg.modify(|_, w| {
w.ck_idle_edge() w.ck_idle_edge()
.bit(matches!(data_mode, Mode::Mode2 | Mode::Mode3)) .bit(matches!(data_mode, Mode::_2 | Mode::_3))
}); });
reg_block.user().modify(|_, w| { reg_block.user().modify(|_, w| {
w.ck_out_edge() w.ck_out_edge()
.bit(matches!(data_mode, Mode::Mode1 | Mode::Mode2)) .bit(matches!(data_mode, Mode::_1 | Mode::_2))
}); });
} }

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@ -71,16 +71,16 @@ impl embedded_hal::spi::Error for Error {
pub enum Mode { pub enum Mode {
/// Mode 0 (CPOL = 0, CPHA = 0): Clock is low when idle, data is captured on /// Mode 0 (CPOL = 0, CPHA = 0): Clock is low when idle, data is captured on
/// the rising edge and propagated on the falling edge. /// the rising edge and propagated on the falling edge.
Mode0, _0,
/// Mode 1 (CPOL = 0, CPHA = 1): Clock is low when idle, data is captured on /// Mode 1 (CPOL = 0, CPHA = 1): Clock is low when idle, data is captured on
/// the falling edge and propagated on the rising edge. /// the falling edge and propagated on the rising edge.
Mode1, _1,
/// Mode 2 (CPOL = 1, CPHA = 0): Clock is high when idle, data is captured /// Mode 2 (CPOL = 1, CPHA = 0): Clock is high when idle, data is captured
/// on the falling edge and propagated on the rising edge. /// on the falling edge and propagated on the rising edge.
Mode2, _2,
/// Mode 3 (CPOL = 1, CPHA = 1): Clock is high when idle, data is captured /// Mode 3 (CPOL = 1, CPHA = 1): Clock is high when idle, data is captured
/// on the rising edge and propagated on the falling edge. /// on the rising edge and propagated on the falling edge.
Mode3, _3,
} }
/// SPI Bit Order /// SPI Bit Order

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@ -29,7 +29,7 @@
//! dma_buffers!(32000); //! dma_buffers!(32000);
//! let mut spi = Spi::new( //! let mut spi = Spi::new(
//! peripherals.SPI2, //! peripherals.SPI2,
//! Mode::Mode0, //! Mode::_0,
//! ) //! )
//! .with_sck(sclk) //! .with_sck(sclk)
//! .with_mosi(mosi) //! .with_mosi(mosi)
@ -699,33 +699,32 @@ impl Info {
{ {
reg_block.pin().modify(|_, w| { reg_block.pin().modify(|_, w| {
w.ck_idle_edge() w.ck_idle_edge()
.bit(matches!(data_mode, Mode::Mode0 | Mode::Mode1)) .bit(matches!(data_mode, Mode::_0 | Mode::_1))
});
reg_block.user().modify(|_, w| {
w.ck_i_edge()
.bit(matches!(data_mode, Mode::Mode1 | Mode::Mode2))
}); });
reg_block
.user()
.modify(|_, w| w.ck_i_edge().bit(matches!(data_mode, Mode::_1 | Mode::_2)));
reg_block.ctrl2().modify(|_, w| unsafe { reg_block.ctrl2().modify(|_, w| unsafe {
match data_mode { match data_mode {
Mode::Mode0 => { Mode::_0 => {
w.miso_delay_mode().bits(0); w.miso_delay_mode().bits(0);
w.miso_delay_num().bits(0); w.miso_delay_num().bits(0);
w.mosi_delay_mode().bits(2); w.mosi_delay_mode().bits(2);
w.mosi_delay_num().bits(2) w.mosi_delay_num().bits(2)
} }
Mode::Mode1 => { Mode::_1 => {
w.miso_delay_mode().bits(2); w.miso_delay_mode().bits(2);
w.miso_delay_num().bits(0); w.miso_delay_num().bits(0);
w.mosi_delay_mode().bits(0); w.mosi_delay_mode().bits(0);
w.mosi_delay_num().bits(0) w.mosi_delay_num().bits(0)
} }
Mode::Mode2 => { Mode::_2 => {
w.miso_delay_mode().bits(0); w.miso_delay_mode().bits(0);
w.miso_delay_num().bits(0); w.miso_delay_num().bits(0);
w.mosi_delay_mode().bits(1); w.mosi_delay_mode().bits(1);
w.mosi_delay_num().bits(2) w.mosi_delay_num().bits(2)
} }
Mode::Mode3 => { Mode::_3 => {
w.miso_delay_mode().bits(1); w.miso_delay_mode().bits(1);
w.miso_delay_num().bits(0); w.miso_delay_num().bits(0);
w.mosi_delay_mode().bits(0); w.mosi_delay_mode().bits(0);
@ -736,7 +735,7 @@ impl Info {
if dma { if dma {
assert!( assert!(
matches!(data_mode, Mode::Mode1 | Mode::Mode3), matches!(data_mode, Mode::_1 | Mode::_3),
"Mode {:?} is not supported with DMA", "Mode {:?} is not supported with DMA",
data_mode data_mode
); );
@ -755,13 +754,13 @@ impl Info {
} }
reg_block.user().modify(|_, w| { reg_block.user().modify(|_, w| {
w.tsck_i_edge() w.tsck_i_edge()
.bit(matches!(data_mode, Mode::Mode1 | Mode::Mode2)); .bit(matches!(data_mode, Mode::_1 | Mode::_2));
w.rsck_i_edge() w.rsck_i_edge()
.bit(matches!(data_mode, Mode::Mode1 | Mode::Mode2)) .bit(matches!(data_mode, Mode::_1 | Mode::_2))
}); });
ctrl1_reg.modify(|_, w| { ctrl1_reg.modify(|_, w| {
w.clk_mode_13() w.clk_mode_13()
.bit(matches!(data_mode, Mode::Mode1 | Mode::Mode3)) .bit(matches!(data_mode, Mode::_1 | Mode::_3))
}); });
} }
} }

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@ -61,7 +61,7 @@ async fn main(_spawner: Spawner) {
peripherals.SPI2, peripherals.SPI2,
Config::default() Config::default()
.with_frequency(100.kHz()) .with_frequency(100.kHz())
.with_mode(Mode::Mode0), .with_mode(Mode::_0),
) )
.unwrap() .unwrap()
.with_sck(sclk) .with_sck(sclk)

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@ -43,7 +43,7 @@ fn main() -> ! {
peripherals.SPI2, peripherals.SPI2,
Config::default() Config::default()
.with_frequency(100.kHz()) .with_frequency(100.kHz())
.with_mode(Mode::Mode0), .with_mode(Mode::_0),
) )
.unwrap() .unwrap()
.with_sck(sclk) .with_sck(sclk)

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@ -93,7 +93,7 @@ fn main() -> ! {
peripherals.SPI2, peripherals.SPI2,
Config::default() Config::default()
.with_frequency(100.kHz()) .with_frequency(100.kHz())
.with_mode(Mode::Mode0), .with_mode(Mode::_0),
) )
.unwrap() .unwrap()
.with_sck(sclk) .with_sck(sclk)

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@ -64,7 +64,7 @@ fn main() -> ! {
let (rx_buffer, rx_descriptors, tx_buffer, tx_descriptors) = dma_buffers!(32000); let (rx_buffer, rx_descriptors, tx_buffer, tx_descriptors) = dma_buffers!(32000);
let mut spi = Spi::new(peripherals.SPI2, Mode::Mode0) let mut spi = Spi::new(peripherals.SPI2, Mode::_0)
.with_sck(slave_sclk) .with_sck(slave_sclk)
.with_mosi(slave_mosi) .with_mosi(slave_mosi)
.with_miso(slave_miso) .with_miso(slave_miso)

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@ -121,7 +121,7 @@ mod test {
peripherals.SPI2, peripherals.SPI2,
Config::default() Config::default()
.with_frequency(10000.kHz()) .with_frequency(10000.kHz())
.with_mode(Mode::Mode0), .with_mode(Mode::_0),
) )
.unwrap() .unwrap()
.with_miso(unsafe { mosi.clone_unchecked() }) .with_miso(unsafe { mosi.clone_unchecked() })
@ -135,7 +135,7 @@ mod test {
peripherals.SPI3, peripherals.SPI3,
Config::default() Config::default()
.with_frequency(10000.kHz()) .with_frequency(10000.kHz())
.with_mode(Mode::Mode0), .with_mode(Mode::_0),
) )
.unwrap() .unwrap()
.with_dma(dma_channel2) .with_dma(dma_channel2)
@ -229,7 +229,7 @@ mod test {
peripherals.spi, peripherals.spi,
Config::default() Config::default()
.with_frequency(100.kHz()) .with_frequency(100.kHz())
.with_mode(Mode::Mode0), .with_mode(Mode::_0),
) )
.unwrap() .unwrap()
.with_dma(peripherals.dma_channel) .with_dma(peripherals.dma_channel)

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@ -212,7 +212,7 @@ mod tests {
peripherals.SPI2, peripherals.SPI2,
Config::default() Config::default()
.with_frequency(100.kHz()) .with_frequency(100.kHz())
.with_mode(Mode::Mode0), .with_mode(Mode::_0),
) )
.unwrap(); .unwrap();

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@ -50,7 +50,7 @@ mod tests {
peripherals.SPI2, peripherals.SPI2,
Config::default() Config::default()
.with_frequency(100.kHz()) .with_frequency(100.kHz())
.with_mode(Mode::Mode0), .with_mode(Mode::_0),
) )
.unwrap() .unwrap()
.with_sck(sclk) .with_sck(sclk)

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@ -54,7 +54,7 @@ mod tests {
peripherals.SPI2, peripherals.SPI2,
Config::default() Config::default()
.with_frequency(100.kHz()) .with_frequency(100.kHz())
.with_mode(Mode::Mode0), .with_mode(Mode::_0),
) )
.unwrap() .unwrap()
.with_sck(sclk) .with_sck(sclk)

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@ -66,7 +66,7 @@ mod tests {
peripherals.SPI2, peripherals.SPI2,
Config::default() Config::default()
.with_frequency(100.kHz()) .with_frequency(100.kHz())
.with_mode(Mode::Mode0), .with_mode(Mode::_0),
) )
.unwrap() .unwrap()
.with_sck(sclk) .with_sck(sclk)

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@ -125,7 +125,7 @@ mod tests {
let miso = unsafe { miso_gpio.clone_unchecked() }.into_peripheral_output(); let miso = unsafe { miso_gpio.clone_unchecked() }.into_peripheral_output();
Context { Context {
spi: Spi::new(peripherals.SPI2, Mode::Mode1) spi: Spi::new(peripherals.SPI2, Mode::_1)
.with_sck(sclk) .with_sck(sclk)
.with_mosi(mosi) .with_mosi(mosi)
.with_miso(miso) .with_miso(miso)

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@ -81,7 +81,7 @@ fn main() -> ! {
peripherals.SPI2, peripherals.SPI2,
Config::default() Config::default()
.with_frequency(100.kHz()) .with_frequency(100.kHz())
.with_mode(Mode::Mode0), .with_mode(Mode::_0),
) )
.unwrap() .unwrap()
.with_sck(sclk) .with_sck(sclk)

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@ -67,7 +67,7 @@ fn main() -> ! {
peripherals.SPI2, peripherals.SPI2,
Config::default() Config::default()
.with_frequency(100.kHz()) .with_frequency(100.kHz())
.with_mode(Mode::Mode0), .with_mode(Mode::_0),
) )
.unwrap() .unwrap()
.with_sck(sclk) .with_sck(sclk)