Rename RESERVE_DRAM to RESERVE_CACHES, revert change of reserved_for_boot_seg
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@ -8,8 +8,8 @@
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/* override entry point */
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ENTRY(ESP32Reset)
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/* reserved at the start of DRAM */
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RESERVE_DRAM = 0x4000;
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/* reserved at the start of DRAM/IRAM */
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RESERVE_CACHES = 0x2000;
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VECTORS_SIZE = 0x400;
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@ -23,17 +23,17 @@ STACK_SIZE = 8k;
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/* Specify main memory areas */
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MEMORY
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{
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vectors_seg ( RX ) : ORIGIN = 0x40020000 + RESERVE_DRAM, len = VECTORS_SIZE /* SRAM0 */
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iram_seg ( RX ) : ORIGIN = 0x40020000 + RESERVE_DRAM + VECTORS_SIZE, len = 192k - RESERVE_DRAM - VECTORS_SIZE /* SRAM0 */
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vectors_seg ( RX ) : ORIGIN = 0x40020000 + RESERVE_CACHES, len = VECTORS_SIZE /* SRAM0 */
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iram_seg ( RX ) : ORIGIN = 0x40020000 + RESERVE_CACHES + VECTORS_SIZE, len = 192k - RESERVE_CACHES - VECTORS_SIZE /* SRAM0 */
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dram_seg ( RW ) : ORIGIN = 0x3FFB0000 + RESERVE_DRAM + VECTORS_SIZE, len = 192k - RESERVE_DRAM - VECTORS_SIZE
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dram_seg ( RW ) : ORIGIN = 0x3FFB0000 + RESERVE_CACHES + VECTORS_SIZE, len = 192k - RESERVE_CACHES - VECTORS_SIZE
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/* SRAM1; reserved for static ROM usage; can be used for heap.
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Length based on the "_dram0_rtos_reserved_start" symbol from IDF used to delimit the
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ROM data reserved region:
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https://github.com/espressif/esp-idf/blob/bcb34ca7aef4e8d3b97d75ad069b960fb1c17c16/components/heap/port/esp32s2/memory_layout.c#L121-L122
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*/
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reserved_for_boot_seg : ORIGIN = 0x3ffffa10, len = 0x5f0
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reserved_for_boot_seg : ORIGIN = 0x3FFE0000, len = 0x1FA10
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/* external flash
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The 0x20 offset is a convenience for the app binary image generation.
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