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Format GPIO-related macros and their invocations to improve readability

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This commit is contained in:
Jesse Braham 2022-01-06 09:34:32 -08:00
parent 34ca298698
commit b953041da0
3 changed files with 173 additions and 129 deletions
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216
esp-hal-common/src/gpio.rs
View File

@ -1,4 +1,3 @@
pub use crate::prelude::*;
pub use paste::paste;
#[macro_export]
@ -7,8 +6,8 @@ macro_rules! impl_output {
$gpio_function:ident,
$pxi:ident:
(
$pin_num:expr, $iomux_reg:expr, $bit:expr, $out_en_set:ident, $out_en_clear:ident,
$out_set:ident, $out_clear:ident, $out_reg:ident
$pin_num:expr, $iomux_reg:expr, $bit:expr, $out_en_set:ident,
$out_en_clear:ident, $out_set:ident, $out_clear:ident, $out_reg:ident
)
$( ,( $( $af_signal:ident: $af:ident ),* ))?
) => {
@ -84,8 +83,6 @@ macro_rules! impl_output {
.clear_bit()
});
}
}
pub fn into_push_pull_output(self) -> $pxi<Output<PushPull>> {
@ -159,8 +156,8 @@ macro_rules! impl_output {
fn internal_pull_up_in_sleep_mode(&mut self, on: bool) -> &mut Self {
paste! {
unsafe { &*IO_MUX::ptr() }
.$iomux_reg
.modify(|_, w| w.mcu_wpu().bit(on));
.$iomux_reg
.modify(|_, w| w.mcu_wpu().bit(on));
}
self
}
@ -168,8 +165,8 @@ macro_rules! impl_output {
fn internal_pull_down_in_sleep_mode(&mut self, on: bool) -> &mut Self {
paste!{
unsafe { &*IO_MUX::ptr() }
.$iomux_reg
.modify(|_, w| w.mcu_wpd().bit(on));
.$iomux_reg
.modify(|_, w| w.mcu_wpd().bit(on));
}
self
}
@ -177,8 +174,8 @@ macro_rules! impl_output {
fn enable_output_in_sleep_mode(&mut self, on: bool) -> &mut Self {
paste! {
unsafe { &*IO_MUX::ptr() }
.$iomux_reg
.modify(|_, w| w.mcu_oe().bit(on));
.$iomux_reg
.modify(|_, w| w.mcu_oe().bit(on));
}
self
}
@ -240,11 +237,15 @@ macro_rules! impl_output {
#[macro_export]
macro_rules! impl_input {
($gpio_function:ident,
(
$gpio_function:ident,
$pxi:ident:
($pin_num:expr, $iomux_reg:expr, $bit:expr, $out_en_clear:ident, $reg:ident, $reader:ident,
$status_w1tc:ident, $pcpu_int:ident, $pcpu_nmi:ident, $acpu_int:ident, $acpu_nmi:ident
) $( ,( $( $af_signal:ident : $af:ident ),* ))?
(
$pin_num:expr, $iomux_reg:expr, $bit:expr, $out_en_clear:ident,
$reg:ident, $reader:ident, $status_w1tc:ident, $pcpu_int:ident,
$pcpu_nmi:ident, $acpu_int:ident, $acpu_nmi:ident
)
$( ,( $( $af_signal:ident : $af:ident ),* ))?
) => {
impl<MODE> embedded_hal::digital::v2::InputPin for $pxi<Input<MODE>> {
type Error = Infallible;
@ -263,28 +264,26 @@ macro_rules! impl_input {
let gpio = unsafe { &*GPIO::ptr() };
let iomux = unsafe { &*IO_MUX::ptr() };
gpio.$out_en_clear
.write(|w| unsafe { w.bits(1 << $bit) });
gpio.func_out_sel_cfg[$pin_num]
.modify(|_, w| unsafe { w.out_sel().bits(OutputSignal::GPIO as OutputSignalType) });
paste! {
iomux.$iomux_reg.modify(|_, w| unsafe {
w.mcu_sel()
.bits(2)
.fun_ie()
.set_bit()
.fun_wpd()
.bit(pull_down)
.fun_wpu()
.bit(pull_up)
.slp_sel()
.clear_bit()
});
}
paste! {
iomux.$iomux_reg.modify(|_, w| unsafe {
w.mcu_sel()
.bits(2)
.fun_ie()
.set_bit()
.fun_wpd()
.bit(pull_down)
.fun_wpu()
.bit(pull_up)
.slp_sel()
.clear_bit()
});
}
}
pub fn into_floating_input(self) -> $pxi<Input<Floating>> {
@ -328,11 +327,9 @@ macro_rules! impl_input {
force_via_gpio_mux: bool,
) -> &mut Self {
let af = if force_via_gpio_mux
{
let af = if force_via_gpio_mux {
AlternateFunction::$gpio_function
}
else {
} else {
match signal {
$( $(
InputSignal::$af_signal => AlternateFunction::$af,
@ -430,8 +427,6 @@ macro_rules! impl_input {
}
fn enable_hold(&mut self, _on: bool) {
todo!();
}
}
@ -439,80 +434,127 @@ macro_rules! impl_input {
}
#[macro_export]
macro_rules! impl_pin_wrap {
($gpio_function:ident, $pxi:ident, $pin_num:expr, $iomux_reg:expr, $type:ident, Bank0, SingleCore
macro_rules! impl_input_wrap {
(
$gpio_function:ident, $pxi:ident, $pin_num:expr, $iomux_reg:expr, $type:ident, Bank0, SingleCore
$( ,( $( $af_input_signal:ident : $af_input:ident ),* ) )?
) => {
impl_input!($gpio_function, $pxi: ($pin_num, $iomux_reg, $pin_num % 32, enable_w1tc, in_, data_next,
status_w1tc, pcpu_int, pcpu_nmi_int, pcpu_int, pcpu_nmi_int)
$( ,( $( $af_input_signal: $af_input ),* ) )? );
};
($gpio_function:ident, $pxi:ident, $pin_num:expr, $iomux_reg:expr, $type:ident, Bank1, SingleCore
$( ,( $( $af_input_signal:ident : $af_input:ident ),* ) )?
) => {
impl_input!($gpio_function, $pxi: ($pin_num, $iomux_reg, $pin_num % 32, enable1_w1tc, in1, data_next,
status1_w1tc, pcpu_int1, pcpu_nmi_int1, pcpu_int1, pcpu_nmi_int1)
$( ,( $( $af_input_signal: $af_input ),* ) )? );
impl_input!(
$gpio_function,
$pxi:
(
$pin_num, $iomux_reg, $pin_num % 32, enable_w1tc, in_, data_next,
status_w1tc, pcpu_int, pcpu_nmi_int, pcpu_int, pcpu_nmi_int
)
$( ,( $( $af_input_signal: $af_input ),* ) )?
);
};
($gpio_function:ident, $pxi:ident, $pin_num:expr, $iomux_reg:expr, $type:ident, Bank0, DualCore
(
$gpio_function:ident, $pxi:ident, $pin_num:expr, $iomux_reg:expr, $type:ident, Bank1, SingleCore
$( ,( $( $af_input_signal:ident : $af_input:ident ),* ) )?
) => {
impl_input!($gpio_function, $pxi: ($pin_num, $iomux_reg, $pin_num % 32, enable_w1tc, in_, data_next,
status_w1tc, pcpu_int, pcpu_nmi_int, acpu_int, acpu_nmi_int)
$( ,( $( $af_input_signal: $af_input ),* ) )? );
impl_input!(
$gpio_function,
$pxi:
(
$pin_num, $iomux_reg, $pin_num % 32, enable1_w1tc, in1, data_next,
status1_w1tc, pcpu_int1, pcpu_nmi_int1, pcpu_int1, pcpu_nmi_int1
)
$( ,( $( $af_input_signal: $af_input ),* ) )?
);
};
($gpio_function:ident, $pxi:ident, $pin_num:expr, $iomux_reg:expr, $type:ident, Bank1, DualCore
(
$gpio_function:ident, $pxi:ident, $pin_num:expr, $iomux_reg:expr, $type:ident, Bank0, DualCore
$( ,( $( $af_input_signal:ident : $af_input:ident ),* ) )?
) => {
impl_input!($gpio_function, $pxi: ($pin_num, $iomux_reg, $pin_num % 32, enable1_w1tc, in1, data_next,
status1_w1tc, pcpu_int1, pcpu_nmi_int1, acpu_int1, acpu_nmi_int1)
$( ,( $( $af_input_signal: $af_input ),* ) )? );
impl_input!(
$gpio_function,
$pxi:
(
$pin_num, $iomux_reg, $pin_num % 32, enable_w1tc, in_, data_next,
status_w1tc, pcpu_int, pcpu_nmi_int, acpu_int, acpu_nmi_int
)
$( ,( $( $af_input_signal: $af_input ),* ) )?
);
};
(
$gpio_function:ident, $pxi:ident, $pin_num:expr, $iomux_reg:expr, $type:ident, Bank1, DualCore
$( ,( $( $af_input_signal:ident : $af_input:ident ),* ) )?
) => {
impl_input!(
$gpio_function,
$pxi:
(
$pin_num, $iomux_reg, $pin_num % 32, enable1_w1tc, in1, data_next,
status1_w1tc, pcpu_int1, pcpu_nmi_int1, acpu_int1, acpu_nmi_int1
)
$( ,( $( $af_input_signal: $af_input ),* ) )?
);
};
}
#[macro_export]
macro_rules! impl_output_wrap {
($gpio_function:ident, $pxi:ident, $pin_num:expr, $iomux_reg:expr, IO, Bank0
(
$gpio_function:ident, $pxi:ident, $pin_num:expr, $iomux_reg:expr, IO, Bank0
$( ,( $( $af_output_signal:ident : $af_output:ident ),* ))?
) => {
impl_output!($gpio_function, $pxi:
($pin_num, $iomux_reg, $pin_num % 32, enable_w1ts, enable_w1tc, out_w1ts, out_w1tc, out)
$( ,( $( $af_output_signal: $af_output ),* ) )? );
impl_output!(
$gpio_function,
$pxi:
(
$pin_num, $iomux_reg, $pin_num % 32, enable_w1ts, enable_w1tc,
out_w1ts, out_w1tc, out
)
$( ,( $( $af_output_signal: $af_output ),* ) )?
);
};
($gpio_function:ident, $pxi:ident, $pin_num:expr, $iomux_reg:expr, IO, Bank1
(
$gpio_function:ident, $pxi:ident, $pin_num:expr, $iomux_reg:expr, IO, Bank1
$( ,( $( $af_output_signal:ident : $af_output:ident ),* ))?
) => {
impl_output!($gpio_function, $pxi:
($pin_num, $iomux_reg, $pin_num % 32, enable1_w1ts, enable1_w1tc, out1_w1ts, out1_w1tc, out1)
$( ,( $( $af_output_signal: $af_output ),* ) )? );
impl_output!(
$gpio_function,
$pxi:
(
$pin_num, $iomux_reg, $pin_num % 32, enable1_w1ts, enable1_w1tc,
out1_w1ts, out1_w1tc, out1
)
$( ,( $( $af_output_signal: $af_output ),* ) )?
);
};
($gpio_function:ident, $pxi:ident, $pin_num:expr, $iomux_reg:expr, $type:ident, $bank:ident
(
$gpio_function:ident, $pxi:ident, $pin_num:expr, $iomux_reg:expr, $type:ident, $bank:ident
$( ,( $( $af_output_signal:ident : $af_output:ident ),* ))?
) => {
};
) => {};
}
#[macro_export]
macro_rules! gpio {
( $gpio_function:ident,
(
$gpio_function:ident,
$cores:ident,
$($pxi:ident: ($pname:ident, $pin_num:literal, $iomux_reg:expr, $type:ident, $rtc:tt, $bank:ident ),
$(
( $( $af_input_signal:ident: $af_input:ident ),* ),
$pxi:ident:
(
$pname:ident, $pin_num:literal, $iomux_reg:expr, $type:ident,
$rtc:tt, $bank:ident
),
$(
( $( $af_output_signal:ident: $af_output:ident ),* ),
( $( $af_input_signal:ident: $af_input:ident ),* ),
$( ( $( $af_output_signal:ident: $af_output:ident ),* ), )?
)?
)?
)+ ) => {
)+
) => {
use core::{convert::Infallible, marker::PhantomData};
use embedded_hal::digital::v2::{OutputPin as _, StatefulOutputPin as _};
use crate::pac::{GPIO, IO_MUX};
#[allow(dead_code)]
pub struct IO {
io_mux: IO_MUX,
pub pins: Pins,
@ -727,32 +769,32 @@ macro_rules! gpio {
}
}
pub struct Pins {
$(
pub $pname: $pxi<Unknown>,
)+
}
$(
pub struct $pxi<MODE> {
_mode: PhantomData<MODE>,
}
impl_pin_wrap!($gpio_function, $pxi, $pin_num, $iomux_reg, $type, $bank, $cores
$( ,( $( $af_input_signal: $af_input ),* ) )? );
impl_output_wrap!($gpio_function, $pxi, $pin_num, $iomux_reg, $type, $bank
$($( ,( $( $af_output_signal: $af_output ),* ) )? )? );
impl_input_wrap!(
$gpio_function, $pxi, $pin_num, $iomux_reg, $type, $bank, $cores
$( ,( $( $af_input_signal: $af_input ),* ) )?
);
impl_output_wrap!(
$gpio_function, $pxi, $pin_num, $iomux_reg, $type, $bank
$($( ,( $( $af_output_signal: $af_output ),* ) )? )?
);
)+
};
}
pub use gpio;
pub use impl_input;
pub use impl_input_wrap;
pub use impl_output;
pub use impl_output_wrap;
pub use impl_pin_wrap;

41
esp32-hal/src/gpio.rs
View File

@ -502,28 +502,29 @@ pub enum OutputSignal {
gpio! {
Function2,
DualCore,
Gpio0: (gpio0, 0, gpio0, IO, RTC, Bank0), (EMAC_TX_CLK: Function5), (CLK_OUT1: Function1),
Gpio1: (gpio1, 1, gpio1, IO, 0, Bank0), (EMAC_RXD2: Function5), (U0TXD: Function1, CLK_OUT3: Function1),
Gpio2: (gpio2, 2, gpio2, IO, RTC, Bank0), (HSPIWP: Function1, HS2_DATA0: Function3, SD_DATA0: Function4), (HS2_DATA0: Function3, SD_DATA0: Function4),
Gpio3: (gpio3, 3, gpio3, IO, 0, Bank0), (U0RXD: Function0), (CLK_OUT2: Function1),
Gpio4: (gpio4, 4, gpio4, IO, RTC, Bank0), (HSPIHD: Function1, HS2_DATA1: Function3, SD_DATA1: Function4, EMAC_TX_ER: Function5), (HS2_DATA1: Function3, SD_DATA1: Function4),
Gpio5: (gpio5, 5, gpio5, IO, 0, Bank0), (VSPICS0: Function1, HS1_DATA6: Function3, EMAC_RX_CLK: Function5), (HS1_DATA6: Function3),
Gpio6: (gpio6, 6, gpio6, IO, 0, Bank0), (U1CTS: Function4), (SD_CLK: Function0, SPICLK: Function1, HS1_CLK: Function3),
Gpio7: (gpio7, 7, gpio7, IO, 0, Bank0), (SD_DATA0: Function0, SPIQ: Function1, HS1_DATA0: Function3), (SD_DATA0: Function0, SPIQ: Function1, HS1_DATA0: Function3, U2RTS: Function4),
Gpio8: (gpio8, 8, gpio8, IO, 0, Bank0), (SD_DATA1: Function0, SPID: Function1, HS1_DATA1: Function3, U2CTS: Function4), (SD_DATA1: Function0, SPID: Function1, HS1_DATA1: Function3),
Gpio9: (gpio9, 9, gpio9, IO, 0, Bank0), (SD_DATA2: Function0, SPIHD: Function1, HS1_DATA2: Function3, U1RXD: Function4), (SD_DATA2: Function0, SPIHD: Function1, HS1_DATA2: Function3),
Gpio10: (gpio10, 10, gpio10, IO, 0, Bank0), (SD_DATA3: Function0, SPIWP: Function1, HS1_DATA3: Function3), (SD_DATA3: Function0, SPIWP: Function1, HS1_DATA3: Function3, U1TXD: Function4),
Gpio11: (gpio11, 11, gpio11, IO, 0, Bank0), (SPICS0: Function1), (SD_CMD: Function0, SPICS0: Function1, HS1_CMD: Function3, U1RTS: Function4),
Gpio0: ( gpio0, 0, gpio0, IO, RTC, Bank0), (EMAC_TX_CLK: Function5), (CLK_OUT1: Function1),
Gpio1: ( gpio1, 1, gpio1, IO, 0, Bank0), (EMAC_RXD2: Function5), (U0TXD: Function1, CLK_OUT3: Function1),
Gpio2: ( gpio2, 2, gpio2, IO, RTC, Bank0), (HSPIWP: Function1, HS2_DATA0: Function3, SD_DATA0: Function4), (HS2_DATA0: Function3, SD_DATA0: Function4),
Gpio3: ( gpio3, 3, gpio3, IO, 0, Bank0), (U0RXD: Function0), (CLK_OUT2: Function1),
Gpio4: ( gpio4, 4, gpio4, IO, RTC, Bank0), (HSPIHD: Function1, HS2_DATA1: Function3, SD_DATA1: Function4, EMAC_TX_ER: Function5), (HS2_DATA1: Function3, SD_DATA1: Function4),
Gpio5: ( gpio5, 5, gpio5, IO, 0, Bank0), (VSPICS0: Function1, HS1_DATA6: Function3, EMAC_RX_CLK: Function5), (HS1_DATA6: Function3),
Gpio6: ( gpio6, 6, gpio6, IO, 0, Bank0), (U1CTS: Function4), (SD_CLK: Function0, SPICLK: Function1, HS1_CLK: Function3),
Gpio7: ( gpio7, 7, gpio7, IO, 0, Bank0), (SD_DATA0: Function0, SPIQ: Function1, HS1_DATA0: Function3), (SD_DATA0: Function0, SPIQ: Function1, HS1_DATA0: Function3, U2RTS: Function4),
Gpio8: ( gpio8, 8, gpio8, IO, 0, Bank0), (SD_DATA1: Function0, SPID: Function1, HS1_DATA1: Function3, U2CTS: Function4), (SD_DATA1: Function0, SPID: Function1, HS1_DATA1: Function3),
Gpio9: ( gpio9, 9, gpio9, IO, 0, Bank0), (SD_DATA2: Function0, SPIHD: Function1, HS1_DATA2: Function3, U1RXD: Function4), (SD_DATA2: Function0, SPIHD: Function1, HS1_DATA2: Function3),
Gpio10: (gpio10, 10, gpio10, IO, 0, Bank0), (SD_DATA3: Function0, SPIWP: Function1, HS1_DATA3: Function3), (SD_DATA3: Function0, SPIWP: Function1, HS1_DATA3: Function3, U1TXD: Function4),
Gpio11: (gpio11, 11, gpio11, IO, 0, Bank0), (SPICS0: Function1), (SD_CMD: Function0, SPICS0: Function1, HS1_CMD: Function3, U1RTS: Function4),
Gpio12: (gpio12, 12, gpio12, IO, RTC, Bank0), (MTDI: Function0, HSPIQ: Function1, HS2_DATA2: Function3, SD_DATA2: Function4), (HSPIQ: Function1, HS2_DATA2: Function3, SD_DATA2: Function4, EMAC_TXD3: Function5),
Gpio13: (gpio13, 13, gpio13, IO, RTC, Bank0), (MTCK: Function0, HSPID: Function1, HS2_DATA3: Function3, SD_DATA3: Function4), (HSPID: Function1, HS2_DATA3: Function3, SD_DATA3: Function4, EMAC_RX_ER: Function5),
Gpio14: (gpio14, 14, gpio14, IO, RTC, Bank0), (MTMS: Function0, HSPICLK: Function1), (HSPICLK: Function1, HS2_CLK: Function3, SD_CLK: Function4, EMAC_TXD2: Function5),
Gpio15: (gpio15, 15, gpio15, IO, RTC, Bank0), (HSPICS0: Function1, EMAC_RXD3: Function5), (MTDO: Function0, HSPICS0: Function1, HS2_CMD: Function3, SD_CMD: Function4),
Gpio16: (gpio16, 16, gpio16, IO, 0, Bank0), (HS1_DATA4: Function3, U2RXD: Function4), (HS1_DATA4: Function3, EMAC_CLK_OUT: Function5),
Gpio17: (gpio17, 17, gpio17, IO, 0, Bank0), (HS1_DATA5: Function3), (HS1_DATA5: Function3, U2TXD: Function4, EMAC_CLK_180: Function5),
Gpio18: (gpio18, 18, gpio18, IO, 0, Bank0), (VSPICLK: Function1, HS1_DATA7: Function3), (VSPICLK: Function1, HS1_DATA7: Function3),
Gpio19: (gpio19, 19, gpio19, IO, 0, Bank0), (VSPIQ: Function1, U0CTS: Function3), (VSPIQ: Function1, EMAC_TXD0: Function5),
Gpio20: (gpio20, 20, gpio20, IO, 0, Bank0),
Gpio21: (gpio21, 21, gpio21, IO, 0, Bank0), (VSPIHD: Function1), (VSPIHD: Function1, EMAC_TX_EN: Function5),
Gpio16: (gpio16, 16, gpio16, IO, 0, Bank0), (HS1_DATA4: Function3, U2RXD: Function4), (HS1_DATA4: Function3, EMAC_CLK_OUT: Function5),
Gpio17: (gpio17, 17, gpio17, IO, 0, Bank0), (HS1_DATA5: Function3), (HS1_DATA5: Function3, U2TXD: Function4, EMAC_CLK_180: Function5),
Gpio18: (gpio18, 18, gpio18, IO, 0, Bank0), (VSPICLK: Function1, HS1_DATA7: Function3), (VSPICLK: Function1, HS1_DATA7: Function3),
Gpio19: (gpio19, 19, gpio19, IO, 0, Bank0), (VSPIQ: Function1, U0CTS: Function3), (VSPIQ: Function1, EMAC_TXD0: Function5),
Gpio20: (gpio20, 20, gpio20, IO, 0, Bank0),
Gpio21: (gpio21, 21, gpio21, IO, 0, Bank0), (VSPIHD: Function1), (VSPIHD: Function1, EMAC_TX_EN: Function5),
Gpio22: (gpio22, 22, gpio22, IO, 0, Bank0), (VSPIWP: Function1), (VSPIWP: Function1, U0RTS: Function3, EMAC_TXD1: Function5),
Gpio23: (gpio23, 23, gpio23, IO, 0, Bank0), (VSPID: Function1), (VSPID: Function1, HS1_STROBE: Function3),
@ -532,8 +533,8 @@ gpio! {
Gpio26: (gpio26, 26, gpio26, IO, 0, Bank0), (EMAC_RXD1: Function5), (),
Gpio27: (gpio27, 27, gpio27, IO, 0, Bank0), (EMAC_RX_DV: Function5), (),
Gpio32: (gpio32, 32, gpio32, IO, 0, Bank1),
Gpio33: (gpio33, 33, gpio33, IO, 0, Bank1),
Gpio32: (gpio32, 32, gpio32, IO, 0, Bank1),
Gpio33: (gpio33, 33, gpio33, IO, 0, Bank1),
Gpio34: (gpio34, 34, gpio34, Input, 0, Bank1),
Gpio35: (gpio35, 35, gpio35, Input, 0, Bank1),
Gpio36: (gpio36, 36, gpio36, Input, 0, Bank1),

45
esp32c3-hal/src/gpio.rs
View File

@ -140,26 +140,27 @@ pub enum OutputSignal {
gpio! {
Function1,
SingleCore,
Gpio0: (gpio0, 0, gpio[0], IO, RTC, Bank0),
Gpio1: (gpio1, 1, gpio[1], IO, RTC, Bank0),
Gpio2: (gpio2, 2, gpio[2], IO, RTC, Bank0), (FSPIQ: Function2), (FSPIQ: Function2),
Gpio3: (gpio3, 3, gpio[3], IO, RTC, Bank0),
Gpio4: (gpio4, 4, gpio[4], IO, RTC, Bank0), (FSPIHD: Function2), (USB_JTAG_TMS: Function0, FSPIHD: Function2),
Gpio5: (gpio5, 5, gpio[5], IO, RTC, Bank0), (FSPIWP: Function2), (USB_JTAG_TDI: Function0, FSPIWP: Function2),
Gpio6: (gpio6, 6, gpio[6], IO, 0, Bank0), (FSPICLK: Function2), (USB_JTAG_TCK: Function0, FSPICLK_MUX: Function2),
Gpio7: (gpio7, 7, gpio[7], IO, 0, Bank0), (FSPID: Function2), (USB_JTAG_TDO: Function0, FSPID: Function2),
Gpio8: (gpio8, 8, gpio[8], IO, 0, Bank0),
Gpio9: (gpio9, 9, gpio[9], IO, 0, Bank0),
Gpio10: (gpio10, 10, gpio[10], IO, 0, Bank0), (FSPICS0: Function2), (FSPICS0: Function2),
Gpio11: (gpio11, 11, gpio[11], IO, 0, Bank0),
Gpio12: (gpio12, 12, gpio[12], IO, 0, Bank0), (SPIHD: Function0), (SPIHD: Function0),
Gpio13: (gpio13, 13, gpio[13], IO, 0, Bank0), (SPIWP: Function0), (SPIWP: Function0),
Gpio14: (gpio14, 14, gpio[14], IO, 0, Bank0), (), (SPICS0: Function0),
Gpio15: (gpio15, 15, gpio[15], IO, 0, Bank0), (), (SPICLK_MUX: Function0),
Gpio16: (gpio16, 16, gpio[16], IO, 0, Bank0), (SPID: Function0), (SPID: Function0),
Gpio17: (gpio17, 17, gpio[17], IO, 0, Bank0), (SPIQ: Function0), (SPIQ: Function0),
Gpio18: (gpio18, 18, gpio[18], IO, 0, Bank0),
Gpio19: (gpio19, 19, gpio[19], IO, 0, Bank0),
Gpio20: (gpio20, 20, gpio[20], IO, 0, Bank0), (U0RXD: Function0), (),
Gpio21: (gpio21, 21, gpio[21], IO, 0, Bank0), (), (U0TXD: Function0),
Gpio0: ( gpio0, 0, gpio[0], IO, RTC, Bank0),
Gpio1: ( gpio1, 1, gpio[1], IO, RTC, Bank0),
Gpio2: ( gpio2, 2, gpio[2], IO, RTC, Bank0), (FSPIQ: Function2), (FSPIQ: Function2),
Gpio3: ( gpio3, 3, gpio[3], IO, RTC, Bank0),
Gpio4: ( gpio4, 4, gpio[4], IO, RTC, Bank0), (FSPIHD: Function2), (USB_JTAG_TMS: Function0, FSPIHD: Function2),
Gpio5: ( gpio5, 5, gpio[5], IO, RTC, Bank0), (FSPIWP: Function2), (USB_JTAG_TDI: Function0, FSPIWP: Function2),
Gpio6: ( gpio6, 6, gpio[6], IO, 0, Bank0), (FSPICLK: Function2), (USB_JTAG_TCK: Function0, FSPICLK_MUX: Function2),
Gpio7: ( gpio7, 7, gpio[7], IO, 0, Bank0), (FSPID: Function2), (USB_JTAG_TDO: Function0, FSPID: Function2),
Gpio8: ( gpio8, 8, gpio[8], IO, 0, Bank0),
Gpio9: ( gpio9, 9, gpio[9], IO, 0, Bank0),
Gpio10: (gpio10, 10, gpio[10], IO, 0, Bank0), (FSPICS0: Function2), (FSPICS0: Function2),
Gpio11: (gpio11, 11, gpio[11], IO, 0, Bank0),
Gpio12: (gpio12, 12, gpio[12], IO, 0, Bank0), (SPIHD: Function0), (SPIHD: Function0),
Gpio13: (gpio13, 13, gpio[13], IO, 0, Bank0), (SPIWP: Function0), (SPIWP: Function0),
Gpio14: (gpio14, 14, gpio[14], IO, 0, Bank0), (), (SPICS0: Function0),
Gpio15: (gpio15, 15, gpio[15], IO, 0, Bank0), (), (SPICLK_MUX: Function0),
Gpio16: (gpio16, 16, gpio[16], IO, 0, Bank0), (SPID: Function0), (SPID: Function0),
Gpio17: (gpio17, 17, gpio[17], IO, 0, Bank0), (SPIQ: Function0), (SPIQ: Function0),
Gpio18: (gpio18, 18, gpio[18], IO, 0, Bank0),
Gpio19: (gpio19, 19, gpio[19], IO, 0, Bank0),
Gpio20: (gpio20, 20, gpio[20], IO, 0, Bank0), (U0RXD: Function0), (),
Gpio21: (gpio21, 21, gpio[21], IO, 0, Bank0), (), (U0TXD: Function0),
}