Software interrupts runtime binding (#1398)
* Split software interrupts * Make swint0 unavailable on a multi_core target when using thread-executor * Clarify why embassy_multiprio example needs two executors * Make interrupt-executor require a SoftwareInterrupt<n> * Improve code * CHANGELOG.md * Don't use `#[interrupt]` in thread-executor * More docs * Typo fixed
This commit is contained in:
Björn Quentin
GitHub
parent
d26b1bd504
commit
b3bc28efef
@ -55,6 +55,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
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- SYSTIMER and TIMG instances can now be created in async or blocking mode (#1348)
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- Runtime ISR binding for TWAI (#1384)
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- Runtime ISR binding for assist_debug (#1395)
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- Runtime ISR binding for software interrupts, software interrupts are split now, interrupt-executor takes the software interrupt to use, interrupt-executor is easier to use (#1398)
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### Removed
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@ -1,128 +1,96 @@
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//! Interrupt-mode executor.
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use core::{cell::UnsafeCell, marker::PhantomData, mem::MaybeUninit};
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use core::{cell::UnsafeCell, mem::MaybeUninit};
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use embassy_executor::{raw, SendSpawner};
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#[cfg(any(esp32c6, esp32h2))]
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use peripherals::INTPRI as SystemPeripheral;
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#[cfg(not(any(esp32c6, esp32h2)))]
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use peripherals::SYSTEM as SystemPeripheral;
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use portable_atomic::{AtomicUsize, Ordering};
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use crate::{get_core, interrupt, peripherals};
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static FROM_CPU_IRQ_USED: AtomicUsize = AtomicUsize::new(0);
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pub trait SwPendableInterrupt {
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fn enable(priority: interrupt::Priority);
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fn number() -> usize;
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fn pend();
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fn clear();
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}
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macro_rules! from_cpu {
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($irq:literal) => {
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paste::paste! {
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pub struct [<FromCpu $irq>];
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impl [<FromCpu $irq>] {
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fn set_bit(value: bool) {
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let system = unsafe { &*SystemPeripheral::PTR };
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system
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.[<cpu_intr_from_cpu_ $irq>]()
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.write(|w| w.[<cpu_intr_from_cpu_ $irq>]().bit(value));
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}
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}
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impl SwPendableInterrupt for [<FromCpu $irq>] {
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fn enable(priority: interrupt::Priority) {
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let mask = 1 << $irq;
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// We don't allow using the same interrupt for multiple executors.
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if FROM_CPU_IRQ_USED.fetch_or(mask, Ordering::SeqCst) & mask != 0 {
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panic!("FROM_CPU_{} is already used by a different executor.", $irq);
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}
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unwrap!(interrupt::enable(peripherals::Interrupt::[<FROM_CPU_INTR $irq>], priority));
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}
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fn number() -> usize {
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$irq
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}
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fn pend() {
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Self::set_bit(true);
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}
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fn clear() {
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Self::set_bit(false);
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}
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}
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}
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use crate::{
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get_core,
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interrupt::{self, InterruptHandler},
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system::SoftwareInterrupt,
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};
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}
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// from_cpu!(0); // reserve 0 for thread mode & multi-core
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from_cpu!(1);
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from_cpu!(2);
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from_cpu!(3);
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static mut EXECUTORS: [CallbackContext; 4] = [
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CallbackContext::new(),
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CallbackContext::new(),
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CallbackContext::new(),
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CallbackContext::new(),
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];
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/// Interrupt mode executor.
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///
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/// This executor runs tasks in interrupt mode. The interrupt handler is set up
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/// to poll tasks, and when a task is woken the interrupt is pended from
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/// software.
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///
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/// # Interrupt requirements
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///
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/// You must write the interrupt handler yourself, and make it call
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/// [`Self::on_interrupt()`]
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///
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/// ```rust,ignore
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/// #[interrupt]
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/// fn FROM_CPU_INTR1() {
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/// unsafe { INT_EXECUTOR.on_interrupt() }
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/// }
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/// ```
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pub struct InterruptExecutor<SWI>
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where
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SWI: SwPendableInterrupt,
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{
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pub struct InterruptExecutor<const SWI: u8> {
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core: AtomicUsize,
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executor: UnsafeCell<MaybeUninit<raw::Executor>>,
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_interrupt: PhantomData<SWI>,
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interrupt: SoftwareInterrupt<SWI>,
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}
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unsafe impl<SWI: SwPendableInterrupt> Send for InterruptExecutor<SWI> {}
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unsafe impl<SWI: SwPendableInterrupt> Sync for InterruptExecutor<SWI> {}
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unsafe impl<const SWI: u8> Send for InterruptExecutor<SWI> {}
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unsafe impl<const SWI: u8> Sync for InterruptExecutor<SWI> {}
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impl<SWI> InterruptExecutor<SWI>
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where
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SWI: SwPendableInterrupt,
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{
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struct CallbackContext {
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raw_executor: UnsafeCell<*mut raw::Executor>,
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}
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impl CallbackContext {
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const fn new() -> Self {
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Self {
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raw_executor: UnsafeCell::new(core::ptr::null_mut()),
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}
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}
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fn get(&self) -> *mut raw::Executor {
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unsafe { (*self.raw_executor.get()) as *mut raw::Executor }
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}
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fn set(&self, executor: *mut raw::Executor) {
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unsafe {
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self.raw_executor.get().write(executor);
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}
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}
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}
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fn handle_interrupt<const NUM: u8>() {
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let mut swi = unsafe { SoftwareInterrupt::<NUM>::steal() };
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swi.reset();
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unsafe {
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let executor = EXECUTORS[NUM as usize].get().as_mut().unwrap();
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executor.poll();
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}
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}
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extern "C" fn swi_handler0() {
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handle_interrupt::<0>();
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}
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extern "C" fn swi_handler1() {
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handle_interrupt::<1>();
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}
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extern "C" fn swi_handler2() {
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handle_interrupt::<2>();
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}
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extern "C" fn swi_handler3() {
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handle_interrupt::<3>();
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}
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impl<const SWI: u8> InterruptExecutor<SWI> {
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/// Create a new `InterruptExecutor`.
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/// This takes the software interrupt to be used internally.
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#[inline]
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pub const fn new() -> Self {
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pub const fn new(interrupt: SoftwareInterrupt<SWI>) -> Self {
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Self {
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core: AtomicUsize::new(usize::MAX),
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executor: UnsafeCell::new(MaybeUninit::uninit()),
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_interrupt: PhantomData,
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interrupt,
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}
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}
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/// Executor interrupt callback.
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///
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/// # Safety
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///
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/// You MUST call this from the interrupt handler, and from nowhere else.
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// TODO: it would be pretty sweet if we could register our own interrupt handler
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// when vectoring is enabled. The user shouldn't need to provide the handler for
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// us.
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pub unsafe fn on_interrupt(&'static self) {
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SWI::clear();
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let executor = unsafe { (*self.executor.get()).assume_init_ref() };
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executor.poll();
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}
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/// Start the executor at the given priority level.
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///
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/// This initializes the executor, enables the interrupt, and returns.
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@ -135,18 +103,7 @@ where
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///
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/// To obtain a [`Spawner`] for this executor, use
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/// [`Spawner::for_current_executor()`] from a task running in it.
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///
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/// # Interrupt requirements
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///
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/// You must write the interrupt handler yourself, and make it call
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/// [`Self::on_interrupt()`]
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///
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/// This method already enables (unmasks) the interrupt, you must NOT do it
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/// yourself.
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///
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/// [`Spawner`]: embassy_executor::Spawner
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/// [`Spawner::for_current_executor()`]: embassy_executor::Spawner::for_current_executor()
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pub fn start(&'static self, priority: interrupt::Priority) -> SendSpawner {
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pub fn start(&'static mut self, priority: interrupt::Priority) -> SendSpawner {
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if self
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.core
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.compare_exchange(
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@ -163,10 +120,21 @@ where
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unsafe {
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(*self.executor.get())
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.as_mut_ptr()
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.write(raw::Executor::new(SWI::number() as *mut ()))
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.write(raw::Executor::new(SWI as *mut ()));
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EXECUTORS[SWI as usize].set((*self.executor.get()).as_mut_ptr());
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}
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SWI::enable(priority);
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let swi_handler = match SWI {
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0 => swi_handler0,
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1 => swi_handler1,
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2 => swi_handler2,
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3 => swi_handler3,
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_ => unreachable!(),
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};
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self.interrupt
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.set_interrupt_handler(InterruptHandler::new(swi_handler, priority));
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let executor = unsafe { (*self.executor.get()).assume_init_ref() };
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executor.spawner().make_send()
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@ -16,6 +16,9 @@ pub use interrupt::*;
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))]
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#[export_name = "__pender"]
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fn __pender(context: *mut ()) {
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#[cfg(feature = "embassy-executor-interrupt")]
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use crate::system::SoftwareInterrupt;
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let context = (context as usize).to_le_bytes();
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cfg_if::cfg_if! {
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@ -23,9 +26,12 @@ fn __pender(context: *mut ()) {
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match context[0] {
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#[cfg(feature = "embassy-executor-thread")]
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0 => thread::pend_thread_mode(context[1] as usize),
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1 => FromCpu1::pend(),
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2 => FromCpu2::pend(),
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3 => FromCpu3::pend(),
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#[cfg(not(feature = "embassy-executor-thread"))]
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0 => unsafe { SoftwareInterrupt::<0>::steal().raise() },
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1 => unsafe { SoftwareInterrupt::<1>::steal().raise() },
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2 => unsafe { SoftwareInterrupt::<2>::steal().raise() },
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3 => unsafe { SoftwareInterrupt::<3>::steal().raise() },
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_ => {}
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}
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} else {
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@ -3,13 +3,12 @@ use core::marker::PhantomData;
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use embassy_executor::{raw, Spawner};
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use portable_atomic::{AtomicBool, Ordering};
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use crate::{get_core, prelude::interrupt};
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#[cfg(multi_core)]
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use crate::{
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interrupt,
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peripherals::{self, SYSTEM},
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};
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use procmacros::handler;
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use crate::get_core;
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#[cfg(multi_core)]
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use crate::peripherals::SYSTEM;
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/// global atomic used to keep track of whether there is work to do since sev()
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/// is not available on either Xtensa or RISC-V
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@ -18,10 +17,9 @@ static SIGNAL_WORK_THREAD_MODE: [AtomicBool; 1] = [AtomicBool::new(false)];
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#[cfg(multi_core)]
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static SIGNAL_WORK_THREAD_MODE: [AtomicBool; 2] = [AtomicBool::new(false), AtomicBool::new(false)];
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#[interrupt]
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fn FROM_CPU_INTR0() {
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#[cfg(multi_core)]
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{
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#[handler]
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fn software0_interrupt() {
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// This interrupt is fired when the thread-mode executor's core needs to be
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// woken. It doesn't matter which core handles this interrupt first, the
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// point is just to wake up the core that is currently executing
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@ -31,7 +29,6 @@ fn FROM_CPU_INTR0() {
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.cpu_intr_from_cpu_0()
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.write(|w| w.cpu_intr_from_cpu_0().bit(false));
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}
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}
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pub(crate) fn pend_thread_mode(core: usize) {
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// Signal that there is work to be done.
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@ -60,12 +57,15 @@ pub struct Executor {
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impl Executor {
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/// Create a new Executor.
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///
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/// On multi_core systems this will use software-interrupt 0 which isn't
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/// available for anything else.
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pub fn new() -> Self {
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#[cfg(multi_core)]
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unwrap!(interrupt::enable(
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peripherals::Interrupt::FROM_CPU_INTR0,
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interrupt::Priority::Priority1,
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));
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unsafe {
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crate::system::SoftwareInterrupt::<0>::steal()
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.set_interrupt_handler(software0_interrupt)
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}
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Self {
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inner: raw::Executor::new(usize::from_le_bytes([0, get_core() as u8, 0, 0]) as *mut ()),
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@ -107,6 +107,7 @@ impl Executor {
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}
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}
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#[doc(hidden)]
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#[cfg(xtensa)]
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pub fn wait_impl(cpu: usize) {
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// Manual critical section implementation that only masks interrupts handlers.
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@ -138,6 +139,7 @@ impl Executor {
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}
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}
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#[doc(hidden)]
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#[cfg(riscv)]
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pub fn wait_impl(cpu: usize) {
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// we do not care about race conditions between the load and store operations,
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@ -46,7 +46,7 @@ use core::{
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/// dedicated struct is memory efficiency:
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///
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/// Peripheral singletons are typically either zero-sized (for concrete
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/// peripehrals like `PA9` or `Spi4`) or very small (for example `AnyPin` which
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/// peripherals like `PA9` or `Spi4`) or very small (for example `AnyPin` which
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/// is 1 byte). However `&mut T` is always 4 bytes for 32-bit targets, even if T
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/// is zero-sized. PeripheralRef stores a copy of `T` instead, so it's the same
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/// size.
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@ -7,12 +7,11 @@
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//! configure chip clocks, and control radio peripherals.
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//!
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//! ### Software Interrupts
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//! The `SoftwareInterrupt` enum represents the available software interrupt
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//! sources.
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//! The `SoftwareInterruptControl` struct gives access to the available software
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//! interrupts.
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//!
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//! The SoftwareInterruptControl struct allows raising or resetting software
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//! interrupts using the `raise()` and `reset()` methods. The behavior of these
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//! methods depends on the specific chip variant.
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//! The `SoftwareInterrupt` struct allows raising or resetting software
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//! interrupts using the `raise()` and `reset()` methods.
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//!
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//! ### Peripheral Clock Control
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//! The `PeripheralClockControl` struct controls the enablement of peripheral
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@ -28,14 +27,7 @@
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//! let clocks = ClockControl::boot_defaults(system.clock_control).freeze();
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//! ```
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use crate::{peripheral::PeripheralRef, peripherals::SYSTEM};
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pub enum SoftwareInterrupt {
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SoftwareInterrupt0,
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SoftwareInterrupt1,
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SoftwareInterrupt2,
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SoftwareInterrupt3,
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}
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use crate::{interrupt::InterruptHandler, peripheral::PeripheralRef, peripherals::SYSTEM};
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/// Peripherals which can be enabled via `PeripheralClockControl`
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pub enum Peripheral {
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@ -107,68 +99,141 @@ pub enum Peripheral {
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LcdCam,
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}
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pub struct SoftwareInterruptControl {
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_private: (),
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/// A software interrupt can be triggered by software.
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#[non_exhaustive]
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pub struct SoftwareInterrupt<const NUM: u8> {}
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impl<const NUM: u8> SoftwareInterrupt<NUM> {
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/// Sets the interrupt handler for this software-interrupt
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// TODO interrupts missing in PAC or named wrong for P4
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#[cfg(not(esp32p4))]
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pub fn set_interrupt_handler(&mut self, handler: InterruptHandler) {
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let interrupt = match NUM {
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0 => crate::peripherals::Interrupt::FROM_CPU_INTR0,
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1 => crate::peripherals::Interrupt::FROM_CPU_INTR1,
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2 => crate::peripherals::Interrupt::FROM_CPU_INTR2,
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3 => crate::peripherals::Interrupt::FROM_CPU_INTR3,
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_ => unreachable!(),
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};
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unsafe {
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crate::interrupt::bind_interrupt(interrupt, handler.handler());
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crate::interrupt::enable(interrupt, handler.priority()).unwrap();
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}
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}
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impl SoftwareInterruptControl {
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pub fn raise(&mut self, interrupt: SoftwareInterrupt) {
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/// Trigger this software-interrupt
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pub fn raise(&mut self) {
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#[cfg(not(any(esp32c6, esp32h2)))]
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let system = unsafe { &*SYSTEM::PTR };
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#[cfg(any(esp32c6, esp32h2))]
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let system = unsafe { &*crate::peripherals::INTPRI::PTR };
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match interrupt {
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SoftwareInterrupt::SoftwareInterrupt0 => {
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match NUM {
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0 => {
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system
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.cpu_intr_from_cpu_0()
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.write(|w| w.cpu_intr_from_cpu_0().set_bit());
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}
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SoftwareInterrupt::SoftwareInterrupt1 => {
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1 => {
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system
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.cpu_intr_from_cpu_1()
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.write(|w| w.cpu_intr_from_cpu_1().set_bit());
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}
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SoftwareInterrupt::SoftwareInterrupt2 => {
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2 => {
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system
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.cpu_intr_from_cpu_2()
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.write(|w| w.cpu_intr_from_cpu_2().set_bit());
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}
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SoftwareInterrupt::SoftwareInterrupt3 => {
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3 => {
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system
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.cpu_intr_from_cpu_3()
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.write(|w| w.cpu_intr_from_cpu_3().set_bit());
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}
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_ => unreachable!(),
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}
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}
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pub fn reset(&mut self, interrupt: SoftwareInterrupt) {
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/// Resets this software-interrupt
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pub fn reset(&mut self) {
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#[cfg(not(any(esp32c6, esp32h2)))]
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let system = unsafe { &*SYSTEM::PTR };
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#[cfg(any(esp32c6, esp32h2))]
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let system = unsafe { &*crate::peripherals::INTPRI::PTR };
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match interrupt {
|
||||
SoftwareInterrupt::SoftwareInterrupt0 => {
|
||||
match NUM {
|
||||
0 => {
|
||||
system
|
||||
.cpu_intr_from_cpu_0()
|
||||
.write(|w| w.cpu_intr_from_cpu_0().clear_bit());
|
||||
}
|
||||
SoftwareInterrupt::SoftwareInterrupt1 => {
|
||||
1 => {
|
||||
system
|
||||
.cpu_intr_from_cpu_1()
|
||||
.write(|w| w.cpu_intr_from_cpu_1().clear_bit());
|
||||
}
|
||||
SoftwareInterrupt::SoftwareInterrupt2 => {
|
||||
2 => {
|
||||
system
|
||||
.cpu_intr_from_cpu_2()
|
||||
.write(|w| w.cpu_intr_from_cpu_2().clear_bit());
|
||||
}
|
||||
SoftwareInterrupt::SoftwareInterrupt3 => {
|
||||
3 => {
|
||||
system
|
||||
.cpu_intr_from_cpu_3()
|
||||
.write(|w| w.cpu_intr_from_cpu_3().clear_bit());
|
||||
}
|
||||
_ => unreachable!(),
|
||||
}
|
||||
}
|
||||
|
||||
/// Unsafely create an instance of this peripheral out of thin air.
|
||||
///
|
||||
/// # Safety
|
||||
///
|
||||
/// You must ensure that you're only using one instance of this type at a
|
||||
/// time.
|
||||
#[inline]
|
||||
pub unsafe fn steal() -> Self {
|
||||
Self {}
|
||||
}
|
||||
}
|
||||
|
||||
impl<const NUM: u8> crate::peripheral::Peripheral for SoftwareInterrupt<NUM> {
|
||||
type P = SoftwareInterrupt<NUM>;
|
||||
|
||||
#[inline]
|
||||
unsafe fn clone_unchecked(&mut self) -> Self::P {
|
||||
Self::steal()
|
||||
}
|
||||
}
|
||||
|
||||
impl<const NUM: u8> crate::private::Sealed for SoftwareInterrupt<NUM> {}
|
||||
|
||||
/// This gives access to the available software interrupts.
|
||||
///
|
||||
/// Please note: Software interrupt 0 is not available when using the
|
||||
/// `embassy-executor-thread` feature
|
||||
#[non_exhaustive]
|
||||
pub struct SoftwareInterruptControl {
|
||||
#[cfg(not(all(feature = "embassy-executor-thread", multi_core)))]
|
||||
pub software_interrupt0: SoftwareInterrupt<0>,
|
||||
pub software_interrupt1: SoftwareInterrupt<1>,
|
||||
pub software_interrupt2: SoftwareInterrupt<2>,
|
||||
pub software_interrupt3: SoftwareInterrupt<3>,
|
||||
}
|
||||
|
||||
impl SoftwareInterruptControl {
|
||||
fn new_internal() -> Self {
|
||||
// the thread-executor uses SW-INT0 when used on a multi-core system
|
||||
// we cannot easily require `software_interrupt0` there since it's created
|
||||
// before `main` via proc-macro
|
||||
|
||||
SoftwareInterruptControl {
|
||||
#[cfg(not(all(feature = "embassy-executor-thread", multi_core)))]
|
||||
software_interrupt0: SoftwareInterrupt {},
|
||||
software_interrupt1: SoftwareInterrupt {},
|
||||
software_interrupt2: SoftwareInterrupt {},
|
||||
software_interrupt3: SoftwareInterrupt {},
|
||||
}
|
||||
}
|
||||
}
|
||||
@ -1025,6 +1090,7 @@ pub struct CpuControl {
|
||||
_private: (),
|
||||
}
|
||||
|
||||
/// Enumeration of the available radio peripherals for this chip.
|
||||
pub enum RadioPeripherals {
|
||||
#[cfg(phy)]
|
||||
Phy,
|
||||
@ -1036,6 +1102,7 @@ pub enum RadioPeripherals {
|
||||
Ieee802154,
|
||||
}
|
||||
|
||||
/// Functionality of clocks controlling the radio peripherals.
|
||||
pub struct RadioClockControl {
|
||||
_private: (),
|
||||
}
|
||||
@ -1087,7 +1154,7 @@ impl<'d, T: crate::peripheral::Peripheral<P = SYSTEM> + 'd> SystemExt<'d> for T
|
||||
clock_control: SystemClockControl { _private: () },
|
||||
cpu_control: CpuControl { _private: () },
|
||||
radio_clock_control: RadioClockControl { _private: () },
|
||||
software_interrupt_control: SoftwareInterruptControl { _private: () },
|
||||
software_interrupt_control: SoftwareInterruptControl::new_internal(),
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
@ -11,10 +11,10 @@ use esp_hal::{
|
||||
interrupt::{self, CpuInterrupt, Priority},
|
||||
peripherals::{Interrupt, Peripherals},
|
||||
prelude::*,
|
||||
system::{SoftwareInterrupt, SoftwareInterruptControl},
|
||||
system::SoftwareInterrupt,
|
||||
};
|
||||
|
||||
static SWINT: Mutex<RefCell<Option<SoftwareInterruptControl>>> = Mutex::new(RefCell::new(None));
|
||||
static SWINT0: Mutex<RefCell<Option<SoftwareInterrupt<0>>>> = Mutex::new(RefCell::new(None));
|
||||
|
||||
#[entry]
|
||||
fn main() -> ! {
|
||||
@ -31,7 +31,11 @@ fn main() -> ! {
|
||||
let system = peripherals.SYSTEM.split();
|
||||
let sw_int = system.software_interrupt_control;
|
||||
|
||||
critical_section::with(|cs| SWINT.borrow_ref_mut(cs).replace(sw_int));
|
||||
critical_section::with(|cs| {
|
||||
SWINT0
|
||||
.borrow_ref_mut(cs)
|
||||
.replace(sw_int.software_interrupt0)
|
||||
});
|
||||
interrupt::enable_direct(
|
||||
Interrupt::FROM_CPU_INTR0,
|
||||
Priority::Priority3,
|
||||
@ -67,14 +71,10 @@ fn main() -> ! {
|
||||
}
|
||||
|
||||
#[no_mangle]
|
||||
fn cpu_int_20_handler() {
|
||||
fn interrupt20() {
|
||||
unsafe { asm!("csrrwi x0, 0x7e1, 0 #disable timer") }
|
||||
critical_section::with(|cs| {
|
||||
SWINT
|
||||
.borrow_ref_mut(cs)
|
||||
.as_mut()
|
||||
.unwrap()
|
||||
.reset(SoftwareInterrupt::SoftwareInterrupt0);
|
||||
SWINT0.borrow_ref_mut(cs).as_mut().unwrap().reset();
|
||||
});
|
||||
|
||||
let mut perf_counter: u32 = 0;
|
||||
|
||||
@ -18,10 +18,7 @@ use esp_backtrace as _;
|
||||
use esp_hal::{
|
||||
clock::ClockControl,
|
||||
cpu_control::{CpuControl, Stack},
|
||||
embassy::{
|
||||
self,
|
||||
executor::{FromCpu1, FromCpu2, InterruptExecutor},
|
||||
},
|
||||
embassy::{self, executor::InterruptExecutor},
|
||||
get_core,
|
||||
gpio::{GpioPin, Output, PushPull, IO},
|
||||
interrupt::Priority,
|
||||
@ -34,19 +31,6 @@ use static_cell::make_static;
|
||||
|
||||
static mut APP_CORE_STACK: Stack<8192> = Stack::new();
|
||||
|
||||
static INT_EXECUTOR_CORE_0: InterruptExecutor<FromCpu1> = InterruptExecutor::new();
|
||||
static INT_EXECUTOR_CORE_1: InterruptExecutor<FromCpu2> = InterruptExecutor::new();
|
||||
|
||||
#[interrupt]
|
||||
fn FROM_CPU_INTR1() {
|
||||
unsafe { INT_EXECUTOR_CORE_0.on_interrupt() }
|
||||
}
|
||||
|
||||
#[interrupt]
|
||||
fn FROM_CPU_INTR2() {
|
||||
unsafe { INT_EXECUTOR_CORE_1.on_interrupt() }
|
||||
}
|
||||
|
||||
/// Waits for a message that contains a duration, then flashes a led for that
|
||||
/// duration of time.
|
||||
#[embassy_executor::task]
|
||||
@ -101,8 +85,13 @@ fn main() -> ! {
|
||||
let led_ctrl_signal = &*make_static!(Signal::new());
|
||||
|
||||
let led = io.pins.gpio0.into_push_pull_output();
|
||||
|
||||
let executor_core1 =
|
||||
InterruptExecutor::new(system.software_interrupt_control.software_interrupt1);
|
||||
let executor_core1 = make_static!(executor_core1);
|
||||
|
||||
let cpu1_fnctn = move || {
|
||||
let spawner = INT_EXECUTOR_CORE_1.start(Priority::Priority1);
|
||||
let spawner = executor_core1.start(Priority::Priority1);
|
||||
|
||||
spawner.spawn(control_led(led, led_ctrl_signal)).ok();
|
||||
|
||||
@ -113,7 +102,11 @@ fn main() -> ! {
|
||||
.start_app_core(unsafe { &mut *addr_of_mut!(APP_CORE_STACK) }, cpu1_fnctn)
|
||||
.unwrap();
|
||||
|
||||
let spawner = INT_EXECUTOR_CORE_0.start(Priority::Priority1);
|
||||
let executor_core0 =
|
||||
InterruptExecutor::new(system.software_interrupt_control.software_interrupt0);
|
||||
let executor_core0 = make_static!(executor_core0);
|
||||
|
||||
let spawner = executor_core0.start(Priority::Priority1);
|
||||
spawner.spawn(enable_disable_led(led_ctrl_signal)).ok();
|
||||
|
||||
// Just loop to show that the main thread does not need to poll the executor.
|
||||
|
||||
@ -11,8 +11,11 @@
|
||||
//! demonstrates that this task will continue to run even while the low
|
||||
//! priority blocking task is running.
|
||||
|
||||
// HINT: At first it looks a bit suspicious that we need *two* executor features enabled here but that's because we are really using
|
||||
// both together. The thread-executor is created by the `#[main]` macro and is used to spawn `low_prio_async` and `low_prio_blocking`.
|
||||
// The interrupt-executor is created in `main` and is used to spawn `high_prio`.
|
||||
|
||||
//% CHIPS: esp32 esp32c2 esp32c3 esp32c6 esp32h2 esp32s2 esp32s3
|
||||
// FIXME: We should not need *two* executor features enabled here...
|
||||
//% FEATURES: embassy embassy-executor-interrupt embassy-executor-thread embassy-time-timg0 embassy-generic-timers
|
||||
|
||||
#![no_std]
|
||||
@ -24,23 +27,14 @@ use embassy_time::{Duration, Instant, Ticker, Timer};
|
||||
use esp_backtrace as _;
|
||||
use esp_hal::{
|
||||
clock::ClockControl,
|
||||
embassy::{
|
||||
self,
|
||||
executor::{FromCpu1, InterruptExecutor},
|
||||
},
|
||||
embassy::{self, executor::InterruptExecutor},
|
||||
interrupt::Priority,
|
||||
peripherals::Peripherals,
|
||||
prelude::*,
|
||||
timer::TimerGroup,
|
||||
};
|
||||
use esp_println::println;
|
||||
|
||||
static INT_EXECUTOR_0: InterruptExecutor<FromCpu1> = InterruptExecutor::new();
|
||||
|
||||
#[interrupt]
|
||||
fn FROM_CPU_INTR1() {
|
||||
unsafe { INT_EXECUTOR_0.on_interrupt() }
|
||||
}
|
||||
use static_cell::make_static;
|
||||
|
||||
/// Periodically print something.
|
||||
#[embassy_executor::task]
|
||||
@ -79,6 +73,7 @@ async fn low_prio_async() {
|
||||
|
||||
#[main]
|
||||
async fn main(low_prio_spawner: Spawner) {
|
||||
esp_println::logger::init_logger_from_env();
|
||||
println!("Init!");
|
||||
let peripherals = Peripherals::take();
|
||||
let system = peripherals.SYSTEM.split();
|
||||
@ -87,7 +82,10 @@ async fn main(low_prio_spawner: Spawner) {
|
||||
let timg0 = TimerGroup::new_async(peripherals.TIMG0, &clocks);
|
||||
embassy::init(&clocks, timg0);
|
||||
|
||||
let spawner = INT_EXECUTOR_0.start(Priority::Priority2);
|
||||
let executor = InterruptExecutor::new(system.software_interrupt_control.software_interrupt2);
|
||||
let executor = make_static!(executor);
|
||||
|
||||
let spawner = executor.start(Priority::Priority3);
|
||||
spawner.must_spawn(high_prio());
|
||||
|
||||
println!("Spawning low-priority tasks");
|
||||
|
||||
@ -13,27 +13,48 @@ use core::cell::RefCell;
|
||||
|
||||
use critical_section::Mutex;
|
||||
use esp_backtrace as _;
|
||||
use esp_hal::{
|
||||
interrupt::{self, Priority},
|
||||
peripherals::{Interrupt, Peripherals},
|
||||
prelude::*,
|
||||
system::{SoftwareInterrupt, SoftwareInterruptControl},
|
||||
};
|
||||
use esp_hal::{peripherals::Peripherals, prelude::*, system::SoftwareInterrupt};
|
||||
|
||||
static SWINT: Mutex<RefCell<Option<SoftwareInterruptControl>>> = Mutex::new(RefCell::new(None));
|
||||
static SWINT0: Mutex<RefCell<Option<SoftwareInterrupt<0>>>> = Mutex::new(RefCell::new(None));
|
||||
static SWINT1: Mutex<RefCell<Option<SoftwareInterrupt<1>>>> = Mutex::new(RefCell::new(None));
|
||||
static SWINT2: Mutex<RefCell<Option<SoftwareInterrupt<2>>>> = Mutex::new(RefCell::new(None));
|
||||
static SWINT3: Mutex<RefCell<Option<SoftwareInterrupt<3>>>> = Mutex::new(RefCell::new(None));
|
||||
|
||||
#[entry]
|
||||
fn main() -> ! {
|
||||
let peripherals = Peripherals::take();
|
||||
let system = peripherals.SYSTEM.split();
|
||||
let sw_int = system.software_interrupt_control;
|
||||
let mut sw_int = system.software_interrupt_control;
|
||||
|
||||
critical_section::with(|cs| SWINT.borrow_ref_mut(cs).replace(sw_int));
|
||||
critical_section::with(|cs| {
|
||||
sw_int
|
||||
.software_interrupt0
|
||||
.set_interrupt_handler(swint0_handler);
|
||||
SWINT0
|
||||
.borrow_ref_mut(cs)
|
||||
.replace(sw_int.software_interrupt0);
|
||||
|
||||
interrupt::enable(Interrupt::FROM_CPU_INTR0, Priority::Priority1).unwrap();
|
||||
interrupt::enable(Interrupt::FROM_CPU_INTR1, Priority::Priority2).unwrap();
|
||||
interrupt::enable(Interrupt::FROM_CPU_INTR2, Priority::Priority2).unwrap();
|
||||
interrupt::enable(Interrupt::FROM_CPU_INTR3, Priority::Priority3).unwrap();
|
||||
sw_int
|
||||
.software_interrupt1
|
||||
.set_interrupt_handler(swint1_handler);
|
||||
SWINT1
|
||||
.borrow_ref_mut(cs)
|
||||
.replace(sw_int.software_interrupt1);
|
||||
|
||||
sw_int
|
||||
.software_interrupt2
|
||||
.set_interrupt_handler(swint2_handler);
|
||||
SWINT2
|
||||
.borrow_ref_mut(cs)
|
||||
.replace(sw_int.software_interrupt2);
|
||||
|
||||
sw_int
|
||||
.software_interrupt3
|
||||
.set_interrupt_handler(swint3_handler);
|
||||
SWINT3
|
||||
.borrow_ref_mut(cs)
|
||||
.replace(sw_int.software_interrupt3);
|
||||
});
|
||||
|
||||
// Raise mid priority interrupt.
|
||||
//
|
||||
@ -42,77 +63,44 @@ fn main() -> ! {
|
||||
// exiting the handler Once the handler is exited we expect to see same
|
||||
// priority and low priority interrupts served in that order.
|
||||
critical_section::with(|cs| {
|
||||
SWINT
|
||||
.borrow_ref_mut(cs)
|
||||
.as_mut()
|
||||
.unwrap()
|
||||
.raise(SoftwareInterrupt::SoftwareInterrupt1);
|
||||
SWINT1.borrow_ref_mut(cs).as_mut().unwrap().raise();
|
||||
});
|
||||
|
||||
loop {}
|
||||
}
|
||||
|
||||
#[interrupt]
|
||||
fn FROM_CPU_INTR0() {
|
||||
#[handler(priority = esp_hal::interrupt::Priority::Priority1)]
|
||||
fn swint0_handler() {
|
||||
esp_println::println!("SW interrupt0");
|
||||
critical_section::with(|cs| {
|
||||
SWINT
|
||||
.borrow_ref_mut(cs)
|
||||
.as_mut()
|
||||
.unwrap()
|
||||
.reset(SoftwareInterrupt::SoftwareInterrupt0);
|
||||
SWINT0.borrow_ref_mut(cs).as_mut().unwrap().reset();
|
||||
});
|
||||
}
|
||||
|
||||
#[interrupt]
|
||||
fn FROM_CPU_INTR1() {
|
||||
#[handler(priority = esp_hal::interrupt::Priority::Priority2)]
|
||||
fn swint1_handler() {
|
||||
esp_println::println!("SW interrupt1 entry");
|
||||
critical_section::with(|cs| {
|
||||
SWINT
|
||||
.borrow_ref_mut(cs)
|
||||
.as_mut()
|
||||
.unwrap()
|
||||
.reset(SoftwareInterrupt::SoftwareInterrupt1);
|
||||
SWINT
|
||||
.borrow_ref_mut(cs)
|
||||
.as_mut()
|
||||
.unwrap()
|
||||
.raise(SoftwareInterrupt::SoftwareInterrupt2); // raise interrupt at same priority
|
||||
SWINT
|
||||
.borrow_ref_mut(cs)
|
||||
.as_mut()
|
||||
.unwrap()
|
||||
.raise(SoftwareInterrupt::SoftwareInterrupt3); // raise interrupt at higher priority
|
||||
SWINT
|
||||
.borrow_ref_mut(cs)
|
||||
.as_mut()
|
||||
.unwrap()
|
||||
.raise(SoftwareInterrupt::SoftwareInterrupt0); // raise interrupt at
|
||||
// lower priority
|
||||
SWINT1.borrow_ref_mut(cs).as_mut().unwrap().reset();
|
||||
SWINT2.borrow_ref_mut(cs).as_mut().unwrap().raise(); // raise interrupt at same priority
|
||||
SWINT3.borrow_ref_mut(cs).as_mut().unwrap().raise(); // raise interrupt at higher priority
|
||||
SWINT0.borrow_ref_mut(cs).as_mut().unwrap().raise(); // raise interrupt at lower priority
|
||||
});
|
||||
esp_println::println!("SW interrupt1 exit");
|
||||
}
|
||||
|
||||
#[interrupt]
|
||||
fn FROM_CPU_INTR2() {
|
||||
#[handler(priority = esp_hal::interrupt::Priority::Priority2)]
|
||||
fn swint2_handler() {
|
||||
esp_println::println!("SW interrupt2");
|
||||
critical_section::with(|cs| {
|
||||
SWINT
|
||||
.borrow_ref_mut(cs)
|
||||
.as_mut()
|
||||
.unwrap()
|
||||
.reset(SoftwareInterrupt::SoftwareInterrupt2);
|
||||
SWINT2.borrow_ref_mut(cs).as_mut().unwrap().reset();
|
||||
});
|
||||
}
|
||||
|
||||
#[interrupt]
|
||||
fn FROM_CPU_INTR3() {
|
||||
#[handler(priority = esp_hal::interrupt::Priority::Priority3)]
|
||||
fn swint3_handler() {
|
||||
esp_println::println!("SW interrupt3");
|
||||
critical_section::with(|cs| {
|
||||
SWINT
|
||||
.borrow_ref_mut(cs)
|
||||
.as_mut()
|
||||
.unwrap()
|
||||
.reset(SoftwareInterrupt::SoftwareInterrupt3);
|
||||
SWINT3.borrow_ref_mut(cs).as_mut().unwrap().reset();
|
||||
});
|
||||
}
|
||||
|
||||
@ -16,13 +16,15 @@ use esp_backtrace as _;
|
||||
use esp_hal::{
|
||||
clock::ClockControl,
|
||||
delay::Delay,
|
||||
interrupt::{self, Priority},
|
||||
peripherals::{Interrupt, Peripherals},
|
||||
peripherals::Peripherals,
|
||||
prelude::*,
|
||||
system::{SoftwareInterrupt, SoftwareInterruptControl},
|
||||
system::SoftwareInterrupt,
|
||||
};
|
||||
|
||||
static SWINT: Mutex<RefCell<Option<SoftwareInterruptControl>>> = Mutex::new(RefCell::new(None));
|
||||
static SWINT0: Mutex<RefCell<Option<SoftwareInterrupt<0>>>> = Mutex::new(RefCell::new(None));
|
||||
static SWINT1: Mutex<RefCell<Option<SoftwareInterrupt<1>>>> = Mutex::new(RefCell::new(None));
|
||||
static SWINT2: Mutex<RefCell<Option<SoftwareInterrupt<2>>>> = Mutex::new(RefCell::new(None));
|
||||
static SWINT3: Mutex<RefCell<Option<SoftwareInterrupt<3>>>> = Mutex::new(RefCell::new(None));
|
||||
|
||||
#[entry]
|
||||
fn main() -> ! {
|
||||
@ -30,13 +32,36 @@ fn main() -> ! {
|
||||
let system = peripherals.SYSTEM.split();
|
||||
let clocks = ClockControl::boot_defaults(system.clock_control).freeze();
|
||||
|
||||
let sw_int = system.software_interrupt_control;
|
||||
critical_section::with(|cs| SWINT.borrow_ref_mut(cs).replace(sw_int));
|
||||
let mut sw_int = system.software_interrupt_control;
|
||||
critical_section::with(|cs| {
|
||||
sw_int
|
||||
.software_interrupt0
|
||||
.set_interrupt_handler(swint0_handler);
|
||||
SWINT0
|
||||
.borrow_ref_mut(cs)
|
||||
.replace(sw_int.software_interrupt0);
|
||||
|
||||
interrupt::enable(Interrupt::FROM_CPU_INTR0, Priority::Priority3).unwrap();
|
||||
interrupt::enable(Interrupt::FROM_CPU_INTR1, Priority::Priority3).unwrap();
|
||||
interrupt::enable(Interrupt::FROM_CPU_INTR2, Priority::Priority3).unwrap();
|
||||
interrupt::enable(Interrupt::FROM_CPU_INTR3, Priority::Priority3).unwrap();
|
||||
sw_int
|
||||
.software_interrupt1
|
||||
.set_interrupt_handler(swint1_handler);
|
||||
SWINT1
|
||||
.borrow_ref_mut(cs)
|
||||
.replace(sw_int.software_interrupt1);
|
||||
|
||||
sw_int
|
||||
.software_interrupt2
|
||||
.set_interrupt_handler(swint2_handler);
|
||||
SWINT2
|
||||
.borrow_ref_mut(cs)
|
||||
.replace(sw_int.software_interrupt2);
|
||||
|
||||
sw_int
|
||||
.software_interrupt3
|
||||
.set_interrupt_handler(swint3_handler);
|
||||
SWINT3
|
||||
.borrow_ref_mut(cs)
|
||||
.replace(sw_int.software_interrupt3);
|
||||
});
|
||||
|
||||
let delay = Delay::new(&clocks);
|
||||
let mut counter = 0;
|
||||
@ -45,33 +70,17 @@ fn main() -> ! {
|
||||
delay.delay_millis(500);
|
||||
match counter {
|
||||
0 => critical_section::with(|cs| {
|
||||
SWINT
|
||||
.borrow_ref_mut(cs)
|
||||
.as_mut()
|
||||
.unwrap()
|
||||
.raise(SoftwareInterrupt::SoftwareInterrupt0);
|
||||
SWINT0.borrow_ref_mut(cs).as_mut().unwrap().raise();
|
||||
}),
|
||||
1 => critical_section::with(|cs| {
|
||||
SWINT
|
||||
.borrow_ref_mut(cs)
|
||||
.as_mut()
|
||||
.unwrap()
|
||||
.raise(SoftwareInterrupt::SoftwareInterrupt1);
|
||||
SWINT1.borrow_ref_mut(cs).as_mut().unwrap().raise();
|
||||
}),
|
||||
2 => critical_section::with(|cs| {
|
||||
SWINT
|
||||
.borrow_ref_mut(cs)
|
||||
.as_mut()
|
||||
.unwrap()
|
||||
.raise(SoftwareInterrupt::SoftwareInterrupt2);
|
||||
SWINT2.borrow_ref_mut(cs).as_mut().unwrap().raise();
|
||||
}),
|
||||
3 => {
|
||||
critical_section::with(|cs| {
|
||||
SWINT
|
||||
.borrow_ref_mut(cs)
|
||||
.as_mut()
|
||||
.unwrap()
|
||||
.raise(SoftwareInterrupt::SoftwareInterrupt3);
|
||||
SWINT3.borrow_ref_mut(cs).as_mut().unwrap().raise();
|
||||
});
|
||||
counter = -1
|
||||
}
|
||||
@ -81,50 +90,34 @@ fn main() -> ! {
|
||||
}
|
||||
}
|
||||
|
||||
#[interrupt]
|
||||
fn FROM_CPU_INTR0() {
|
||||
#[handler]
|
||||
fn swint0_handler() {
|
||||
esp_println::println!("SW interrupt0");
|
||||
critical_section::with(|cs| {
|
||||
SWINT
|
||||
.borrow_ref_mut(cs)
|
||||
.as_mut()
|
||||
.unwrap()
|
||||
.reset(SoftwareInterrupt::SoftwareInterrupt0);
|
||||
SWINT0.borrow_ref_mut(cs).as_mut().unwrap().reset();
|
||||
});
|
||||
}
|
||||
|
||||
#[interrupt]
|
||||
fn FROM_CPU_INTR1() {
|
||||
#[handler]
|
||||
fn swint1_handler() {
|
||||
esp_println::println!("SW interrupt1");
|
||||
critical_section::with(|cs| {
|
||||
SWINT
|
||||
.borrow_ref_mut(cs)
|
||||
.as_mut()
|
||||
.unwrap()
|
||||
.reset(SoftwareInterrupt::SoftwareInterrupt1);
|
||||
SWINT1.borrow_ref_mut(cs).as_mut().unwrap().reset();
|
||||
});
|
||||
}
|
||||
|
||||
#[interrupt]
|
||||
fn FROM_CPU_INTR2() {
|
||||
#[handler]
|
||||
fn swint2_handler() {
|
||||
esp_println::println!("SW interrupt2");
|
||||
critical_section::with(|cs| {
|
||||
SWINT
|
||||
.borrow_ref_mut(cs)
|
||||
.as_mut()
|
||||
.unwrap()
|
||||
.reset(SoftwareInterrupt::SoftwareInterrupt2);
|
||||
SWINT2.borrow_ref_mut(cs).as_mut().unwrap().reset();
|
||||
});
|
||||
}
|
||||
|
||||
#[interrupt]
|
||||
fn FROM_CPU_INTR3() {
|
||||
#[handler]
|
||||
fn swint3_handler() {
|
||||
esp_println::println!("SW interrupt3");
|
||||
critical_section::with(|cs| {
|
||||
SWINT
|
||||
.borrow_ref_mut(cs)
|
||||
.as_mut()
|
||||
.unwrap()
|
||||
.reset(SoftwareInterrupt::SoftwareInterrupt3);
|
||||
SWINT3.borrow_ref_mut(cs).as_mut().unwrap().reset();
|
||||
});
|
||||
}
|
||||
|
||||
Loading…
Reference in New Issue
Block a user