From b06c7a470c0242eace7d5ef616a3ccbad4d52239 Mon Sep 17 00:00:00 2001 From: Jesse Braham Date: Mon, 25 Nov 2024 07:18:14 -0800 Subject: [PATCH] Remove unnecessary features from `esp-hal-procmacros`, enable `rtc-slow` feature for Xtensa devices (#2594) * Remove unnecessary features from `esp-hal-procmacros` * Enable the `esp-hal-procmacros/rtc-slow` feature for Xtensa devices * Update CHANGELOGs --- esp-hal-procmacros/CHANGELOG.md | 2 ++ esp-hal-procmacros/Cargo.toml | 14 ++++---------- esp-hal-procmacros/src/lib.rs | 33 +++++++++++---------------------- esp-hal/CHANGELOG.md | 3 +++ esp-hal/Cargo.toml | 12 ++++++------ 5 files changed, 26 insertions(+), 38 deletions(-) diff --git a/esp-hal-procmacros/CHANGELOG.md b/esp-hal-procmacros/CHANGELOG.md index 7e90c27a3..66ef0b783 100644 --- a/esp-hal-procmacros/CHANGELOG.md +++ b/esp-hal-procmacros/CHANGELOG.md @@ -15,6 +15,8 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0 ### Removed +- Removed the `enum-dispatch`, `interrupt`, and `ram` features (#2594) + ## [0.15.0] - 2024-11-20 ### Changed diff --git a/esp-hal-procmacros/Cargo.toml b/esp-hal-procmacros/Cargo.toml index ad86f25ef..bb4e9592f 100644 --- a/esp-hal-procmacros/Cargo.toml +++ b/esp-hal-procmacros/Cargo.toml @@ -17,24 +17,18 @@ proc-macro = true darling = "0.20.10" document-features = "0.2.10" litrs = "0.4.1" -object = { version = "0.36.5", optional = true, default-features = false, features = ["read_core", "elf"] } +object = { version = "0.36.5", default-features = false, features = ["read_core", "elf"], optional = true } proc-macro-crate = "3.2.0" proc-macro-error2 = "2.0.1" -proc-macro2 = "1.0.89" +proc-macro2 = "1.0.92" quote = "1.0.37" -syn = { version = "2.0.87", features = ["extra-traits", "full"] } +syn = { version = "2.0.89", features = ["extra-traits", "full"] } [features] ## Provide a `#[main]` procmacro to mark the entry point for Embassy applications. embassy = [] -## Provide enum dispatch helpers. -enum-dispatch = [] -## Provide an `#[interrupt]` procmacro for defining interrupt service routines. -interrupt = [] -## Provide a `#[ram]` procmacro to place functions in RAM instead of flash. -ram = [] ## Indicates the target device has RTC slow memory available. -rtc_slow = [] +rtc-slow = [] #! ### Low-power Core Feature Flags ## Indicate that the SoC contains an LP core. diff --git a/esp-hal-procmacros/src/lib.rs b/esp-hal-procmacros/src/lib.rs index c3a2afcdc..d893096f3 100644 --- a/esp-hal-procmacros/src/lib.rs +++ b/esp-hal-procmacros/src/lib.rs @@ -47,12 +47,17 @@ #![doc = document_features::document_features!()] #![doc(html_logo_url = "https://avatars.githubusercontent.com/u/46717278")] -#[allow(unused)] -use proc_macro::TokenStream; +use darling::{ast::NestedMeta, Error, FromMeta}; +use proc_macro::{Span, TokenStream}; +use proc_macro2::Ident; +use proc_macro_crate::{crate_name, FoundCrate}; +use proc_macro_error2::abort; +use syn::{parse, parse::Error as ParseError, spanned::Spanned, Item, ItemFn, ReturnType, Type}; + +use self::interrupt::{check_attr_whitelist, WhiteListCaller}; #[cfg(feature = "embassy")] mod embassy; -#[cfg(feature = "interrupt")] mod interrupt; #[cfg(any( feature = "is-lp-core", @@ -62,7 +67,6 @@ mod interrupt; ))] mod lp_core; -#[cfg(feature = "ram")] #[derive(Debug, Default, darling::FromMeta)] #[darling(default)] struct RamArgs { @@ -80,7 +84,7 @@ struct RamArgs { /// # Options /// /// - `rtc_fast`: Use RTC fast RAM. -/// - `rtc_slow`: Use RTC slow RAM. **Note**: not available on all targets +/// - `rtc_slow`: Use RTC slow RAM. **Note**: not available on all targets. /// - `persistent`: Persist the contents of the `static` across resets. See [the /// section below](#persistent) for details. /// - `zeroed`: Initialize the memory of the `static` to zero. The initializer @@ -126,15 +130,9 @@ struct RamArgs { /// /// [`bytemuck::AnyBitPattern`]: https://docs.rs/bytemuck/1.9.0/bytemuck/trait.AnyBitPattern.html /// [`bytemuck::Zeroable`]: https://docs.rs/bytemuck/1.9.0/bytemuck/trait.Zeroable.html -#[cfg(feature = "ram")] #[proc_macro_attribute] #[proc_macro_error2::proc_macro_error] pub fn ram(args: TokenStream, input: TokenStream) -> TokenStream { - use darling::{ast::NestedMeta, Error, FromMeta}; - use proc_macro::Span; - use proc_macro_error2::abort; - use syn::{parse, Item}; - let attr_args = match NestedMeta::parse_meta_list(args.into()) { Ok(v) => v, Err(e) => { @@ -156,7 +154,7 @@ pub fn ram(args: TokenStream, input: TokenStream) -> TokenStream { let item: Item = parse(input).expect("failed to parse input"); - #[cfg(not(feature = "rtc_slow"))] + #[cfg(not(feature = "rtc-slow"))] if rtc_slow { abort!( Span::call_site(), @@ -206,7 +204,7 @@ pub fn ram(args: TokenStream, input: TokenStream) -> TokenStream { let trait_check = trait_check.map(|name| { use proc_macro_crate::{crate_name, FoundCrate}; - let hal = proc_macro2::Ident::new( + let hal = Ident::new( if let Ok(FoundCrate::Name(ref name)) = crate_name("esp-hal") { name } else { @@ -240,18 +238,9 @@ pub fn ram(args: TokenStream, input: TokenStream) -> TokenStream { /// esp_hal::interrupt::Priority::Priority2)]`. /// /// If no priority is given, `Priority::min()` is assumed -#[cfg(feature = "interrupt")] #[proc_macro_error2::proc_macro_error] #[proc_macro_attribute] pub fn handler(args: TokenStream, input: TokenStream) -> TokenStream { - use darling::{ast::NestedMeta, FromMeta}; - use proc_macro::Span; - use proc_macro2::Ident; - use proc_macro_crate::{crate_name, FoundCrate}; - use syn::{parse::Error as ParseError, spanned::Spanned, ItemFn, ReturnType, Type}; - - use self::interrupt::{check_attr_whitelist, WhiteListCaller}; - #[derive(Debug, FromMeta)] struct MacroArgs { priority: Option, diff --git a/esp-hal/CHANGELOG.md b/esp-hal/CHANGELOG.md index 01f0286ec..5ea8c17f5 100644 --- a/esp-hal/CHANGELOG.md +++ b/esp-hal/CHANGELOG.md @@ -39,7 +39,10 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0 ### Fixed +- Xtensa devices now correctly enable the `esp-hal-procmacros/rtc-slow` feature (#2594) + ### Removed + - Remove more examples. Update doctests. (#2547) - The `configure` and `configure_for_async` DMA channel functions has been removed (#2403) - The DMA channel objects no longer have `tx` and `rx` fields. (#2526) diff --git a/esp-hal/Cargo.toml b/esp-hal/Cargo.toml index a5a44892e..e1b3770fc 100644 --- a/esp-hal/Cargo.toml +++ b/esp-hal/Cargo.toml @@ -43,7 +43,7 @@ log = { version = "0.4.22", optional = true } nb = "1.1.0" paste = "1.0.15" portable-atomic = { version = "1.9.0", default-features = false } -procmacros = { version = "0.15.0", features = ["enum-dispatch", "interrupt", "ram"], package = "esp-hal-procmacros", path = "../esp-hal-procmacros" } +procmacros = { version = "0.15.0", package = "esp-hal-procmacros", path = "../esp-hal-procmacros" } strum = { version = "0.26.3", default-features = false, features = ["derive"] } void = { version = "1.0.2", default-features = false } usb-device = { version = "0.3.2", optional = true } @@ -103,19 +103,19 @@ log = ["dep:log"] # Chip Support Feature Flags # Target the ESP32. -esp32 = ["dep:esp32", "xtensa-lx-rt/esp32"] +esp32 = ["dep:esp32", "procmacros/rtc-slow", "xtensa-lx-rt/esp32"] # Target the ESP32-C2. esp32c2 = ["dep:esp32c2", "portable-atomic/unsafe-assume-single-core"] # Target the ESP32-C3. -esp32c3 = ["dep:esp32c3", "portable-atomic/unsafe-assume-single-core", "esp-riscv-rt/rtc-ram"] +esp32c3 = ["dep:esp32c3", "esp-riscv-rt/rtc-ram", "portable-atomic/unsafe-assume-single-core"] # Target the ESP32-C6. -esp32c6 = ["dep:esp32c6", "procmacros/has-lp-core", "esp-riscv-rt/rtc-ram"] +esp32c6 = ["dep:esp32c6", "esp-riscv-rt/rtc-ram", "procmacros/has-lp-core"] # Target the ESP32-H2. esp32h2 = ["dep:esp32h2", "esp-riscv-rt/rtc-ram"] # Target the ESP32-S2. -esp32s2 = ["dep:esp32s2", "portable-atomic/critical-section", "procmacros/has-ulp-core", "xtensa-lx-rt/esp32s2", "usb-otg"] +esp32s2 = ["dep:esp32s2", "portable-atomic/critical-section", "procmacros/has-ulp-core", "procmacros/rtc-slow", "usb-otg", "xtensa-lx-rt/esp32s2"] # Target the ESP32-S3. -esp32s3 = ["dep:esp32s3", "procmacros/has-ulp-core", "xtensa-lx-rt/esp32s3", "usb-otg"] +esp32s3 = ["dep:esp32s3", "procmacros/has-ulp-core", "procmacros/rtc-slow", "usb-otg", "xtensa-lx-rt/esp32s3"] #! ### RISC-V Exclusive Feature Flags ## Move the stack to start of RAM to get zero-cost stack overflow protection