Make it easy to leave out some of the SPI pins
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ffc6c16575
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83ac67be23
@ -13,8 +13,8 @@
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//! peripherals.SPI2,
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//! peripherals.SPI2,
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//! sclk,
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//! sclk,
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//! mosi,
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//! mosi,
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//! Some(miso),
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//! miso,
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//! Some(cs),
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//! cs,
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//! 100u32.kHz(),
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//! 100u32.kHz(),
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//! SpiMode::Mode0,
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//! SpiMode::Mode0,
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//! &mut peripheral_clock_control,
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//! &mut peripheral_clock_control,
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@ -56,8 +56,8 @@ where
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spi: T,
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spi: T,
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mut sck: SCK,
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mut sck: SCK,
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mut mosi: MOSI,
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mut mosi: MOSI,
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miso: Option<MISO>,
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mut miso: MISO,
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cs: Option<CS>,
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mut cs: CS,
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frequency: HertzU32,
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frequency: HertzU32,
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mode: SpiMode,
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mode: SpiMode,
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peripheral_clock_control: &mut PeripheralClockControl,
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peripheral_clock_control: &mut PeripheralClockControl,
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@ -69,16 +69,83 @@ where
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mosi.set_to_push_pull_output()
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mosi.set_to_push_pull_output()
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.connect_peripheral_to_output(spi.mosi_signal());
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.connect_peripheral_to_output(spi.mosi_signal());
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if let Some(mut miso) = miso {
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miso.set_to_input()
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miso.set_to_input()
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.connect_input_to_peripheral(spi.miso_signal());
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.connect_input_to_peripheral(spi.miso_signal());
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}
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if let Some(mut cs) = cs {
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cs.set_to_push_pull_output()
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cs.set_to_push_pull_output()
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.connect_peripheral_to_output(spi.cs_signal());
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.connect_peripheral_to_output(spi.cs_signal());
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}
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Self::new_internal(spi, frequency, mode, peripheral_clock_control, clocks)
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}
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/// Constructs an SPI instance in 8bit dataframe mode without CS pin.
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pub fn new_no_cs<SCK: OutputPin, MOSI: OutputPin, MISO: InputPin>(
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spi: T,
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mut sck: SCK,
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mut mosi: MOSI,
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mut miso: MISO,
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frequency: HertzU32,
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mode: SpiMode,
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peripheral_clock_control: &mut PeripheralClockControl,
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clocks: &Clocks,
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) -> Self {
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sck.set_to_push_pull_output()
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.connect_peripheral_to_output(spi.sclk_signal());
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mosi.set_to_push_pull_output()
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.connect_peripheral_to_output(spi.mosi_signal());
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miso.set_to_input()
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.connect_input_to_peripheral(spi.miso_signal());
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Self::new_internal(spi, frequency, mode, peripheral_clock_control, clocks)
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}
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/// Constructs an SPI instance in 8bit dataframe mode without CS and MISO
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/// pin.
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pub fn new_no_cs_no_miso<SCK: OutputPin, MOSI: OutputPin>(
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spi: T,
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mut sck: SCK,
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mut mosi: MOSI,
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frequency: HertzU32,
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mode: SpiMode,
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peripheral_clock_control: &mut PeripheralClockControl,
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clocks: &Clocks,
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) -> Self {
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sck.set_to_push_pull_output()
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.connect_peripheral_to_output(spi.sclk_signal());
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mosi.set_to_push_pull_output()
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.connect_peripheral_to_output(spi.mosi_signal());
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Self::new_internal(spi, frequency, mode, peripheral_clock_control, clocks)
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}
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/// Constructs an SPI instance in 8bit dataframe mode with only MOSI
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/// connected. This might be useful for (ab)using SPI to implement
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/// other protocols by bitbanging (WS2812B, onewire, generating arbitrary
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/// waveforms…)
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pub fn new_mosi_only<MOSI: OutputPin>(
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spi: T,
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mut mosi: MOSI,
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frequency: HertzU32,
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mode: SpiMode,
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peripheral_clock_control: &mut PeripheralClockControl,
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clocks: &Clocks,
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) -> Self {
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mosi.set_to_push_pull_output()
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.connect_peripheral_to_output(spi.mosi_signal());
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Self::new_internal(spi, frequency, mode, peripheral_clock_control, clocks)
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}
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pub fn new_internal(
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spi: T,
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frequency: HertzU32,
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mode: SpiMode,
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peripheral_clock_control: &mut PeripheralClockControl,
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clocks: &Clocks,
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) -> Self {
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spi.enable_peripheral(peripheral_clock_control);
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spi.enable_peripheral(peripheral_clock_control);
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let mut spi = Self { spi };
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let mut spi = Self { spi };
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@ -58,8 +58,8 @@ fn main() -> ! {
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peripherals.SPI2,
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peripherals.SPI2,
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sclk,
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sclk,
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mosi,
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mosi,
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Some(miso),
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miso,
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Some(cs),
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cs,
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100u32.kHz(),
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100u32.kHz(),
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SpiMode::Mode0,
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SpiMode::Mode0,
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&mut system.peripheral_clock_control,
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&mut system.peripheral_clock_control,
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@ -63,8 +63,8 @@ fn main() -> ! {
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peripherals.SPI2,
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peripherals.SPI2,
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sclk,
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sclk,
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mosi,
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mosi,
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Some(miso),
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miso,
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Some(cs),
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cs,
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100u32.kHz(),
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100u32.kHz(),
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SpiMode::Mode0,
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SpiMode::Mode0,
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&mut system.peripheral_clock_control,
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&mut system.peripheral_clock_control,
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@ -58,8 +58,8 @@ fn main() -> ! {
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peripherals.SPI2,
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peripherals.SPI2,
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sclk,
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sclk,
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mosi,
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mosi,
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Some(miso),
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miso,
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Some(cs),
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cs,
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100u32.kHz(),
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100u32.kHz(),
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SpiMode::Mode0,
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SpiMode::Mode0,
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&mut system.peripheral_clock_control,
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&mut system.peripheral_clock_control,
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@ -58,8 +58,8 @@ fn main() -> ! {
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peripherals.SPI2,
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peripherals.SPI2,
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sclk,
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sclk,
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mosi,
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mosi,
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Some(miso),
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miso,
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Some(cs),
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cs,
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100u32.kHz(),
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100u32.kHz(),
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SpiMode::Mode0,
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SpiMode::Mode0,
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&mut system.peripheral_clock_control,
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&mut system.peripheral_clock_control,
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