Merge pull request #623 from bugadani/dma
Add WithDmaSpi3 to prelude on espd32s3
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commit
73fb717618
@ -11,6 +11,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
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### Added
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- Add `WithDmaSpi3` to prelude for ESP32S3 (#623)
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- Add bare-bones PSRAM support for ESP32 (#506)
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- Add initial support for the ESP32-H2 (#513, #526, #527, #528, #530, #538, #544, #548, #551, #556, #560, #566, #549, #564, #569, #576, #577, #589, #591, #597)
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- Add bare-bones PSRAM support for ESP32-S3 (#517)
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@ -70,7 +70,7 @@ pub use crate::pulse_control::{
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};
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#[cfg(radio)]
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pub use crate::radio::RadioExt as _esp_hal_RadioExt;
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#[cfg(any(esp32, esp32s2))]
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#[cfg(any(esp32, esp32s2, esp32s3))]
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pub use crate::spi::dma::WithDmaSpi3 as _esp_hal_spi_dma_WithDmaSpi3;
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#[cfg(any(spi0, spi1, spi2, spi3))]
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pub use crate::spi::{
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140
esp32s3-hal/examples/spi_loopback_dma_spi3.rs
Normal file
140
esp32s3-hal/examples/spi_loopback_dma_spi3.rs
Normal file
@ -0,0 +1,140 @@
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//! SPI loopback test using DMA.
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//!
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//! This example is a copy of `spi_loopback_dma.rs` with the only difference
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//! that it uses SPI3 instead of SPI2.
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//!
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//! Folowing pins are used:
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//! SCLK GPIO6
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//! MISO GPIO2
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//! MOSI GPIO7
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//! CS GPIO10
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//!
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//! Depending on your target and the board you are using you have to change the
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//! pins.
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//!
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//! This example transfers data via SPI.
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//! Connect MISO and MOSI pins to see the outgoing data is read as incoming
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//! data.
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#![no_std]
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#![no_main]
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use esp32s3_hal::{
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clock::ClockControl,
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dma::DmaPriority,
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gdma::Gdma,
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gpio::IO,
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peripherals::Peripherals,
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prelude::*,
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spi::{Spi, SpiMode},
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timer::TimerGroup,
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Delay,
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Rtc,
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};
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use esp_backtrace as _;
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use esp_println::println;
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#[entry]
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fn main() -> ! {
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let peripherals = Peripherals::take();
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let mut system = peripherals.SYSTEM.split();
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let clocks = ClockControl::boot_defaults(system.clock_control).freeze();
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// Disable the watchdog timers. For the ESP32-S3, this includes the Super WDT,
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// the RTC WDT, and the TIMG WDTs.
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let mut rtc = Rtc::new(peripherals.RTC_CNTL);
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let timer_group0 = TimerGroup::new(
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peripherals.TIMG0,
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&clocks,
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&mut system.peripheral_clock_control,
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);
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let mut wdt0 = timer_group0.wdt;
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let timer_group1 = TimerGroup::new(
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peripherals.TIMG1,
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&clocks,
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&mut system.peripheral_clock_control,
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);
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let mut wdt1 = timer_group1.wdt;
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rtc.swd.disable();
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rtc.rwdt.disable();
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wdt0.disable();
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wdt1.disable();
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let io = IO::new(peripherals.GPIO, peripherals.IO_MUX);
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let sclk = io.pins.gpio6;
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let miso = io.pins.gpio2;
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let mosi = io.pins.gpio7;
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let cs = io.pins.gpio10;
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let dma = Gdma::new(peripherals.DMA, &mut system.peripheral_clock_control);
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let dma_channel = dma.channel0;
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let mut descriptors = [0u32; 8 * 3];
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let mut rx_descriptors = [0u32; 8 * 3];
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let mut spi = Spi::new(
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peripherals.SPI3,
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sclk,
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mosi,
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miso,
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cs,
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100u32.kHz(),
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SpiMode::Mode0,
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&mut system.peripheral_clock_control,
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&clocks,
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)
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.with_dma(dma_channel.configure(
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false,
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&mut descriptors,
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&mut rx_descriptors,
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DmaPriority::Priority0,
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));
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let mut delay = Delay::new(&clocks);
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// DMA buffer require a static life-time
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let mut send = buffer1();
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let mut receive = buffer2();
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let mut i = 0;
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for (i, v) in send.iter_mut().enumerate() {
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*v = (i % 255) as u8;
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}
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loop {
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send[0] = i;
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send[send.len() - 1] = i;
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i = i.wrapping_add(1);
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let transfer = spi.dma_transfer(send, receive).unwrap();
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// here we could do something else while DMA transfer is in progress
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let mut i = 0;
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// Check is_done until the transfer is almost done (32000 bytes at 100kHz is
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// 2.56 seconds), then move to wait().
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while !transfer.is_done() && i < 10 {
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delay.delay_ms(250u32);
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i += 1;
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}
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// the buffers and spi is moved into the transfer and we can get it back via
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// `wait`
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(receive, send, spi) = transfer.wait();
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println!(
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"{:x?} .. {:x?}",
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&receive[..10],
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&receive[receive.len() - 10..]
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);
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delay.delay_ms(250u32);
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}
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}
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fn buffer1() -> &'static mut [u8; 32000] {
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static mut BUFFER: [u8; 32000] = [0u8; 32000];
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unsafe { &mut BUFFER }
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}
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fn buffer2() -> &'static mut [u8; 32000] {
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static mut BUFFER: [u8; 32000] = [0u8; 32000];
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unsafe { &mut BUFFER }
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}
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