Various small improvements, formatting, making things more consistent

This commit is contained in:
Jesse Braham 2022-01-11 13:24:55 -08:00
parent 10931726eb
commit 6ab5634c54
3 changed files with 81 additions and 55 deletions

View File

@ -47,12 +47,16 @@ mod delay {
} }
impl Delay { impl Delay {
/// Instantiate the `Delay` driver, taking ownership of the `SYSTIMER` /// Create a new Delay instance
/// peripheral struct
pub fn new(systimer: SYSTIMER) -> Self { pub fn new(systimer: SYSTIMER) -> Self {
Self { systimer } Self { systimer }
} }
/// Return the raw interface to the underlying SYSTIMER instance
pub fn free(self) -> SYSTIMER {
self.systimer
}
/// Delay for the specified number of microseconds /// Delay for the specified number of microseconds
pub fn delay(&self, us: u32) { pub fn delay(&self, us: u32) {
let t0 = self.unit0_value(); let t0 = self.unit0_value();

View File

@ -18,6 +18,7 @@ pub struct Serial<T> {
} }
impl<T: Instance> Serial<T> { impl<T: Instance> Serial<T> {
/// Create a new UART instance
pub fn new(uart: T) -> Result<Self, Error> { pub fn new(uart: T) -> Result<Self, Error> {
let mut serial = Serial { uart }; let mut serial = Serial { uart };
serial.uart.disable_rx_interrupts(); serial.uart.disable_rx_interrupts();
@ -25,6 +26,11 @@ impl<T: Instance> Serial<T> {
Ok(serial) Ok(serial)
} }
/// Return the raw interface to the underlying UART instance
pub fn free(self) -> T {
self.uart
}
} }
/// UART peripheral instance /// UART peripheral instance
@ -112,7 +118,44 @@ pub trait Instance {
} }
} }
impl<T: Instance> Write<u8> for Serial<T> { impl Instance for UART0 {
#[inline(always)]
fn register_block(&self) -> &RegisterBlock {
self
}
}
impl Instance for UART1 {
#[inline(always)]
fn register_block(&self) -> &RegisterBlock {
self
}
}
#[cfg(any(feature = "esp32", feature = "esp32s3"))]
impl Instance for UART2 {
#[inline(always)]
fn register_block(&self) -> &RegisterBlock {
self
}
}
impl<T> core::fmt::Write for Serial<T>
where
T: Instance,
{
fn write_str(&mut self, s: &str) -> core::fmt::Result {
s.as_bytes()
.iter()
.try_for_each(|c| nb::block!(self.write(*c)))
.map_err(|_| core::fmt::Error)
}
}
impl<T> Write<u8> for Serial<T>
where
T: Instance,
{
type Error = Error; type Error = Error;
fn write(&mut self, word: u8) -> nb::Result<(), Self::Error> { fn write(&mut self, word: u8) -> nb::Result<(), Self::Error> {
@ -137,7 +180,10 @@ impl<T: Instance> Write<u8> for Serial<T> {
} }
} }
impl<T: Instance> Read<u8> for Serial<T> { impl<T> Read<u8> for Serial<T>
where
T: Instance,
{
type Error = Error; type Error = Error;
fn read(&mut self) -> nb::Result<u8, Self::Error> { fn read(&mut self) -> nb::Result<u8, Self::Error> {
@ -156,34 +202,3 @@ impl<T: Instance> Read<u8> for Serial<T> {
} }
} }
} }
impl<T: Instance> core::fmt::Write for Serial<T> {
fn write_str(&mut self, s: &str) -> core::fmt::Result {
s.as_bytes()
.iter()
.try_for_each(|c| nb::block!(self.write(*c)))
.map_err(|_| core::fmt::Error)
}
}
impl Instance for UART0 {
#[inline(always)]
fn register_block(&self) -> &RegisterBlock {
self
}
}
impl Instance for UART1 {
#[inline(always)]
fn register_block(&self) -> &RegisterBlock {
self
}
}
#[cfg(any(feature = "esp32", feature = "esp32s3"))]
impl Instance for UART2 {
#[inline(always)]
fn register_block(&self) -> &RegisterBlock {
self
}
}

View File

@ -8,26 +8,33 @@ use void::Void;
use crate::pac::{timg0::RegisterBlock, TIMG0, TIMG1}; use crate::pac::{timg0::RegisterBlock, TIMG0, TIMG1};
/// General-purpose timer
pub struct Timer<T> {
timg: T,
}
/// Custom timer error type /// Custom timer error type
#[derive(Debug)]
pub enum Error { pub enum Error {
TimerActive, TimerActive,
TimerInactive, TimerInactive,
AlarmInactive, AlarmInactive,
} }
/// General-purpose timer
pub struct Timer<T> {
timg: T,
}
/// Timer driver /// Timer driver
impl<T> Timer<T> impl<T> Timer<T>
where where
T: Instance, T: Instance,
{ {
/// Create a new timer instance
pub fn new(timg: T) -> Self { pub fn new(timg: T) -> Self {
Self { timg } Self { timg }
} }
/// Return the raw interface to the underlying timer instance
pub fn free(self) -> T {
self.timg
}
} }
/// Timer peripheral instance /// Timer peripheral instance
@ -119,6 +126,20 @@ pub trait Instance {
} }
} }
impl Instance for TIMG0 {
#[inline(always)]
fn register_block(&self) -> &RegisterBlock {
self
}
}
impl Instance for TIMG1 {
#[inline(always)]
fn register_block(&self) -> &RegisterBlock {
self
}
}
impl<T> CountDown for Timer<T> impl<T> CountDown for Timer<T>
where where
T: Instance, T: Instance,
@ -143,7 +164,7 @@ where
fn wait(&mut self) -> nb::Result<(), Void> { fn wait(&mut self) -> nb::Result<(), Void> {
if !self.timg.is_counter_active() { if !self.timg.is_counter_active() {
panic!("Called wait on an inactive timer!"); panic!("Called wait on an inactive timer!")
} }
let reg_block = self.timg.register_block(); let reg_block = self.timg.register_block();
@ -188,17 +209,3 @@ where
self.timg.set_wdt_enabled(false); self.timg.set_wdt_enabled(false);
} }
} }
impl Instance for TIMG0 {
#[inline(always)]
fn register_block(&self) -> &RegisterBlock {
self
}
}
impl Instance for TIMG1 {
#[inline(always)]
fn register_block(&self) -> &RegisterBlock {
self
}
}