Various small improvements, formatting, making things more consistent
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10931726eb
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@ -47,12 +47,16 @@ mod delay {
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}
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impl Delay {
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/// Instantiate the `Delay` driver, taking ownership of the `SYSTIMER`
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/// peripheral struct
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/// Create a new Delay instance
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pub fn new(systimer: SYSTIMER) -> Self {
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Self { systimer }
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}
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/// Return the raw interface to the underlying SYSTIMER instance
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pub fn free(self) -> SYSTIMER {
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self.systimer
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}
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/// Delay for the specified number of microseconds
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pub fn delay(&self, us: u32) {
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let t0 = self.unit0_value();
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@ -18,6 +18,7 @@ pub struct Serial<T> {
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}
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impl<T: Instance> Serial<T> {
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/// Create a new UART instance
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pub fn new(uart: T) -> Result<Self, Error> {
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let mut serial = Serial { uart };
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serial.uart.disable_rx_interrupts();
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@ -25,6 +26,11 @@ impl<T: Instance> Serial<T> {
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Ok(serial)
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}
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/// Return the raw interface to the underlying UART instance
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pub fn free(self) -> T {
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self.uart
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}
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}
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/// UART peripheral instance
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@ -112,7 +118,44 @@ pub trait Instance {
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}
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}
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impl<T: Instance> Write<u8> for Serial<T> {
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impl Instance for UART0 {
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#[inline(always)]
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fn register_block(&self) -> &RegisterBlock {
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self
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}
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}
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impl Instance for UART1 {
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#[inline(always)]
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fn register_block(&self) -> &RegisterBlock {
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self
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}
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}
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#[cfg(any(feature = "esp32", feature = "esp32s3"))]
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impl Instance for UART2 {
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#[inline(always)]
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fn register_block(&self) -> &RegisterBlock {
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self
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}
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}
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impl<T> core::fmt::Write for Serial<T>
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where
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T: Instance,
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{
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fn write_str(&mut self, s: &str) -> core::fmt::Result {
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s.as_bytes()
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.iter()
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.try_for_each(|c| nb::block!(self.write(*c)))
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.map_err(|_| core::fmt::Error)
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}
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}
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impl<T> Write<u8> for Serial<T>
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where
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T: Instance,
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{
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type Error = Error;
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fn write(&mut self, word: u8) -> nb::Result<(), Self::Error> {
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@ -137,7 +180,10 @@ impl<T: Instance> Write<u8> for Serial<T> {
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}
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}
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impl<T: Instance> Read<u8> for Serial<T> {
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impl<T> Read<u8> for Serial<T>
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where
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T: Instance,
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{
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type Error = Error;
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fn read(&mut self) -> nb::Result<u8, Self::Error> {
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@ -156,34 +202,3 @@ impl<T: Instance> Read<u8> for Serial<T> {
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}
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}
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}
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impl<T: Instance> core::fmt::Write for Serial<T> {
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fn write_str(&mut self, s: &str) -> core::fmt::Result {
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s.as_bytes()
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.iter()
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.try_for_each(|c| nb::block!(self.write(*c)))
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.map_err(|_| core::fmt::Error)
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}
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}
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impl Instance for UART0 {
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#[inline(always)]
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fn register_block(&self) -> &RegisterBlock {
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self
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}
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}
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impl Instance for UART1 {
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#[inline(always)]
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fn register_block(&self) -> &RegisterBlock {
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self
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}
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}
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#[cfg(any(feature = "esp32", feature = "esp32s3"))]
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impl Instance for UART2 {
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#[inline(always)]
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fn register_block(&self) -> &RegisterBlock {
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self
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}
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}
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@ -8,26 +8,33 @@ use void::Void;
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use crate::pac::{timg0::RegisterBlock, TIMG0, TIMG1};
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/// General-purpose timer
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pub struct Timer<T> {
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timg: T,
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}
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/// Custom timer error type
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#[derive(Debug)]
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pub enum Error {
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TimerActive,
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TimerInactive,
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AlarmInactive,
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}
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/// General-purpose timer
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pub struct Timer<T> {
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timg: T,
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}
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/// Timer driver
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impl<T> Timer<T>
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where
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T: Instance,
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{
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/// Create a new timer instance
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pub fn new(timg: T) -> Self {
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Self { timg }
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}
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/// Return the raw interface to the underlying timer instance
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pub fn free(self) -> T {
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self.timg
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}
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}
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/// Timer peripheral instance
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@ -119,6 +126,20 @@ pub trait Instance {
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}
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}
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impl Instance for TIMG0 {
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#[inline(always)]
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fn register_block(&self) -> &RegisterBlock {
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self
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}
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}
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impl Instance for TIMG1 {
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#[inline(always)]
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fn register_block(&self) -> &RegisterBlock {
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self
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}
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}
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impl<T> CountDown for Timer<T>
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where
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T: Instance,
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@ -143,7 +164,7 @@ where
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fn wait(&mut self) -> nb::Result<(), Void> {
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if !self.timg.is_counter_active() {
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panic!("Called wait on an inactive timer!");
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panic!("Called wait on an inactive timer!")
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}
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let reg_block = self.timg.register_block();
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@ -188,17 +209,3 @@ where
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self.timg.set_wdt_enabled(false);
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}
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}
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impl Instance for TIMG0 {
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#[inline(always)]
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fn register_block(&self) -> &RegisterBlock {
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self
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}
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}
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impl Instance for TIMG1 {
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#[inline(always)]
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fn register_block(&self) -> &RegisterBlock {
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self
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}
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}
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