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Implement workaround for ESP32 errata 3.6

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This commit is contained in:
bjoernQ 2022-05-02 13:48:55 +02:00 committed by Jesse Braham
parent c0a584ecfa
commit 67f21460f8
5 changed files with 219 additions and 158 deletions
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85
esp-hal-common/src/gpio.rs
View File

@ -180,6 +180,64 @@ pub trait OutputPin: Pin {
fn internal_pull_down(&mut self, on: bool) -> &mut Self;
}
// Only for ESP32 in order to workaround errata 3.6
#[macro_export]
macro_rules! impl_errata36 {
(None, $pull_down:expr, $pull_up:expr) => {
// NONE
};
(pad_dac1, $pull_down:expr, $pull_up:expr) => {
use crate::pac::RTCIO;
let rtcio = unsafe { &*RTCIO::ptr() };
rtcio.pad_dac1.modify(|r,w| unsafe {
w.bits( r.bits() )
.pdac1_rue().bit($pull_up)
.pdac1_rde().bit($pull_down)
});
};
(pad_dac2, $pull_down:expr, $pull_up:expr) => {
use crate::pac::RTCIO;
let rtcio = unsafe { &*RTCIO::ptr() };
rtcio.pad_dac2.modify(|r,w| unsafe {
w.bits( r.bits() )
.pdac2_rue().bit($pull_up)
.pdac2_rde().bit($pull_down)
});
};
(xtal_32k_n, $pull_down:expr, $pull_up:expr) => {
use crate::pac::RTCIO;
let rtcio = unsafe { &*RTCIO::ptr() };
rtcio.xtal_32k_pad.modify(|r,w| unsafe {
w.bits( r.bits() )
.x32n_rue().bit($pull_up)
.x32n_rde().bit($pull_down)
});
};
(xtal_32k_p, $pull_down:expr, $pull_up:expr) => {
use crate::pac::RTCIO;
let rtcio = unsafe { &*RTCIO::ptr() };
rtcio.xtal_32k_pad.modify(|r,w| unsafe {
w.bits( r.bits() )
.x32p_rue().bit($pull_up)
.x32p_rde().bit($pull_down)
});
};
($errata36:ident, $pull_down:expr, $pull_up:expr) => {
use crate::pac::RTCIO;
let rtcio = unsafe { &*RTCIO::ptr() };
rtcio.$errata36.modify(|r,w| unsafe {
w.bits( r.bits() )
.rue().bit($pull_up)
.rde().bit($pull_down)
});
};
}
#[macro_export]
macro_rules! impl_input {
(
@ -189,7 +247,7 @@ macro_rules! impl_input {
(
$pin_num:expr, $iomux_reg:expr, $bit:expr, $out_en_clear:ident,
$reg:ident, $reader:ident, $status_w1tc:ident, $pcpu_int:ident,
$pcpu_nmi:ident, $acpu_int:ident, $acpu_nmi:ident
$pcpu_nmi:ident, $acpu_int:ident, $acpu_nmi:ident, $errata36:ident
)
$( ,( $( $af_signal:ident : $af:ident ),* ))?
) => {
@ -216,6 +274,8 @@ macro_rules! impl_input {
gpio.func_out_sel_cfg[$pin_num]
.modify(|_, w| unsafe { w.out_sel().bits(OutputSignal::GPIO as OutputSignalType) });
impl_errata36!($errata36, pull_down, pull_up);
paste! {
iomux.$iomux_reg.modify(|_, w| unsafe {
w.mcu_sel()
@ -386,7 +446,7 @@ macro_rules! impl_input {
macro_rules! impl_input_wrap {
(
$gpio_function:ident,
$pxi:ident, $pin_num:expr, $iomux_reg:expr, $type:ident, Bank0, SingleCore
$pxi:ident, $pin_num:expr, $iomux_reg:expr, $type:ident, Bank0, SingleCore, $errata36:ident
$( ,( $( $af_input_signal:ident : $af_input:ident ),* ) )?
) => {
impl_input!(
@ -395,7 +455,7 @@ macro_rules! impl_input_wrap {
$pxi:
(
$pin_num, $iomux_reg, $pin_num % 32, enable_w1tc, in_, data_next,
status_w1tc, pcpu_int, pcpu_nmi_int, pcpu_int, pcpu_nmi_int
status_w1tc, pcpu_int, pcpu_nmi_int, pcpu_int, pcpu_nmi_int, $errata36
)
$( ,( $( $af_input_signal: $af_input ),* ) )?
);
@ -403,7 +463,7 @@ macro_rules! impl_input_wrap {
(
$gpio_function:ident,
$pxi:ident, $pin_num:expr, $iomux_reg:expr, $type:ident, Bank1, SingleCore
$pxi:ident, $pin_num:expr, $iomux_reg:expr, $type:ident, Bank1, SingleCore, $errata36:ident
$( ,( $( $af_input_signal:ident : $af_input:ident ),* ) )?
) => {
impl_input!(
@ -412,7 +472,7 @@ macro_rules! impl_input_wrap {
$pxi:
(
$pin_num, $iomux_reg, $pin_num % 32, enable1_w1tc, in1, data_next,
status1_w1tc, pcpu_int1, pcpu_nmi_int1, pcpu_int1, pcpu_nmi_int1
status1_w1tc, pcpu_int1, pcpu_nmi_int1, pcpu_int1, pcpu_nmi_int1, $errata36
)
$( ,( $( $af_input_signal: $af_input ),* ) )?
);
@ -420,7 +480,7 @@ macro_rules! impl_input_wrap {
(
$gpio_function:ident,
$pxi:ident, $pin_num:expr, $iomux_reg:expr, $type:ident, Bank0, DualCore
$pxi:ident, $pin_num:expr, $iomux_reg:expr, $type:ident, Bank0, DualCore, $errata36:ident
$( ,( $( $af_input_signal:ident : $af_input:ident ),* ) )?
) => {
impl_input!(
@ -429,7 +489,7 @@ macro_rules! impl_input_wrap {
$pxi:
(
$pin_num, $iomux_reg, $pin_num % 32, enable_w1tc, in_, data_next,
status_w1tc, pcpu_int, pcpu_nmi_int, acpu_int, acpu_nmi_int
status_w1tc, pcpu_int, pcpu_nmi_int, acpu_int, acpu_nmi_int, $errata36
)
$( ,( $( $af_input_signal: $af_input ),* ) )?
);
@ -437,7 +497,7 @@ macro_rules! impl_input_wrap {
(
$gpio_function:ident,
$pxi:ident, $pin_num:expr, $iomux_reg:expr, $type:ident, Bank1, DualCore
$pxi:ident, $pin_num:expr, $iomux_reg:expr, $type:ident, Bank1, DualCore, $errata36:ident
$( ,( $( $af_input_signal:ident : $af_input:ident ),* ) )?
) => {
impl_input!(
@ -446,7 +506,7 @@ macro_rules! impl_input_wrap {
$pxi:
(
$pin_num, $iomux_reg, $pin_num % 32, enable1_w1tc, in1, data_next,
status1_w1tc, pcpu_int1, pcpu_nmi_int1, acpu_int1, acpu_nmi_int1
status1_w1tc, pcpu_int1, pcpu_nmi_int1, acpu_int1, acpu_nmi_int1, $errata36
)
$( ,( $( $af_input_signal: $af_input ),* ) )?
);
@ -503,7 +563,7 @@ macro_rules! impl_output {
impl<MODE> $pxi<MODE> {
pub fn into_pull_up_input(self) -> $pxi<Input<PullUp>> {
self.init_input(false, false);
self.init_input(false, true);
$pxi { _mode: PhantomData }
}
@ -744,7 +804,7 @@ macro_rules! gpio {
$pxi:ident:
(
$pname:ident, $pin_num:literal, $iomux_reg:expr, $type:ident,
$rtc:tt, $bank:ident
$rtc:tt, $bank:ident, $errata36:ident
),
$(
( $( $af_input_signal:ident: $af_input:ident ),* ),
@ -822,7 +882,7 @@ macro_rules! gpio {
}
impl_input_wrap!(
$gpio_function, $pxi, $pin_num, $iomux_reg, $type, $bank, $cores
$gpio_function, $pxi, $pin_num, $iomux_reg, $type, $bank, $cores, $errata36
$( ,( $( $af_input_signal: $af_input ),* ) )?
);
@ -839,3 +899,4 @@ pub use impl_input;
pub use impl_input_wrap;
pub use impl_output;
pub use impl_output_wrap;
pub use impl_errata36;

72
esp32-hal/src/gpio.rs
View File

@ -4,42 +4,42 @@ gpio! {
Function2,
DualCore,
Gpio0: ( gpio0, 0, gpio0, IO, RTC, Bank0), (EMAC_TX_CLK: Function5), (CLK_OUT1: Function1),
Gpio1: ( gpio1, 1, gpio1, IO, 0, Bank0), (EMAC_RXD2: Function5), (U0TXD: Function1, CLK_OUT3: Function1),
Gpio2: ( gpio2, 2, gpio2, IO, RTC, Bank0), (HSPIWP: Function1, HS2_DATA0: Function3, SD_DATA0: Function4), (HS2_DATA0: Function3, SD_DATA0: Function4),
Gpio3: ( gpio3, 3, gpio3, IO, 0, Bank0), (U0RXD: Function0), (CLK_OUT2: Function1),
Gpio4: ( gpio4, 4, gpio4, IO, RTC, Bank0), (HSPIHD: Function1, HS2_DATA1: Function3, SD_DATA1: Function4, EMAC_TX_ER: Function5), (HS2_DATA1: Function3, SD_DATA1: Function4),
Gpio5: ( gpio5, 5, gpio5, IO, 0, Bank0), (VSPICS0: Function1, HS1_DATA6: Function3, EMAC_RX_CLK: Function5), (HS1_DATA6: Function3),
Gpio6: ( gpio6, 6, gpio6, IO, 0, Bank0), (U1CTS: Function4), (SD_CLK: Function0, SPICLK: Function1, HS1_CLK: Function3),
Gpio7: ( gpio7, 7, gpio7, IO, 0, Bank0), (SD_DATA0: Function0, SPIQ: Function1, HS1_DATA0: Function3), (SD_DATA0: Function0, SPIQ: Function1, HS1_DATA0: Function3, U2RTS: Function4),
Gpio8: ( gpio8, 8, gpio8, IO, 0, Bank0), (SD_DATA1: Function0, SPID: Function1, HS1_DATA1: Function3, U2CTS: Function4), (SD_DATA1: Function0, SPID: Function1, HS1_DATA1: Function3),
Gpio9: ( gpio9, 9, gpio9, IO, 0, Bank0), (SD_DATA2: Function0, SPIHD: Function1, HS1_DATA2: Function3, U1RXD: Function4), (SD_DATA2: Function0, SPIHD: Function1, HS1_DATA2: Function3),
Gpio10: (gpio10, 10, gpio10, IO, 0, Bank0), (SD_DATA3: Function0, SPIWP: Function1, HS1_DATA3: Function3), (SD_DATA3: Function0, SPIWP: Function1, HS1_DATA3: Function3, U1TXD: Function4),
Gpio11: (gpio11, 11, gpio11, IO, 0, Bank0), (SPICS0: Function1), (SD_CMD: Function0, SPICS0: Function1, HS1_CMD: Function3, U1RTS: Function4),
Gpio12: (gpio12, 12, gpio12, IO, RTC, Bank0), (MTDI: Function0, HSPIQ: Function1, HS2_DATA2: Function3, SD_DATA2: Function4), (HSPIQ: Function1, HS2_DATA2: Function3, SD_DATA2: Function4, EMAC_TXD3: Function5),
Gpio13: (gpio13, 13, gpio13, IO, RTC, Bank0), (MTCK: Function0, HSPID: Function1, HS2_DATA3: Function3, SD_DATA3: Function4), (HSPID: Function1, HS2_DATA3: Function3, SD_DATA3: Function4, EMAC_RX_ER: Function5),
Gpio14: (gpio14, 14, gpio14, IO, RTC, Bank0), (MTMS: Function0, HSPICLK: Function1), (HSPICLK: Function1, HS2_CLK: Function3, SD_CLK: Function4, EMAC_TXD2: Function5),
Gpio15: (gpio15, 15, gpio15, IO, RTC, Bank0), (HSPICS0: Function1, EMAC_RXD3: Function5), (MTDO: Function0, HSPICS0: Function1, HS2_CMD: Function3, SD_CMD: Function4),
Gpio16: (gpio16, 16, gpio16, IO, 0, Bank0), (HS1_DATA4: Function3, U2RXD: Function4), (HS1_DATA4: Function3, EMAC_CLK_OUT: Function5),
Gpio17: (gpio17, 17, gpio17, IO, 0, Bank0), (HS1_DATA5: Function3), (HS1_DATA5: Function3, U2TXD: Function4, EMAC_CLK_180: Function5),
Gpio18: (gpio18, 18, gpio18, IO, 0, Bank0), (VSPICLK: Function1, HS1_DATA7: Function3), (VSPICLK: Function1, HS1_DATA7: Function3),
Gpio19: (gpio19, 19, gpio19, IO, 0, Bank0), (VSPIQ: Function1, U0CTS: Function3), (VSPIQ: Function1, EMAC_TXD0: Function5),
Gpio20: (gpio20, 20, gpio20, IO, 0, Bank0),
Gpio21: (gpio21, 21, gpio21, IO, 0, Bank0), (VSPIHD: Function1), (VSPIHD: Function1, EMAC_TX_EN: Function5),
Gpio0: ( gpio0, 0, gpio0, IO, RTC, Bank0, touch_pad1), (EMAC_TX_CLK: Function5), (CLK_OUT1: Function1),
Gpio1: ( gpio1, 1, gpio1, IO, 0, Bank0, None), (EMAC_RXD2: Function5), (U0TXD: Function1, CLK_OUT3: Function1),
Gpio2: ( gpio2, 2, gpio2, IO, RTC, Bank0, touch_pad2), (HSPIWP: Function1, HS2_DATA0: Function3, SD_DATA0: Function4), (HS2_DATA0: Function3, SD_DATA0: Function4),
Gpio3: ( gpio3, 3, gpio3, IO, 0, Bank0, None), (U0RXD: Function0), (CLK_OUT2: Function1),
Gpio4: ( gpio4, 4, gpio4, IO, RTC, Bank0, touch_pad0), (HSPIHD: Function1, HS2_DATA1: Function3, SD_DATA1: Function4, EMAC_TX_ER: Function5), (HS2_DATA1: Function3, SD_DATA1: Function4),
Gpio5: ( gpio5, 5, gpio5, IO, 0, Bank0, None), (VSPICS0: Function1, HS1_DATA6: Function3, EMAC_RX_CLK: Function5), (HS1_DATA6: Function3),
Gpio6: ( gpio6, 6, gpio6, IO, 0, Bank0, None), (U1CTS: Function4), (SD_CLK: Function0, SPICLK: Function1, HS1_CLK: Function3),
Gpio7: ( gpio7, 7, gpio7, IO, 0, Bank0, None), (SD_DATA0: Function0, SPIQ: Function1, HS1_DATA0: Function3), (SD_DATA0: Function0, SPIQ: Function1, HS1_DATA0: Function3, U2RTS: Function4),
Gpio8: ( gpio8, 8, gpio8, IO, 0, Bank0, None), (SD_DATA1: Function0, SPID: Function1, HS1_DATA1: Function3, U2CTS: Function4), (SD_DATA1: Function0, SPID: Function1, HS1_DATA1: Function3),
Gpio9: ( gpio9, 9, gpio9, IO, 0, Bank0, None), (SD_DATA2: Function0, SPIHD: Function1, HS1_DATA2: Function3, U1RXD: Function4), (SD_DATA2: Function0, SPIHD: Function1, HS1_DATA2: Function3),
Gpio10: (gpio10, 10, gpio10, IO, 0, Bank0, None), (SD_DATA3: Function0, SPIWP: Function1, HS1_DATA3: Function3), (SD_DATA3: Function0, SPIWP: Function1, HS1_DATA3: Function3, U1TXD: Function4),
Gpio11: (gpio11, 11, gpio11, IO, 0, Bank0, None), (SPICS0: Function1), (SD_CMD: Function0, SPICS0: Function1, HS1_CMD: Function3, U1RTS: Function4),
Gpio12: (gpio12, 12, gpio12, IO, RTC, Bank0, touch_pad5), (MTDI: Function0, HSPIQ: Function1, HS2_DATA2: Function3, SD_DATA2: Function4), (HSPIQ: Function1, HS2_DATA2: Function3, SD_DATA2: Function4, EMAC_TXD3: Function5),
Gpio13: (gpio13, 13, gpio13, IO, RTC, Bank0, touch_pad4), (MTCK: Function0, HSPID: Function1, HS2_DATA3: Function3, SD_DATA3: Function4), (HSPID: Function1, HS2_DATA3: Function3, SD_DATA3: Function4, EMAC_RX_ER: Function5),
Gpio14: (gpio14, 14, gpio14, IO, RTC, Bank0, touch_pad6), (MTMS: Function0, HSPICLK: Function1), (HSPICLK: Function1, HS2_CLK: Function3, SD_CLK: Function4, EMAC_TXD2: Function5),
Gpio15: (gpio15, 15, gpio15, IO, RTC, Bank0, touch_pad3), (HSPICS0: Function1, EMAC_RXD3: Function5), (MTDO: Function0, HSPICS0: Function1, HS2_CMD: Function3, SD_CMD: Function4),
Gpio16: (gpio16, 16, gpio16, IO, 0, Bank0, None), (HS1_DATA4: Function3, U2RXD: Function4), (HS1_DATA4: Function3, EMAC_CLK_OUT: Function5),
Gpio17: (gpio17, 17, gpio17, IO, 0, Bank0, None), (HS1_DATA5: Function3), (HS1_DATA5: Function3, U2TXD: Function4, EMAC_CLK_180: Function5),
Gpio18: (gpio18, 18, gpio18, IO, 0, Bank0, None), (VSPICLK: Function1, HS1_DATA7: Function3), (VSPICLK: Function1, HS1_DATA7: Function3),
Gpio19: (gpio19, 19, gpio19, IO, 0, Bank0, None), (VSPIQ: Function1, U0CTS: Function3), (VSPIQ: Function1, EMAC_TXD0: Function5),
Gpio20: (gpio20, 20, gpio20, IO, 0, Bank0, None),
Gpio21: (gpio21, 21, gpio21, IO, 0, Bank0, None), (VSPIHD: Function1), (VSPIHD: Function1, EMAC_TX_EN: Function5),
Gpio22: (gpio22, 22, gpio22, IO, 0, Bank0), (VSPIWP: Function1), (VSPIWP: Function1, U0RTS: Function3, EMAC_TXD1: Function5),
Gpio23: (gpio23, 23, gpio23, IO, 0, Bank0), (VSPID: Function1), (VSPID: Function1, HS1_STROBE: Function3),
Gpio24: (gpio24, 24, gpio24, IO, 0, Bank0),
Gpio25: (gpio25, 25, gpio25, IO, 0, Bank0), (EMAC_RXD0: Function5), (),
Gpio26: (gpio26, 26, gpio26, IO, 0, Bank0), (EMAC_RXD1: Function5), (),
Gpio27: (gpio27, 27, gpio27, IO, 0, Bank0), (EMAC_RX_DV: Function5), (),
Gpio22: (gpio22, 22, gpio22, IO, 0, Bank0, None), (VSPIWP: Function1), (VSPIWP: Function1, U0RTS: Function3, EMAC_TXD1: Function5),
Gpio23: (gpio23, 23, gpio23, IO, 0, Bank0, None), (VSPID: Function1), (VSPID: Function1, HS1_STROBE: Function3),
Gpio24: (gpio24, 24, gpio24, IO, 0, Bank0, None),
Gpio25: (gpio25, 25, gpio25, IO, 0, Bank0, pad_dac1), (EMAC_RXD0: Function5), (),
Gpio26: (gpio26, 26, gpio26, IO, 0, Bank0, pad_dac2), (EMAC_RXD1: Function5), (),
Gpio27: (gpio27, 27, gpio27, IO, 0, Bank0, touch_pad7), (EMAC_RX_DV: Function5), (),
Gpio32: (gpio32, 32, gpio32, IO, 0, Bank1),
Gpio33: (gpio33, 33, gpio33, IO, 0, Bank1),
Gpio34: (gpio34, 34, gpio34, Input, 0, Bank1),
Gpio35: (gpio35, 35, gpio35, Input, 0, Bank1),
Gpio36: (gpio36, 36, gpio36, Input, 0, Bank1),
Gpio37: (gpio37, 37, gpio37, Input, 0, Bank1),
Gpio38: (gpio38, 38, gpio38, Input, 0, Bank1),
Gpio39: (gpio39, 39, gpio39, Input, 0, Bank1),
Gpio32: (gpio32, 32, gpio32, IO, 0, Bank1, xtal_32k_n),
Gpio33: (gpio33, 33, gpio33, IO, 0, Bank1, xtal_32k_p),
Gpio34: (gpio34, 34, gpio34, Input, 0, Bank1, None),
Gpio35: (gpio35, 35, gpio35, Input, 0, Bank1, None),
Gpio36: (gpio36, 36, gpio36, Input, 0, Bank1, None),
Gpio37: (gpio37, 37, gpio37, Input, 0, Bank1, None),
Gpio38: (gpio38, 38, gpio38, Input, 0, Bank1, None),
Gpio39: (gpio39, 39, gpio39, Input, 0, Bank1, None),
}

44
esp32c3-hal/src/gpio.rs
View File

@ -4,26 +4,26 @@ gpio! {
Function1,
SingleCore,
Gpio0: ( gpio0, 0, gpio[0], IO, RTC, Bank0),
Gpio1: ( gpio1, 1, gpio[1], IO, RTC, Bank0),
Gpio2: ( gpio2, 2, gpio[2], IO, RTC, Bank0), (FSPIQ: Function2), (FSPIQ: Function2),
Gpio3: ( gpio3, 3, gpio[3], IO, RTC, Bank0),
Gpio4: ( gpio4, 4, gpio[4], IO, RTC, Bank0), (FSPIHD: Function2), (USB_JTAG_TMS: Function0, FSPIHD: Function2),
Gpio5: ( gpio5, 5, gpio[5], IO, RTC, Bank0), (FSPIWP: Function2), (USB_JTAG_TDI: Function0, FSPIWP: Function2),
Gpio6: ( gpio6, 6, gpio[6], IO, 0, Bank0), (FSPICLK: Function2), (USB_JTAG_TCK: Function0, FSPICLK_MUX: Function2),
Gpio7: ( gpio7, 7, gpio[7], IO, 0, Bank0), (FSPID: Function2), (USB_JTAG_TDO: Function0, FSPID: Function2),
Gpio8: ( gpio8, 8, gpio[8], IO, 0, Bank0),
Gpio9: ( gpio9, 9, gpio[9], IO, 0, Bank0),
Gpio10: (gpio10, 10, gpio[10], IO, 0, Bank0), (FSPICS0: Function2), (FSPICS0: Function2),
Gpio11: (gpio11, 11, gpio[11], IO, 0, Bank0),
Gpio12: (gpio12, 12, gpio[12], IO, 0, Bank0), (SPIHD: Function0), (SPIHD: Function0),
Gpio13: (gpio13, 13, gpio[13], IO, 0, Bank0), (SPIWP: Function0), (SPIWP: Function0),
Gpio14: (gpio14, 14, gpio[14], IO, 0, Bank0), (), (SPICS0: Function0),
Gpio15: (gpio15, 15, gpio[15], IO, 0, Bank0), (), (SPICLK_MUX: Function0),
Gpio16: (gpio16, 16, gpio[16], IO, 0, Bank0), (SPID: Function0), (SPID: Function0),
Gpio17: (gpio17, 17, gpio[17], IO, 0, Bank0), (SPIQ: Function0), (SPIQ: Function0),
Gpio18: (gpio18, 18, gpio[18], IO, 0, Bank0),
Gpio19: (gpio19, 19, gpio[19], IO, 0, Bank0),
Gpio20: (gpio20, 20, gpio[20], IO, 0, Bank0), (U0RXD: Function0), (),
Gpio21: (gpio21, 21, gpio[21], IO, 0, Bank0), (), (U0TXD: Function0),
Gpio0: ( gpio0, 0, gpio[0], IO, RTC, Bank0, None),
Gpio1: ( gpio1, 1, gpio[1], IO, RTC, Bank0, None),
Gpio2: ( gpio2, 2, gpio[2], IO, RTC, Bank0, None), (FSPIQ: Function2), (FSPIQ: Function2),
Gpio3: ( gpio3, 3, gpio[3], IO, RTC, Bank0, None),
Gpio4: ( gpio4, 4, gpio[4], IO, RTC, Bank0, None), (FSPIHD: Function2), (USB_JTAG_TMS: Function0, FSPIHD: Function2),
Gpio5: ( gpio5, 5, gpio[5], IO, RTC, Bank0, None), (FSPIWP: Function2), (USB_JTAG_TDI: Function0, FSPIWP: Function2),
Gpio6: ( gpio6, 6, gpio[6], IO, 0, Bank0, None), (FSPICLK: Function2), (USB_JTAG_TCK: Function0, FSPICLK_MUX: Function2),
Gpio7: ( gpio7, 7, gpio[7], IO, 0, Bank0, None), (FSPID: Function2), (USB_JTAG_TDO: Function0, FSPID: Function2),
Gpio8: ( gpio8, 8, gpio[8], IO, 0, Bank0, None),
Gpio9: ( gpio9, 9, gpio[9], IO, 0, Bank0, None),
Gpio10: (gpio10, 10, gpio[10], IO, 0, Bank0, None), (FSPICS0: Function2), (FSPICS0: Function2),
Gpio11: (gpio11, 11, gpio[11], IO, 0, Bank0, None),
Gpio12: (gpio12, 12, gpio[12], IO, 0, Bank0, None), (SPIHD: Function0), (SPIHD: Function0),
Gpio13: (gpio13, 13, gpio[13], IO, 0, Bank0, None), (SPIWP: Function0), (SPIWP: Function0),
Gpio14: (gpio14, 14, gpio[14], IO, 0, Bank0, None), (), (SPICS0: Function0),
Gpio15: (gpio15, 15, gpio[15], IO, 0, Bank0, None), (), (SPICLK_MUX: Function0),
Gpio16: (gpio16, 16, gpio[16], IO, 0, Bank0, None), (SPID: Function0), (SPID: Function0),
Gpio17: (gpio17, 17, gpio[17], IO, 0, Bank0, None), (SPIQ: Function0), (SPIQ: Function0),
Gpio18: (gpio18, 18, gpio[18], IO, 0, Bank0, None),
Gpio19: (gpio19, 19, gpio[19], IO, 0, Bank0, None),
Gpio20: (gpio20, 20, gpio[20], IO, 0, Bank0, None), (U0RXD: Function0), (),
Gpio21: (gpio21, 21, gpio[21], IO, 0, Bank0, None), (), (U0TXD: Function0),
}

86
esp32s2-hal/src/gpio.rs
View File

@ -4,47 +4,47 @@ gpio! {
Function1,
SingleCore,
Gpio0: ( gpio0, 0, gpio0, IO, RTC, Bank0),
Gpio1: ( gpio1, 1, gpio1, IO, RTC, Bank0),
Gpio2: ( gpio2, 2, gpio2, IO, RTC, Bank0),
Gpio3: ( gpio3, 3, gpio3, IO, RTC, Bank0),
Gpio4: ( gpio4, 4, gpio4, IO, RTC, Bank0),
Gpio5: ( gpio5, 5, gpio5, IO, RTC, Bank0),
Gpio6: ( gpio6, 6, gpio6, IO, RTC, Bank0),
Gpio7: ( gpio7, 7, gpio7, IO, RTC, Bank0),
Gpio8: ( gpio8, 8, gpio8, IO, RTC, Bank0), (), (SUBSPICS1: Function3),
Gpio9: ( gpio9, 9, gpio9, IO, RTC, Bank0), (SUBSPIHD: Function3, FSPIHD: Function4), (SUBSPIHD: Function3, FSPIHD: Function4),
Gpio10: (gpio10, 10, gpio10, IO, RTC, Bank0), (FSPIIO4: Function2, FSPICS0: Function4), (FSPIIO4: Function2, SUBSPICS0: Function3, FSPICS0: Function4),
Gpio11: (gpio11, 11, gpio11, IO, RTC, Bank0), (FSPIIO5: Function2, SUBSPID: Function3, FSPID: Function4), (FSPIIO5: Function2, SUBSPID: Function3, FSPID: Function4),
Gpio12: (gpio12, 12, gpio12, IO, RTC, Bank0), (FSPICLK: Function4, FSPIIO6: Function2), (FSPIIO6: Function2, SUBSPICLK: Function3, FSPICLK: Function4),
Gpio13: (gpio13, 13, gpio13, IO, RTC, Bank0), (FSPIIO7: Function2, SUBSPIQ: Function3, FSPIQ: Function4), (FSPIIO7: Function2, SUBSPIQ: Function3, FSPIQ: Function4),
Gpio14: (gpio14, 14, gpio14, IO, RTC, Bank0), (SUBSPIWP: Function3, FSPIWP: Function4), (FSPIDQS: Function2, SUBSPIWP: Function3, FSPIWP: Function4),
Gpio15: (gpio15, 15, gpio15, IO, RTC, Bank0), (), (U0RTS: Function2),
Gpio16: (gpio16, 16, gpio16, IO, RTC, Bank0), (U0CTS: Function2), (),
Gpio17: (gpio17, 17, gpio17, IO, RTC, Bank0), (), (U1TXD: Function2),
Gpio18: (gpio18, 18, gpio18, IO, RTC, Bank0), (U1RXD: Function2), (),
Gpio19: (gpio19, 19, gpio19, IO, RTC, Bank0), (), (U1RTS: Function2),
Gpio20: (gpio20, 20, gpio20, IO, RTC, Bank0), (U1CTS: Function2), (),
Gpio21: (gpio21, 21, gpio21, IO, RTC, Bank0),
Gpio26: (gpio26, 26, gpio26, IO, 0, Bank0), (), (SPICS1: Function0),
Gpio27: (gpio27, 27, gpio27, IO, 0, Bank0), (SPIHD: Function0), (SPIHD: Function0),
Gpio28: (gpio28, 28, gpio28, IO, 0, Bank0), (SPIWP: Function0), (SPIWP: Function0),
Gpio29: (gpio29, 29, gpio29, IO, 0, Bank0), (), (SPICS0: Function0),
Gpio30: (gpio30, 30, gpio30, IO, 0, Bank0), (), (SPICLK: Function0),
Gpio31: (gpio31, 31, gpio31, IO, 0, Bank0), (SPIQ: Function0), (SPIQ: Function0),
Gpio32: (gpio32, 32, gpio32, IO, 0, Bank1), (SPID: Function0), (SPID: Function0),
Gpio33: (gpio33, 33, gpio33, IO, 0, Bank1), (FSPIHD: Function2, SUBSPIHD: Function3, FSPIIO4: Function4), (FSPIHD: Function2, SUBSPIHD: Function3),
Gpio34: (gpio34, 34, gpio34, IO, 0, Bank1), (FSPICS0: Function2, FSPIIO5: Function4), (FSPICS0: Function2, SUBSPICS0: Function3),
Gpio35: (gpio35, 35, gpio35, IO, 0, Bank1), (FSPID: Function2, SUBSPID: Function3, FSPIIO6: Function4), (FSPID: Function2, SUBSPID: Function3),
Gpio36: (gpio36, 36, gpio36, IO, 0, Bank1), (FSPICLK: Function2, FSPIIO7: Function4), (FSPICLK: Function2, SUBSPICLK: Function3),
Gpio37: (gpio37, 37, gpio37, IO, 0, Bank1), (FSPIQ: Function2, SUBSPIQ: Function3, SPIDQS: Function4), (FSPIQ: Function2, SUBSPIQ: Function3),
Gpio38: (gpio38, 38, gpio38, IO, 0, Bank1), (FSPIWP: Function2, SUBSPIWP: Function3), (FSPIWP: Function2, SUBSPIWP: Function3),
Gpio39: (gpio39, 39, gpio39, IO, 0, Bank1), (), (SUBSPICS1: Function3),
Gpio40: (gpio40, 40, gpio40, IO, 0, Bank1),
Gpio41: (gpio41, 41, gpio41, IO, 0, Bank1),
Gpio42: (gpio42, 42, gpio42, IO, 0, Bank1),
Gpio43: (gpio43, 43, gpio43, IO, 0, Bank1), (), (U0TXD: Function0),
Gpio44: (gpio44, 44, gpio44, IO, 0, Bank1), (U0RXD: Function0), (),
Gpio45: (gpio45, 45, gpio45, IO, 0, Bank1),
Gpio46: (gpio46, 46, gpio46, IO,Input, Bank1),
Gpio0: ( gpio0, 0, gpio0, IO, RTC, Bank0, None),
Gpio1: ( gpio1, 1, gpio1, IO, RTC, Bank0, None),
Gpio2: ( gpio2, 2, gpio2, IO, RTC, Bank0, None),
Gpio3: ( gpio3, 3, gpio3, IO, RTC, Bank0, None),
Gpio4: ( gpio4, 4, gpio4, IO, RTC, Bank0, None),
Gpio5: ( gpio5, 5, gpio5, IO, RTC, Bank0, None),
Gpio6: ( gpio6, 6, gpio6, IO, RTC, Bank0, None),
Gpio7: ( gpio7, 7, gpio7, IO, RTC, Bank0, None),
Gpio8: ( gpio8, 8, gpio8, IO, RTC, Bank0, None), (), (SUBSPICS1: Function3),
Gpio9: ( gpio9, 9, gpio9, IO, RTC, Bank0, None), (SUBSPIHD: Function3, FSPIHD: Function4), (SUBSPIHD: Function3, FSPIHD: Function4),
Gpio10: (gpio10, 10, gpio10, IO, RTC, Bank0, None), (FSPIIO4: Function2, FSPICS0: Function4), (FSPIIO4: Function2, SUBSPICS0: Function3, FSPICS0: Function4),
Gpio11: (gpio11, 11, gpio11, IO, RTC, Bank0, None), (FSPIIO5: Function2, SUBSPID: Function3, FSPID: Function4), (FSPIIO5: Function2, SUBSPID: Function3, FSPID: Function4),
Gpio12: (gpio12, 12, gpio12, IO, RTC, Bank0, None), (FSPICLK: Function4, FSPIIO6: Function2), (FSPIIO6: Function2, SUBSPICLK: Function3, FSPICLK: Function4),
Gpio13: (gpio13, 13, gpio13, IO, RTC, Bank0, None), (FSPIIO7: Function2, SUBSPIQ: Function3, FSPIQ: Function4), (FSPIIO7: Function2, SUBSPIQ: Function3, FSPIQ: Function4),
Gpio14: (gpio14, 14, gpio14, IO, RTC, Bank0, None), (SUBSPIWP: Function3, FSPIWP: Function4), (FSPIDQS: Function2, SUBSPIWP: Function3, FSPIWP: Function4),
Gpio15: (gpio15, 15, gpio15, IO, RTC, Bank0, None), (), (U0RTS: Function2),
Gpio16: (gpio16, 16, gpio16, IO, RTC, Bank0, None), (U0CTS: Function2), (),
Gpio17: (gpio17, 17, gpio17, IO, RTC, Bank0, None), (), (U1TXD: Function2),
Gpio18: (gpio18, 18, gpio18, IO, RTC, Bank0, None), (U1RXD: Function2), (),
Gpio19: (gpio19, 19, gpio19, IO, RTC, Bank0, None), (), (U1RTS: Function2),
Gpio20: (gpio20, 20, gpio20, IO, RTC, Bank0, None), (U1CTS: Function2), (),
Gpio21: (gpio21, 21, gpio21, IO, RTC, Bank0, None),
Gpio26: (gpio26, 26, gpio26, IO, 0, Bank0, None), (), (SPICS1: Function0),
Gpio27: (gpio27, 27, gpio27, IO, 0, Bank0, None), (SPIHD: Function0), (SPIHD: Function0),
Gpio28: (gpio28, 28, gpio28, IO, 0, Bank0, None), (SPIWP: Function0), (SPIWP: Function0),
Gpio29: (gpio29, 29, gpio29, IO, 0, Bank0, None), (), (SPICS0: Function0),
Gpio30: (gpio30, 30, gpio30, IO, 0, Bank0, None), (), (SPICLK: Function0),
Gpio31: (gpio31, 31, gpio31, IO, 0, Bank0, None), (SPIQ: Function0), (SPIQ: Function0),
Gpio32: (gpio32, 32, gpio32, IO, 0, Bank1, None), (SPID: Function0), (SPID: Function0),
Gpio33: (gpio33, 33, gpio33, IO, 0, Bank1, None), (FSPIHD: Function2, SUBSPIHD: Function3, FSPIIO4: Function4), (FSPIHD: Function2, SUBSPIHD: Function3),
Gpio34: (gpio34, 34, gpio34, IO, 0, Bank1, None), (FSPICS0: Function2, FSPIIO5: Function4), (FSPICS0: Function2, SUBSPICS0: Function3),
Gpio35: (gpio35, 35, gpio35, IO, 0, Bank1, None), (FSPID: Function2, SUBSPID: Function3, FSPIIO6: Function4), (FSPID: Function2, SUBSPID: Function3),
Gpio36: (gpio36, 36, gpio36, IO, 0, Bank1, None), (FSPICLK: Function2, FSPIIO7: Function4), (FSPICLK: Function2, SUBSPICLK: Function3),
Gpio37: (gpio37, 37, gpio37, IO, 0, Bank1, None), (FSPIQ: Function2, SUBSPIQ: Function3, SPIDQS: Function4), (FSPIQ: Function2, SUBSPIQ: Function3),
Gpio38: (gpio38, 38, gpio38, IO, 0, Bank1, None), (FSPIWP: Function2, SUBSPIWP: Function3), (FSPIWP: Function2, SUBSPIWP: Function3),
Gpio39: (gpio39, 39, gpio39, IO, 0, Bank1, None), (), (SUBSPICS1: Function3),
Gpio40: (gpio40, 40, gpio40, IO, 0, Bank1, None),
Gpio41: (gpio41, 41, gpio41, IO, 0, Bank1, None),
Gpio42: (gpio42, 42, gpio42, IO, 0, Bank1, None),
Gpio43: (gpio43, 43, gpio43, IO, 0, Bank1, None), (), (U0TXD: Function0),
Gpio44: (gpio44, 44, gpio44, IO, 0, Bank1, None), (U0RXD: Function0), (),
Gpio45: (gpio45, 45, gpio45, IO, 0, Bank1, None),
Gpio46: (gpio46, 46, gpio46, IO,Input, Bank1, None),
}

90
esp32s3-hal/src/gpio.rs
View File

@ -7,49 +7,49 @@ gpio! {
Function1,
SingleCore,
Gpio0: ( gpio0, 0, gpio[0], IO, RTC, Bank0),
Gpio1: ( gpio1, 1, gpio[1], IO, RTC, Bank0),
Gpio2: ( gpio2, 2, gpio[2], IO, RTC, Bank0),
Gpio3: ( gpio3, 3, gpio[3], IO, RTC, Bank0),
Gpio4: ( gpio4, 4, gpio[4], IO, RTC, Bank0),
Gpio5: ( gpio5, 5, gpio[5], IO, RTC, Bank0),
Gpio6: ( gpio6, 6, gpio[6], IO, RTC, Bank0),
Gpio7: ( gpio7, 7, gpio[7], IO, RTC, Bank0),
Gpio8: ( gpio8, 8, gpio[8], IO, RTC, Bank0), (), (SUBSPICS1: Function3),
Gpio9: ( gpio9, 9, gpio[9], IO, RTC, Bank0), (SUBSPIHD: Function3, FSPIHD: Function4), (SUBSPIHD: Function3, FSPIHD: Function4),
Gpio10: (gpio10, 10, gpio[10], IO, RTC, Bank0), (FSPIIO4: Function2, FSPICS0: Function4), (FSPIIO4: Function2, SUBSPICS0: Function3, FSPICS0: Function4),
Gpio11: (gpio11, 11, gpio[11], IO, RTC, Bank0), (FSPIIO5: Function2, SUBSPID: Function3, FSPID: Function4), (FSPIIO5: Function2, SUBSPID: Function3, FSPID: Function4),
Gpio12: (gpio12, 12, gpio[12], IO, RTC, Bank0), (FSPIIO6: Function2, FSPICLK: Function4), (FSPIIO6: Function2, SUBSPICLK: Function3, FSPICLK: Function4),
Gpio13: (gpio13, 13, gpio[13], IO, RTC, Bank0), (FSPIIO7: Function2, SUBSPIQ: Function3, FSPIQ: Function4), (FSPIIO7: Function2, SUBSPIQ: Function3, FSPIQ: Function4),
Gpio14: (gpio14, 14, gpio[14], IO, RTC, Bank0), (SUBSPIWP: Function3, FSPIWP: Function4), (FSPIDQS: Function2, SUBSPIWP: Function3, FSPIWP: Function4),
Gpio15: (gpio15, 15, gpio[15], IO, RTC, Bank0), (), (U0RTS: Function2),
Gpio16: (gpio16, 16, gpio[16], IO, RTC, Bank0), (U0CTS: Function2), (),
Gpio17: (gpio17, 17, gpio[17], IO, RTC, Bank0), (), (U1TXD: Function2),
Gpio18: (gpio18, 18, gpio[18], IO, RTC, Bank0), (U1RXD: Function2), (),
Gpio19: (gpio19, 19, gpio[19], IO, RTC, Bank0), (), (U1RTS: Function2),
Gpio20: (gpio20, 20, gpio[20], IO, RTC, Bank0), (U1CTS: Function2), (),
Gpio21: (gpio21, 21, gpio[21], IO, RTC, Bank0),
Gpio26: (gpio26, 26, gpio[26], IO, 0, Bank0),
Gpio27: (gpio27, 27, gpio[27], IO, 0, Bank0),
Gpio28: (gpio28, 28, gpio[28], IO, 0, Bank0),
Gpio29: (gpio29, 29, gpio[29], IO, 0, Bank0),
Gpio30: (gpio30, 30, gpio[30], IO, 0, Bank0),
Gpio31: (gpio31, 31, gpio[31], IO, 0, Bank0),
Gpio32: (gpio32, 32, gpio[32], IO, 0, Bank1),
Gpio33: (gpio33, 33, gpio[33], IO, 0, Bank1), (FSPIHD: Function2, SUBSPIHD: Function3), (FSPIHD: Function2, SUBSPIHD: Function3),
Gpio34: (gpio34, 34, gpio[34], IO, 0, Bank1), (FSPICS0: Function2), (FSPICS0: Function2, SUBSPICS0: Function3),
Gpio35: (gpio35, 35, gpio[35], IO, 0, Bank1), (FSPID: Function2, SUBSPID: Function3), (FSPID: Function2, SUBSPID: Function3),
Gpio36: (gpio36, 36, gpio[36], IO, 0, Bank1), (FSPICLK: Function2), (FSPICLK: Function2, SUBSPICLK: Function3),
Gpio37: (gpio37, 37, gpio[37], IO, 0, Bank1), (FSPIQ: Function2, SUBSPIQ: Function3, SPIDQS: Function4), (FSPIQ: Function2, SUBSPIQ: Function3, SPIDQS: Function4),
Gpio38: (gpio38, 38, gpio[38], IO, 0, Bank1), (FSPIWP: Function2, SUBSPIWP: Function3), (FSPIWP: Function3, SUBSPIWP: Function3),
Gpio39: (gpio39, 39, gpio[39], IO, 0, Bank1), (), (SUBSPICS1: Function4),
Gpio40: (gpio40, 40, gpio[40], IO, 0, Bank1),
Gpio41: (gpio41, 41, gpio[41], IO, 0, Bank1),
Gpio42: (gpio42, 42, gpio[42], IO, 0, Bank1),
Gpio43: (gpio43, 43, gpio[43], IO, 0, Bank1),
Gpio44: (gpio44, 44, gpio[44], IO, 0, Bank1),
Gpio45: (gpio45, 45, gpio[45], IO, 0, Bank1),
Gpio46: (gpio46, 46, gpio[46], IO, 0, Bank1),
Gpio47: (gpio47, 47, gpio[47], IO, 0, Bank1),
Gpio48: (gpio48, 48, gpio[48], IO, 0, Bank1),
Gpio0: ( gpio0, 0, gpio[0], IO, RTC, Bank0, None),
Gpio1: ( gpio1, 1, gpio[1], IO, RTC, Bank0, None),
Gpio2: ( gpio2, 2, gpio[2], IO, RTC, Bank0, None),
Gpio3: ( gpio3, 3, gpio[3], IO, RTC, Bank0, None),
Gpio4: ( gpio4, 4, gpio[4], IO, RTC, Bank0, None),
Gpio5: ( gpio5, 5, gpio[5], IO, RTC, Bank0, None),
Gpio6: ( gpio6, 6, gpio[6], IO, RTC, Bank0, None),
Gpio7: ( gpio7, 7, gpio[7], IO, RTC, Bank0, None),
Gpio8: ( gpio8, 8, gpio[8], IO, RTC, Bank0, None), (), (SUBSPICS1: Function3),
Gpio9: ( gpio9, 9, gpio[9], IO, RTC, Bank0, None), (SUBSPIHD: Function3, FSPIHD: Function4), (SUBSPIHD: Function3, FSPIHD: Function4),
Gpio10: (gpio10, 10, gpio[10], IO, RTC, Bank0, None), (FSPIIO4: Function2, FSPICS0: Function4), (FSPIIO4: Function2, SUBSPICS0: Function3, FSPICS0: Function4),
Gpio11: (gpio11, 11, gpio[11], IO, RTC, Bank0, None), (FSPIIO5: Function2, SUBSPID: Function3, FSPID: Function4), (FSPIIO5: Function2, SUBSPID: Function3, FSPID: Function4),
Gpio12: (gpio12, 12, gpio[12], IO, RTC, Bank0, None), (FSPIIO6: Function2, FSPICLK: Function4), (FSPIIO6: Function2, SUBSPICLK: Function3, FSPICLK: Function4),
Gpio13: (gpio13, 13, gpio[13], IO, RTC, Bank0, None), (FSPIIO7: Function2, SUBSPIQ: Function3, FSPIQ: Function4), (FSPIIO7: Function2, SUBSPIQ: Function3, FSPIQ: Function4),
Gpio14: (gpio14, 14, gpio[14], IO, RTC, Bank0, None), (SUBSPIWP: Function3, FSPIWP: Function4), (FSPIDQS: Function2, SUBSPIWP: Function3, FSPIWP: Function4),
Gpio15: (gpio15, 15, gpio[15], IO, RTC, Bank0, None), (), (U0RTS: Function2),
Gpio16: (gpio16, 16, gpio[16], IO, RTC, Bank0, None), (U0CTS: Function2), (),
Gpio17: (gpio17, 17, gpio[17], IO, RTC, Bank0, None), (), (U1TXD: Function2),
Gpio18: (gpio18, 18, gpio[18], IO, RTC, Bank0, None), (U1RXD: Function2), (),
Gpio19: (gpio19, 19, gpio[19], IO, RTC, Bank0, None), (), (U1RTS: Function2),
Gpio20: (gpio20, 20, gpio[20], IO, RTC, Bank0, None), (U1CTS: Function2), (),
Gpio21: (gpio21, 21, gpio[21], IO, RTC, Bank0, None),
Gpio26: (gpio26, 26, gpio[26], IO, 0, Bank0, None),
Gpio27: (gpio27, 27, gpio[27], IO, 0, Bank0, None),
Gpio28: (gpio28, 28, gpio[28], IO, 0, Bank0, None),
Gpio29: (gpio29, 29, gpio[29], IO, 0, Bank0, None),
Gpio30: (gpio30, 30, gpio[30], IO, 0, Bank0, None),
Gpio31: (gpio31, 31, gpio[31], IO, 0, Bank0, None),
Gpio32: (gpio32, 32, gpio[32], IO, 0, Bank1, None),
Gpio33: (gpio33, 33, gpio[33], IO, 0, Bank1, None), (FSPIHD: Function2, SUBSPIHD: Function3), (FSPIHD: Function2, SUBSPIHD: Function3),
Gpio34: (gpio34, 34, gpio[34], IO, 0, Bank1, None), (FSPICS0: Function2), (FSPICS0: Function2, SUBSPICS0: Function3),
Gpio35: (gpio35, 35, gpio[35], IO, 0, Bank1, None), (FSPID: Function2, SUBSPID: Function3), (FSPID: Function2, SUBSPID: Function3),
Gpio36: (gpio36, 36, gpio[36], IO, 0, Bank1, None), (FSPICLK: Function2), (FSPICLK: Function2, SUBSPICLK: Function3),
Gpio37: (gpio37, 37, gpio[37], IO, 0, Bank1, None), (FSPIQ: Function2, SUBSPIQ: Function3, SPIDQS: Function4), (FSPIQ: Function2, SUBSPIQ: Function3, SPIDQS: Function4),
Gpio38: (gpio38, 38, gpio[38], IO, 0, Bank1, None), (FSPIWP: Function2, SUBSPIWP: Function3), (FSPIWP: Function3, SUBSPIWP: Function3),
Gpio39: (gpio39, 39, gpio[39], IO, 0, Bank1, None), (), (SUBSPICS1: Function4),
Gpio40: (gpio40, 40, gpio[40], IO, 0, Bank1, None),
Gpio41: (gpio41, 41, gpio[41], IO, 0, Bank1, None),
Gpio42: (gpio42, 42, gpio[42], IO, 0, Bank1, None),
Gpio43: (gpio43, 43, gpio[43], IO, 0, Bank1, None),
Gpio44: (gpio44, 44, gpio[44], IO, 0, Bank1, None),
Gpio45: (gpio45, 45, gpio[45], IO, 0, Bank1, None),
Gpio46: (gpio46, 46, gpio[46], IO, 0, Bank1, None),
Gpio47: (gpio47, 47, gpio[47], IO, 0, Bank1, None),
Gpio48: (gpio48, 48, gpio[48], IO, 0, Bank1, None),
}