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Remove some #[allow] attributes and an unused function (#1440)

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* Remove TODO comments from linker scripts for ESP32-C6/H2

* Small refactor in Xtensa interrupt module to get rid of some allow attributes

* Remove unused function and attribute from `esp-hal-procmacros`
This commit is contained in:
Jesse Braham 2024-04-16 10:45:57 +00:00 committed by GitHub
parent 66cab5dfb4
commit 586744070b
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GPG Key ID: B5690EEEBB952194
4 changed files with 16 additions and 27 deletions
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9
esp-hal-procmacros/src/embassy.rs
View File

@ -35,8 +35,7 @@ pub(crate) mod main {
f: syn::ItemFn,
main: TokenStream,
) -> Result<TokenStream, TokenStream> {
#[allow(unused_variables)]
let args = Args::from_list(args).map_err(|e| e.write_errors())?;
let _args = Args::from_list(args).map_err(|e| e.write_errors())?;
let fargs = f.sig.inputs.clone();
@ -133,12 +132,6 @@ pub(crate) mod main {
.push(syn::Error::new_spanned(obj.into_token_stream(), msg));
}
/// Add one of Syn's parse errors.
#[allow(unused)]
pub fn syn_error(&self, err: syn::Error) {
self.errors.borrow_mut().as_mut().unwrap().push(err);
}
/// Consume this object, producing a formatted error string if there are
/// errors.
pub fn check(self) -> Result<(), TokenStream> {

2
esp-hal/ld/esp32c6/rom-functions.x
View File

@ -3,8 +3,6 @@ PROVIDE(esp_rom_printf = ets_printf);
PROVIDE(cache_invalidate_icache_all = 0x4000064c);
PROVIDE(cache_suspend_icache = 0x40000698);
PROVIDE(cache_resume_icache = 0x4000069c);
/* TODO PROVIDE(cache_ibus_mmu_set = 0x40000560); */
/* TODO PROVIDE(cache_dbus_mmu_set = 0x40000564); */
PROVIDE(ets_delay_us = 0x40000040);
PROVIDE(ets_update_cpu_frequency_rom = 0x40000048);
PROVIDE(rtc_get_reset_reason = 0x40000018);

2
esp-hal/ld/esp32h2/rom-functions.x
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@ -3,8 +3,6 @@ PROVIDE(esp_rom_printf = ets_printf);
PROVIDE(cache_invalidate_icache_all = 0x40000620);
PROVIDE(cache_suspend_icache = 0x4000066c);
PROVIDE(cache_resume_icache = 0x40000670);
/* TODO PROVIDE(cache_ibus_mmu_set = 0x40000560); */
/* TODO PROVIDE(cache_dbus_mmu_set = 0x40000564); */
PROVIDE(ets_delay_us = 0x40000040);
PROVIDE(ets_update_cpu_frequency_rom = 0x40000048);
PROVIDE(rtc_get_reset_reason = 0x40000018);

30
esp-hal/src/interrupt/xtensa.rs
View File

@ -21,7 +21,6 @@ pub enum Error {
///
/// It's possible to create one handler per priority level. (e.g
/// `level1_interrupt`)
#[allow(unused)]
#[derive(Debug, Copy, Clone)]
#[cfg_attr(feature = "defmt", derive(defmt::Format))]
#[repr(u32)]
@ -150,8 +149,7 @@ pub fn clear(_core: Cpu, which: CpuInterrupt) {
/// Get status of peripheral interrupts
pub fn get_status(core: Cpu) -> u128 {
unsafe {
#[allow(unused_mut)]
let mut status = match core {
let status = match core {
Cpu::ProCpu => {
((*core0_interrupt_peripheral())
.pro_intr_status_0()
@ -188,23 +186,25 @@ pub fn get_status(core: Cpu) -> u128 {
};
#[cfg(feature = "esp32s3")]
match core {
let status = match core {
Cpu::ProCpu => {
status |= ((*core0_interrupt_peripheral())
.pro_intr_status_3()
.read()
.bits() as u128)
<< 96;
status
| ((*core0_interrupt_peripheral())
.pro_intr_status_3()
.read()
.bits() as u128)
<< 96
}
#[cfg(multi_core)]
Cpu::AppCpu => {
status |= ((*core1_interrupt_peripheral())
.app_intr_status_3()
.read()
.bits() as u128)
<< 96;
status
| ((*core1_interrupt_peripheral())
.app_intr_status_3()
.read()
.bits() as u128)
<< 96
}
}
};
status
}