Assorted updates to make most things build properly... still some errors

esp-hal-common/Cargo.toml

@@ -6,18 +6,19 @@ edition = "2018"
 [dependencies]
 embedded-hal = { version = "0.2", features = ["unproven"] }
 nb           = "1.0"
-xtensa-lx = { version = "0.4", optional = true }
+riscv        = { version = "0.7", optional = true }
 void         = { version = "1.0", default-features = false }
+xtensa-lx    = { version = "0.4", optional = true }
 # IMPORTANT:
 # Each supported device MUST have its PAC included below along with a
 # corresponding feature.
-esp32   = { path = "../../esp-pacs/esp32",   optional = true }
+esp32_pac   = { package = "esp32",   git = "https://github.com/jessebraham/esp32.git",   branch = "develop", optional = true }
-esp32c3 = { path = "../../esp-pacs/esp32c3", optional = true }
+esp32c3_pac = { package = "esp32c3", git = "https://github.com/jessebraham/esp32c3.git", branch = "develop", optional = true }
-esp32s2 = { path = "../../esp-pacs/esp32s2", optional = true }
+esp32s2_pac = { package = "esp32s2", git = "https://github.com/jessebraham/esp32s2.git", branch = "develop", optional = true }
-esp32s3 = { path = "../../esp-pacs/esp32s3", optional = true }
+esp32s3_pac = { package = "esp32s3", git = "https://github.com/jessebraham/esp32s3.git", branch = "develop", optional = true }
 
 [features]
-32   = ["esp32",   "xtensa-lx/lx6"]
+esp32   = ["esp32_pac",   "esp32_pac/rt",   "xtensa-lx/lx6"]
-32c3 = ["esp32c3"]
+esp32c3 = ["esp32c3_pac", "esp32c3_pac/rt", "riscv"]
-32s2 = ["esp32s2", "xtensa-lx/lx6"] # FIXME
+esp32s2 = ["esp32s2_pac", "esp32s2_pac/rt", "xtensa-lx/lx6"] # FIXME
-32s3 = ["esp32s3", "xtensa-lx/lx6"] # FIXME
+esp32s3 = ["esp32s3_pac", "esp32s3_pac/rt", "xtensa-lx/lx6"] # FIXME

esp-hal-common/build.rs

@@ -1,9 +1,9 @@
 fn main() {
     let chip_features = [
-        cfg!(feature = "32"),
+        cfg!(feature = "esp32"),
-        cfg!(feature = "32c3"),
+        cfg!(feature = "esp32c3"),
-        cfg!(feature = "32s2"),
+        cfg!(feature = "esp32s2"),
-        cfg!(feature = "32s3"),
+        cfg!(feature = "esp32s3"),
     ];
 
     if chip_features.iter().filter(|&&f| f).count() != 1 {

esp-hal-common/src/lib.rs

@@ -1,13 +1,13 @@
 #![no_std]
 
-#[cfg(feature = "32")]
+#[cfg(feature = "esp32")]
-pub use esp32 as pac;
+pub use esp32_pac as pac;
-#[cfg(feature = "32c3")]
+#[cfg(feature = "esp32c3")]
-pub use esp32c3 as pac;
+pub use esp32c3_pac as pac;
-#[cfg(feature = "32s2")]
+#[cfg(feature = "esp32s2")]
-pub use esp32s2 as pac;
+pub use esp32s2_pac as pac;
-#[cfg(feature = "32s3")]
+#[cfg(feature = "esp32s3")]
-pub use esp32s3 as pac;
+pub use esp32s3_pac as pac;
 
 pub mod prelude;
 pub mod serial;

esp-hal-common/src/serial.rs

@@ -1,6 +1,6 @@
 use embedded_hal::serial::{Read, Write};
 
-#[cfg(any(feature = "32", feature = "32s3"))]
+#[cfg(any(feature = "esp32", feature = "esp32s3"))]
 use crate::pac::UART2;
 use crate::pac::{uart0::RegisterBlock, UART0, UART1};
 
@@ -89,18 +89,18 @@ pub trait Instance {
     }
 
     fn is_tx_idle(&mut self) -> bool {
-        #[cfg(feature = "32")]
+        #[cfg(feature = "esp32")]
         let idle = self.register_block().status.read().st_utx_out().bits() == 0x0u8;
-        #[cfg(not(feature = "32"))]
+        #[cfg(not(feature = "esp32"))]
         let idle = self.register_block().fsm_status.read().st_utx_out().bits() == 0x0u8;
 
         idle
     }
 
     fn is_rx_idle(&mut self) -> bool {
-        #[cfg(feature = "32")]
+        #[cfg(feature = "esp32")]
         let idle = self.register_block().status.read().st_urx_out().bits() == 0x0u8;
-        #[cfg(not(feature = "32"))]
+        #[cfg(not(feature = "esp32"))]
         let idle = self.register_block().fsm_status.read().st_urx_out().bits() == 0x0u8;
 
         idle
@@ -112,13 +112,13 @@ impl<T: Instance> Write<u8> for Serial<T> {
 
     fn write(&mut self, word: u8) -> nb::Result<(), Self::Error> {
         if self.uart.get_tx_fifo_count() < UART_FIFO_SIZE {
-            #[cfg(feature = "32")]
+            #[cfg(feature = "esp32")]
             self.uart
                 .register_block()
                 .fifo()
                 .write(|w| unsafe { w.rxfifo_rd_byte().bits(word) });
 
-            #[cfg(not(feature = "32"))]
+            #[cfg(not(feature = "esp32"))]
             self.uart
                 .register_block()
                 .fifo
@@ -144,7 +144,7 @@ impl<T: Instance> Read<u8> for Serial<T> {
 
     fn read(&mut self) -> nb::Result<u8, Self::Error> {
         if self.uart.get_rx_fifo_count() > 0 {
-            #[cfg(feature = "32")]
+            #[cfg(feature = "esp32")]
             let value = self
                 .uart
                 .register_block()
@@ -153,7 +153,7 @@ impl<T: Instance> Read<u8> for Serial<T> {
                 .rxfifo_rd_byte()
                 .bits();
 
-            #[cfg(not(feature = "32"))]
+            #[cfg(not(feature = "esp32"))]
             let value = self
                 .uart
                 .register_block()
@@ -192,7 +192,7 @@ impl Instance for UART1 {
     }
 }
 
-#[cfg(any(feature = "32", feature = "32s3"))]
+#[cfg(any(feature = "esp32", feature = "esp32s3"))]
 impl Instance for UART2 {
     #[inline(always)]
     fn register_block(&self) -> &RegisterBlock {

esp32-hal/Cargo.toml

@@ -9,18 +9,20 @@ embedded-hal = { version = "0.2", features = ["unproven"] }
 nb = "1.0"
 void = { version = "1.0", default-features = false }
 xtensa-lx = { version = "0.4", features = ["lx6"] }
-xtensa-lx-rt = { version = "0.7", optional = true, features = ["lx6"] }
-
-[dependencies.esp32]
-path = "../../esp-pacs/esp32"
 
 [dependencies.esp-hal-common]
 path = "../esp-hal-common"
-features = ["32"]
+features = ["esp32"]
+
+[dependencies.xtensa-lx-rt]
+git = "https://github.com/esp-rs/xtensa-lx-rt/"
+branch = "unify-xtensa-asm"
+features = ["lx6"]
+optional = true
 
 [dev-dependencies]
 panic-halt = "0.2"
 
 [features]
 default = ["rt"]
-rt = ["esp32/rt", "xtensa-lx-rt"]
+rt = ["xtensa-lx-rt"]

esp32-hal/src/lib.rs

@@ -1,8 +1,7 @@
 #![no_std]
 
 pub use embedded_hal as ehal;
-pub use esp32 as pac;
+pub use esp_hal_common::{pac, prelude, Serial, Timer};
-pub use esp_hal_common::{prelude, Serial, Timer};
 
 #[no_mangle]
 extern "C" fn DefaultHandler(_level: u32, _interrupt: pac::Interrupt) {}

esp32c3-hal/Cargo.toml

@@ -10,12 +10,9 @@ nb = "1.0"
 riscv = "0.7"
 void = { version = "1.0", default-features = false }
 
-[dependencies.esp32c3]
-path = "../../esp-pacs/esp32c3"
-
 [dependencies.esp-hal-common]
 path = "../esp-hal-common"
-features = ["32c3"]
+features = ["esp32c3"]
 
 [dependencies.riscv-rt] 
 git = "https://github.com/MabezDev/riscv-rt"
@@ -27,4 +24,4 @@ panic-halt = "0.2"
 
 [features]
 default = ["rt"]
-rt = ["esp32c3/rt", "riscv-rt"]
+rt = ["riscv-rt"]

esp32c3-hal/src/lib.rs

@@ -1,8 +1,7 @@
 #![no_std]
 
 pub use embedded_hal as ehal;
-pub use esp32c3 as pac;
+pub use esp_hal_common::{pac, prelude, Serial, Timer};
-pub use esp_hal_common::{prelude, Serial, Timer};
 
 pub mod gpio;
 pub mod rtc_cntl;

esp32s2-hal/Cargo.toml

@@ -10,12 +10,9 @@ nb = "1.0"
 void = { version = "1.0", default-features = false }
 xtensa-lx = { version = "0.4", features = ["lx6"] } # FIXME
 
-[dependencies.esp32s2]
-path = "../../esp-pacs/esp32s2"
-
 [dependencies.esp-hal-common]
 path = "../esp-hal-common"
-features = ["32s2"]
+features = ["esp32s2"]
 
 [dependencies.xtensa-lx-rt]
 git = "https://github.com/esp-rs/xtensa-lx-rt/"
@@ -28,4 +25,4 @@ panic-halt = "0.2"
 
 [features]
 default = ["rt"]
-rt = ["esp32s2/rt", "xtensa-lx-rt"]
+rt = ["xtensa-lx-rt"]

esp32s2-hal/src/lib.rs

@@ -1,8 +1,7 @@
 #![no_std]
 
 pub use embedded_hal as ehal;
-pub use esp32s2 as pac;
+pub use esp_hal_common::{pac, prelude, Serial, Timer};
-pub use esp_hal_common::{prelude, Serial, Timer};
 
 #[no_mangle]
 extern "C" fn DefaultHandler(_level: u32, _interrupt: pac::Interrupt) {}

esp32s3-hal/Cargo.toml

@@ -10,12 +10,9 @@ nb = "1.0"
 void = { version = "1.0", default-features = false }
 xtensa-lx = { version = "0.4", features = ["lx6"] } # FIXME
 
-[dependencies.esp32s3]
-path = "../../esp-pacs/esp32s3"
-
 [dependencies.esp-hal-common]
 path = "../esp-hal-common"
-features = ["32s3"]
+features = ["esp32s3"]
 
 [dependencies.xtensa-lx-rt]
 git = "https://github.com/esp-rs/xtensa-lx-rt/"
@@ -28,4 +25,4 @@ panic-halt = "0.2"
 
 [features]
 default = ["rt"]
-rt = ["esp32s3/rt", "xtensa-lx-rt"]
+rt = ["xtensa-lx-rt"]

esp32s3-hal/src/lib.rs

@@ -1,5 +1,4 @@
 #![no_std]
 
 pub use embedded_hal as ehal;
-pub use esp32s3 as pac;
+pub use esp_hal_common::{pac, prelude, Serial, Timer};
-pub use esp_hal_common::{prelude, Serial, Timer};

rustfmt.toml

@@ -1,5 +1,5 @@
 edition = "2018"
-enum_discrim_align_threshold = 15
+enum_discrim_align_threshold = 25
 group_imports = "StdExternalCrate"
 imports_granularity = "Crate"
 imports_layout = "HorizontalVertical"