From 43c8f34e5f532bf6edd5cc23fef8e27c7a60c571 Mon Sep 17 00:00:00 2001 From: bjoernQ Date: Mon, 4 Apr 2022 17:38:12 +0200 Subject: [PATCH] Update xtensa-lx-rt, fix interrupt related examples --- esp-hal-common/Cargo.toml | 2 +- esp32-hal/Cargo.toml | 2 +- esp32-hal/examples/gpio_interrupt.rs | 4 +++- esp32-hal/examples/timer_interrupt.rs | 12 ++++++------ esp32s2-hal/Cargo.toml | 2 +- esp32s2-hal/examples/gpio_interrupt.rs | 2 +- esp32s2-hal/examples/timer_interrupt.rs | 12 ++++++------ esp32s3-hal/Cargo.toml | 2 +- esp32s3-hal/examples/gpio_interrupt.rs | 2 +- esp32s3-hal/examples/timer_interrupt.rs | 12 ++++++------ 10 files changed, 27 insertions(+), 25 deletions(-) diff --git a/esp-hal-common/Cargo.toml b/esp-hal-common/Cargo.toml index 09c9f5e94..8e576013d 100644 --- a/esp-hal-common/Cargo.toml +++ b/esp-hal-common/Cargo.toml @@ -26,7 +26,7 @@ riscv-atomic-emulation-trap = { version = "0.1", optional = true } xtensa-lx = { version = "0.6", optional = true } # Xtensa Runtime -xtensa-lx-rt = { version = "0.10.0", optional = true } +xtensa-lx-rt = { version = "0.11.0", optional = true } # Part of `ufmt` containing only `uWrite` trait ufmt-write = { version = "0.1", optional = true } diff --git a/esp32-hal/Cargo.toml b/esp32-hal/Cargo.toml index 3ea7d1fe4..f2e28be10 100644 --- a/esp32-hal/Cargo.toml +++ b/esp32-hal/Cargo.toml @@ -29,7 +29,7 @@ embedded-hal = { version = "0.2", features = ["unproven"] } nb = "1.0" void = { version = "1.0", default-features = false } xtensa-lx = { version = "0.6.0", features = ["esp32"] } -xtensa-lx-rt = { version = "0.10.0", features = ["esp32"], optional = true } +xtensa-lx-rt = { version = "0.11.0", features = ["esp32"], optional = true } [dependencies.esp-hal-common] path = "../esp-hal-common" diff --git a/esp32-hal/examples/gpio_interrupt.rs b/esp32-hal/examples/gpio_interrupt.rs index 520c1bff9..9ab0a1907 100644 --- a/esp32-hal/examples/gpio_interrupt.rs +++ b/esp32-hal/examples/gpio_interrupt.rs @@ -65,7 +65,9 @@ fn main() -> ! { let mut delay = Delay::new(); unsafe { - xtensa_lx::interrupt::enable(); + xtensa_lx::interrupt::enable_mask( + 1 << 1 + ); } loop { diff --git a/esp32-hal/examples/timer_interrupt.rs b/esp32-hal/examples/timer_interrupt.rs index bdfa29549..19a6d655c 100644 --- a/esp32-hal/examples/timer_interrupt.rs +++ b/esp32-hal/examples/timer_interrupt.rs @@ -48,7 +48,7 @@ fn main() -> ! { interrupt::enable( Cpu::ProCpu, pac::Interrupt::TG1_T0_LEVEL, - interrupt::CpuInterrupt::Interrupt24LevelPriority4, + interrupt::CpuInterrupt::Interrupt23LevelPriority3, ); timer1.start(100_000_000u64); timer1.listen(); @@ -62,10 +62,10 @@ fn main() -> ! { unsafe { xtensa_lx::interrupt::disable(); xtensa_lx::interrupt::enable_mask( - xtensa_lx_rt::interrupt::CpuInterruptLevel::Level2.mask(), + 1 << 20, ); xtensa_lx::interrupt::enable_mask( - xtensa_lx_rt::interrupt::CpuInterruptLevel::Level4.mask(), + 1 << 23, ); } @@ -98,18 +98,18 @@ pub fn level2_interrupt() { } #[no_mangle] -pub fn level4_interrupt() { +pub fn level3_interrupt() { unsafe { (&SERIAL).lock(|data| { let mut serial = data.borrow_mut(); let serial = serial.as_mut().unwrap(); - writeln!(serial, "Interrupt Level 4").ok(); + writeln!(serial, "Interrupt Level 3").ok(); }); } interrupt::clear( Cpu::ProCpu, - interrupt::CpuInterrupt::Interrupt24LevelPriority4, + interrupt::CpuInterrupt::Interrupt23LevelPriority3, ); unsafe { diff --git a/esp32s2-hal/Cargo.toml b/esp32s2-hal/Cargo.toml index 5596e12cd..72d87000d 100644 --- a/esp32s2-hal/Cargo.toml +++ b/esp32s2-hal/Cargo.toml @@ -29,7 +29,7 @@ embedded-hal = { version = "0.2", features = ["unproven"] } nb = "1.0" void = { version = "1.0", default-features = false } xtensa-lx = { version = "0.6.0", features = ["esp32"] } # FIXME -xtensa-lx-rt = { version = "0.10.0", features = ["esp32s2"], optional = true } +xtensa-lx-rt = { version = "0.11.0", features = ["esp32s2"], optional = true } [dependencies.esp-hal-common] path = "../esp-hal-common" diff --git a/esp32s2-hal/examples/gpio_interrupt.rs b/esp32s2-hal/examples/gpio_interrupt.rs index 3346c212b..2347e04ef 100644 --- a/esp32s2-hal/examples/gpio_interrupt.rs +++ b/esp32s2-hal/examples/gpio_interrupt.rs @@ -65,7 +65,7 @@ fn main() -> ! { unsafe { xtensa_lx::interrupt::enable_mask( - xtensa_lx_rt::interrupt::CpuInterruptLevel::Level2.mask(), + 1 << 19, ); } diff --git a/esp32s2-hal/examples/timer_interrupt.rs b/esp32s2-hal/examples/timer_interrupt.rs index 4d33984ed..107569827 100644 --- a/esp32s2-hal/examples/timer_interrupt.rs +++ b/esp32s2-hal/examples/timer_interrupt.rs @@ -48,7 +48,7 @@ fn main() -> ! { interrupt::enable( Cpu::ProCpu, pac::Interrupt::TG1_T0_LEVEL, - interrupt::CpuInterrupt::Interrupt24LevelPriority4, + interrupt::CpuInterrupt::Interrupt23LevelPriority3, ); timer1.start(100_000_000u64); timer1.listen(); @@ -62,10 +62,10 @@ fn main() -> ! { unsafe { xtensa_lx::interrupt::disable(); xtensa_lx::interrupt::enable_mask( - xtensa_lx_rt::interrupt::CpuInterruptLevel::Level2.mask(), + 1 << 20, ); xtensa_lx::interrupt::enable_mask( - xtensa_lx_rt::interrupt::CpuInterruptLevel::Level4.mask(), + 1 << 23, ); } @@ -98,18 +98,18 @@ pub fn level2_interrupt() { } #[no_mangle] -pub fn level4_interrupt() { +pub fn level3_interrupt() { unsafe { (&SERIAL).lock(|data| { let mut serial = data.borrow_mut(); let serial = serial.as_mut().unwrap(); - writeln!(serial, "Interrupt Level 4").ok(); + writeln!(serial, "Interrupt Level 3").ok(); }); } interrupt::clear( Cpu::ProCpu, - interrupt::CpuInterrupt::Interrupt24LevelPriority4, + interrupt::CpuInterrupt::Interrupt23LevelPriority3, ); unsafe { diff --git a/esp32s3-hal/Cargo.toml b/esp32s3-hal/Cargo.toml index 2adcf9c38..3b34ae2bb 100644 --- a/esp32s3-hal/Cargo.toml +++ b/esp32s3-hal/Cargo.toml @@ -29,7 +29,7 @@ embedded-hal = { version = "0.2", features = ["unproven"] } nb = "1.0" void = { version = "1.0", default-features = false } xtensa-lx = { version = "0.6.0", features = ["esp32"] } # FIXME -xtensa-lx-rt = { version = "0.10.0", features = ["esp32s3"], optional = true } +xtensa-lx-rt = { version = "0.11.0", features = ["esp32s3"], optional = true } [dependencies.esp-hal-common] path = "../esp-hal-common" diff --git a/esp32s3-hal/examples/gpio_interrupt.rs b/esp32s3-hal/examples/gpio_interrupt.rs index b46e4c852..173be13ed 100644 --- a/esp32s3-hal/examples/gpio_interrupt.rs +++ b/esp32s3-hal/examples/gpio_interrupt.rs @@ -65,7 +65,7 @@ fn main() -> ! { unsafe { xtensa_lx::interrupt::enable_mask( - xtensa_lx_rt::interrupt::CpuInterruptLevel::Level2.mask(), + 1 << 19, ); } diff --git a/esp32s3-hal/examples/timer_interrupt.rs b/esp32s3-hal/examples/timer_interrupt.rs index 50046b32a..698d41df7 100644 --- a/esp32s3-hal/examples/timer_interrupt.rs +++ b/esp32s3-hal/examples/timer_interrupt.rs @@ -48,7 +48,7 @@ fn main() -> ! { interrupt::enable( Cpu::ProCpu, pac::Interrupt::TG1_T0_LEVEL, - interrupt::CpuInterrupt::Interrupt24LevelPriority4, + interrupt::CpuInterrupt::Interrupt23LevelPriority3, ); timer1.start(100_000_000u64); timer1.listen(); @@ -62,10 +62,10 @@ fn main() -> ! { unsafe { xtensa_lx::interrupt::disable(); xtensa_lx::interrupt::enable_mask( - xtensa_lx_rt::interrupt::CpuInterruptLevel::Level2.mask(), + 1 << 20, ); xtensa_lx::interrupt::enable_mask( - xtensa_lx_rt::interrupt::CpuInterruptLevel::Level4.mask(), + 1 << 23, ); } @@ -98,18 +98,18 @@ pub fn level2_interrupt() { } #[no_mangle] -pub fn level4_interrupt() { +pub fn level3_interrupt() { unsafe { (&SERIAL).lock(|data| { let mut serial = data.borrow_mut(); let serial = serial.as_mut().unwrap(); - writeln!(serial, "Interrupt Level 4").ok(); + writeln!(serial, "Interrupt Level 3").ok(); }); } interrupt::clear( Cpu::ProCpu, - interrupt::CpuInterrupt::Interrupt24LevelPriority4, + interrupt::CpuInterrupt::Interrupt23LevelPriority3, ); unsafe {