diff --git a/esp-hal/Cargo.toml b/esp-hal/Cargo.toml
index 0629d419e..9ff288876 100644
--- a/esp-hal/Cargo.toml
+++ b/esp-hal/Cargo.toml
@@ -55,13 +55,13 @@ ufmt-write               = "0.1.0"
 # IMPORTANT:
 # Each supported device MUST have its PAC included below along with a
 # corresponding feature.
-esp32   = { version = "0.34.0", features = ["critical-section", "rt"], optional = true }
-esp32c2 = { version = "0.23.0", features = ["critical-section", "rt"], optional = true }
-esp32c3 = { version = "0.26.0", features = ["critical-section", "rt"], optional = true }
-esp32c6 = { version = "0.17.0", features = ["critical-section", "rt"], optional = true }
-esp32h2 = { version = "0.13.0", features = ["critical-section", "rt"], optional = true }
-esp32s2 = { version = "0.25.0", features = ["critical-section", "rt"], optional = true }
-esp32s3 = { version = "0.29.0", features = ["critical-section", "rt"], optional = true }
+esp32   = { version = "0.34.0", features = ["critical-section", "rt"], git = "https://github.com/esp-rs/esp-pacs", rev = "ea6316e93f811326023f805c77da7ab34824e891", optional = true }
+esp32c2 = { version = "0.23.0", features = ["critical-section", "rt"], git = "https://github.com/esp-rs/esp-pacs", rev = "ea6316e93f811326023f805c77da7ab34824e891", optional = true }
+esp32c3 = { version = "0.26.0", features = ["critical-section", "rt"], git = "https://github.com/esp-rs/esp-pacs", rev = "ea6316e93f811326023f805c77da7ab34824e891", optional = true }
+esp32c6 = { version = "0.17.0", features = ["critical-section", "rt"], git = "https://github.com/esp-rs/esp-pacs", rev = "ea6316e93f811326023f805c77da7ab34824e891", optional = true }
+esp32h2 = { version = "0.13.0", features = ["critical-section", "rt"], git = "https://github.com/esp-rs/esp-pacs", rev = "ea6316e93f811326023f805c77da7ab34824e891", optional = true }
+esp32s2 = { version = "0.25.0", features = ["critical-section", "rt"], git = "https://github.com/esp-rs/esp-pacs", rev = "ea6316e93f811326023f805c77da7ab34824e891", optional = true }
+esp32s3 = { version = "0.29.0", features = ["critical-section", "rt"], git = "https://github.com/esp-rs/esp-pacs", rev = "ea6316e93f811326023f805c77da7ab34824e891", optional = true }
 
 [target.'cfg(target_arch = "riscv32")'.dependencies]
 riscv            = { version = "0.12.1" }
diff --git a/esp-hal/src/soc/esp32/psram.rs b/esp-hal/src/soc/esp32/psram.rs
index 3f3522029..61059ca2a 100644
--- a/esp-hal/src/soc/esp32/psram.rs
+++ b/esp-hal/src/soc/esp32/psram.rs
@@ -702,12 +702,7 @@ pub(crate) mod utils {
         unsafe {
             let spi = &*crate::peripherals::SPI1::PTR;
             // We need to clear last bit of INT_EN field here.
-            // clear_peri_reg_mask(SPI1_SLAVE_REG, SPI_TRANS_DONE << 5);
-            spi.slave().modify(|r, w| {
-                let current_bits = r.int_en().bits();
-                let new_bits = current_bits & !(1 << 4);
-                w.int_en().bits(new_bits)
-            });
+            spi.slave().modify(|_, w| w.trans_done().clear_bit());
             // SPI_CPOL & SPI_CPHA
             spi.pin().modify(|_, w| w.ck_idle_edge().clear_bit());
             spi.user().modify(|_, w| w.ck_out_edge().clear_bit());