Update and improve esp-lp-hal (#1754)
* Fix warning in `esp-hal-procmacros` when building for `esp-lp-hal` * Document cargo features, use `embedded-hal@1.x.x` by default * Derive more traits on public types, assorted cleanup and improvements * Implement `embedded-hal-nb` and `embedded-io` traits for UART * Update `CHANGELOG.md` * Silence `clippy` for now... * Module documentation for UART * Update module documentation format
This commit is contained in:
Jesse Braham
GitHub
parent
eb9bfd52b1
commit
2bef914e7c
@ -6,7 +6,7 @@ use quote::quote;
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pub fn entry(args: TokenStream, input: TokenStream) -> TokenStream {
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use proc_macro2::{Ident, Span};
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use proc_macro_crate::{crate_name, FoundCrate};
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use quote::{format_ident, quote};
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use quote::format_ident;
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use syn::{
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parse::Error,
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parse_macro_input,
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@ -17,11 +17,14 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
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- Added basic `LP-I2C` driver for C6 (#1185)
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- Add remaining GPIO pins for ESP32-S2/S3 (#1695)
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- Add `wake_hp_core` for ESP32-C6 (#1723)
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- Implement `embedded-hal@1.x.x` traits by default instead of `embedded-hal@0.2.x` (#1754)
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- Implement `embedded-hal-nb` and `embedded-io` traits for UART driver (#1754)
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### Changed
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- Renamed to `esp-ulp-riscv-hal` (#916)
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- Remove 2nd level generics from GPIO pin (#1526)
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- GPIO Input/Output types have been converted to unit structs (#1754)
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### Fixed
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@ -7,6 +7,10 @@ description = "HAL for low-power RISC-V coprocessors found in ESP32 devices"
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repository = "https://github.com/esp-rs/esp-hal"
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license = "MIT OR Apache-2.0"
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[lib]
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bench = false
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test = false
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keywords = [
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"embedded",
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"embedded-hal",
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@ -21,16 +25,19 @@ categories = [
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]
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[dependencies]
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cfg-if = "1.0.0"
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embedded-hal-02 = { version = "0.2.7", package = "embedded-hal", optional = true, features = ["unproven"] }
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embedded-hal-1 = { version = "1.0.0", package = "embedded-hal", optional = true }
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esp32c6-lp = { git = "https://github.com/esp-rs/esp-pacs", rev = "f5429637f079337eb77bad44fb80bded58478619", features = ["critical-section"], optional = true }
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esp32s2-ulp = { git = "https://github.com/esp-rs/esp-pacs", rev = "f5429637f079337eb77bad44fb80bded58478619", features = ["critical-section"], optional = true }
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esp32s3-ulp = { git = "https://github.com/esp-rs/esp-pacs", rev = "f5429637f079337eb77bad44fb80bded58478619", features = ["critical-section"], optional = true }
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nb = { version = "1.1.0", optional = true }
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paste = { version = "1.0.14", optional = true }
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procmacros = { package = "esp-hal-procmacros", path = "../esp-hal-procmacros" }
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riscv = { version = "0.11.0", features = ["critical-section-single-hart"] }
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cfg-if = "1.0.0"
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document-features = "0.2.8"
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embedded-hal = { version = "1.0.0", optional = true }
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embedded-hal-02 = { version = "0.2.7", optional = true, features = ["unproven"], package = "embedded-hal" }
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embedded-hal-nb = { version = "1.0.0", optional = true }
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embedded-io = { version = "0.6.1", optional = true }
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esp32c6-lp = { git = "https://github.com/esp-rs/esp-pacs", rev = "9c76169", features = ["critical-section"], optional = true }
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esp32s2-ulp = { git = "https://github.com/esp-rs/esp-pacs", rev = "9c76169", features = ["critical-section"], optional = true }
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esp32s3-ulp = { git = "https://github.com/esp-rs/esp-pacs", rev = "9c76169", features = ["critical-section"], optional = true }
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nb = { version = "1.1.0", optional = true }
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paste = { version = "1.0.15", optional = true }
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procmacros = { version = "0.11.0", package = "esp-hal-procmacros", path = "../esp-hal-procmacros" }
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riscv = { version = "0.11.1", features = ["critical-section-single-hart"] }
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[dev-dependencies]
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panic-halt = "0.2.0"
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@ -39,31 +46,42 @@ panic-halt = "0.2.0"
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esp-build = { version = "0.1.0", path = "../esp-build" }
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[features]
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default = ["embedded-hal-02"]
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embedded-hal-02 = ["dep:embedded-hal-02"]
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embedded-hal = ["dep:embedded-hal-1"]
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esp32c6 = ["dep:esp32c6-lp", "procmacros/is-lp-core", "dep:nb", "dep:paste"]
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esp32s2 = ["dep:esp32s2-ulp", "procmacros/is-ulp-core"]
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esp32s3 = ["dep:esp32s3-ulp", "procmacros/is-ulp-core"]
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default = ["embedded-hal"]
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## Enable debug features in the HAL (used for development).
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debug = [
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"esp32c6-lp?/impl-register-debug",
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"esp32s2-ulp?/impl-register-debug",
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"esp32s3-ulp?/impl-register-debug",
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]
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# Chip Support Feature Flags
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# Target the ESP32-C6.
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esp32c6 = ["dep:esp32c6-lp", "procmacros/is-lp-core", "dep:nb", "dep:paste"]
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# Target the ESP32-S2.
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esp32s2 = ["dep:esp32s2-ulp", "procmacros/is-ulp-core"]
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# Target the ESP32-S3.
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esp32s3 = ["dep:esp32s3-ulp", "procmacros/is-ulp-core"]
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#! ### Trait Implementation Feature Flags
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## Implement the traits defined in the `0.2.x` release of `embedded-hal`.
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embedded-hal-02 = ["dep:embedded-hal-02"]
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## Implement the traits defined in the `1.0.0` releases of `embedded-hal` and
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## `embedded-hal-nb` for the relevant peripherals.
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embedded-hal = ["dep:embedded-hal", "dep:embedded-hal-nb"]
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## Implement the traits defined in `embedded-io` for the relevant peripherals.
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embedded-io = ["dep:embedded-io"]
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[[example]]
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name = "blinky"
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required-features = ["embedded-hal-02"]
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[[example]]
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name = "uart"
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name = "i2c"
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required-features = ["embedded-hal-02", "esp32c6"]
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[[example]]
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name = "i2c"
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name = "uart"
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required-features = ["embedded-hal-02", "esp32c6"]
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[lints.rust]
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@ -7,6 +7,8 @@
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//!
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//! Make sure the LP RAM is cleared before loading the code.
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//% FEATURES: embedded-hal-02
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#![no_std]
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#![no_main]
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@ -8,6 +8,7 @@
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//! - SCL => GPIO7
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//% CHIPS: esp32c6
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//% FEATURES: embedded-hal-02
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#![no_std]
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#![no_main]
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@ -6,6 +6,7 @@
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//! logs from LP_UART. Make sure the LP RAM is cleared before loading the code.
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//% CHIPS: esp32c6
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//% FEATURES: embedded-hal-02
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#![no_std]
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#![no_main]
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@ -1,11 +1,23 @@
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//! Simple blocking delay functionality.
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//! # Delay driver
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//!
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//! ## Overview
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//!
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//! The delay driver provides blocking delay functionality. The driver
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//! implements the relevant traits from `embedded-hal`.
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//!
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//! ## Examples
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//!
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//! ```rust
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//! esp_lp_hal::delay::Delay.delay_micros(500);
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//! ```
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#[derive(Clone, Copy)]
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/// Delay driver
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#[derive(Debug, Clone, Copy)]
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pub struct Delay;
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impl Delay {
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/// Delay for at least the number of specific microseconds.
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pub fn delay_micros(&mut self, mut us: u32) {
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pub fn delay_micros(&self, mut us: u32) {
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const NANOS_PER_MICRO: u32 = 1_000;
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const MAX_MICROS: u32 = u32::MAX / NANOS_PER_MICRO;
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@ -19,7 +31,7 @@ impl Delay {
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}
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/// Delay for at least the number of specific nanoseconds.
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pub fn delay_nanos(&mut self, ns: u32) {
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pub fn delay_nanos(&self, ns: u32) {
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let ticks_seconds = unsafe { crate::CPU_CLOCK };
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let clock = (ns as u64 * (ticks_seconds as u64)) / 1_000_000_000u64;
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let t0 = cycles();
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@ -72,8 +84,9 @@ impl embedded_hal_02::blocking::delay::DelayMs<u32> for Delay {
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}
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}
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#[cfg(feature = "embedded-hal-1")]
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impl embedded_hal_1::delay::DelayNs for Delay {
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#[cfg(feature = "embedded-hal")]
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impl embedded_hal::delay::DelayNs for Delay {
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#[inline(always)]
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fn delay_ns(&mut self, ns: u32) {
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self.delay_nanos(ns);
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}
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@ -1,34 +1,58 @@
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//! Low-power GPIO driver
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//! # General Purpose Input/Output
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//!
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//! ## Overview
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//!
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//! It's assumed that GPIOs are already configured correctly by the HP core.
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//!
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//! This driver supports various operations on GPIO pins, primarily manipulating
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//! the pin state (setting high/low, toggling).
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//!
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//! This module also implements a number of traits from `embedded-hal` to
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//! provide a common interface for GPIO pins.
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//!
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//! ## Examples
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//!
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//! ```rust
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//! fn main(gpio0: Input<0>, gpio1: Output<1>) -> ! {
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//! loop {
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//! let input_state: bool = gpio0.input_state();
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//! gpio.set_output(input_state);
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//!
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//! esp_lp_hal::delay::Delay.delay_millis(50);
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//! }
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//! }
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//! ```
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#[cfg(feature = "esp32c6")]
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type LpIo = crate::pac::LP_IO;
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#[cfg(any(feature = "esp32s2", feature = "esp32s3"))]
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type LpIo = crate::pac::RTC_IO;
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cfg_if::cfg_if! {
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if #[cfg(feature = "esp32c6")] {
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type LpIo = crate::pac::LP_IO;
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const MAX_GPIO_PIN: u8 = 7;
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} else {
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type LpIo = crate::pac::RTC_IO;
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const MAX_GPIO_PIN: u8 = 21;
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}
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}
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#[cfg(feature = "esp32c6")]
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const MAX_GPIO_PIN: u8 = 7;
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#[cfg(any(feature = "esp32s2", feature = "esp32s3"))]
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const MAX_GPIO_PIN: u8 = 21;
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#[non_exhaustive]
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pub struct Input<const PIN: u8> {}
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/// GPIO input driver
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pub struct Input<const PIN: u8>;
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impl<const PIN: u8> Input<PIN> {
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/// Read the input state/level of the pin.
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pub fn input_state(&self) -> bool {
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unsafe { &*LpIo::PTR }.in_().read().bits() >> PIN & 0x1 != 0
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}
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}
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#[non_exhaustive]
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pub struct Output<const PIN: u8> {}
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/// GPIO output driver
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pub struct Output<const PIN: u8>;
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impl<const PIN: u8> Output<PIN> {
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/// Read the output state/level of the pin.
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pub fn output_state(&self) -> bool {
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unsafe { &*LpIo::PTR }.out().read().bits() >> PIN & 0x1 != 0
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}
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/// Set the output state/level of the pin.
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pub fn set_output(&mut self, on: bool) {
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if on {
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unsafe { &*LpIo::PTR }
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@ -48,7 +72,7 @@ pub unsafe fn conjure_output<const PIN: u8>() -> Option<Output<PIN>> {
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if PIN > MAX_GPIO_PIN {
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None
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} else {
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Some(Output {})
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Some(Output)
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}
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}
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@ -58,7 +82,7 @@ pub unsafe fn conjure_input<const PIN: u8>() -> Option<Input<PIN>> {
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if PIN > MAX_GPIO_PIN {
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None
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} else {
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Some(Input {})
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Some(Input)
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}
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}
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@ -104,18 +128,18 @@ impl<const PIN: u8> embedded_hal_02::digital::v2::StatefulOutputPin for Output<P
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#[cfg(feature = "embedded-hal-02")]
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impl<const PIN: u8> embedded_hal_02::digital::v2::toggleable::Default for Output<PIN> {}
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#[cfg(feature = "embedded-hal-1")]
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impl<const PIN: u8> embedded_hal_1::digital::ErrorType for Input<PIN> {
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#[cfg(feature = "embedded-hal")]
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impl<const PIN: u8> embedded_hal::digital::ErrorType for Input<PIN> {
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type Error = core::convert::Infallible;
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}
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#[cfg(feature = "embedded-hal-1")]
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impl<const PIN: u8> embedded_hal_1::digital::ErrorType for Output<PIN> {
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#[cfg(feature = "embedded-hal")]
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impl<const PIN: u8> embedded_hal::digital::ErrorType for Output<PIN> {
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type Error = core::convert::Infallible;
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}
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#[cfg(feature = "embedded-hal-1")]
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impl<const PIN: u8> embedded_hal_1::digital::InputPin for Input<PIN> {
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#[cfg(feature = "embedded-hal")]
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impl<const PIN: u8> embedded_hal::digital::InputPin for Input<PIN> {
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fn is_high(&mut self) -> Result<bool, Self::Error> {
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Ok(self.input_state())
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}
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@ -125,8 +149,8 @@ impl<const PIN: u8> embedded_hal_1::digital::InputPin for Input<PIN> {
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}
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}
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#[cfg(feature = "embedded-hal-1")]
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impl<const PIN: u8> embedded_hal_1::digital::OutputPin for Output<PIN> {
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#[cfg(feature = "embedded-hal")]
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impl<const PIN: u8> embedded_hal::digital::OutputPin for Output<PIN> {
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fn set_low(&mut self) -> Result<(), Self::Error> {
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self.set_output(false);
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Ok(())
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@ -138,8 +162,8 @@ impl<const PIN: u8> embedded_hal_1::digital::OutputPin for Output<PIN> {
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}
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}
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#[cfg(feature = "embedded-hal-1")]
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impl<const PIN: u8> embedded_hal_1::digital::StatefulOutputPin for Output<PIN> {
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#[cfg(feature = "embedded-hal")]
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impl<const PIN: u8> embedded_hal::digital::StatefulOutputPin for Output<PIN> {
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fn is_set_high(&mut self) -> Result<bool, Self::Error> {
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Ok(self.output_state())
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}
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@ -1,6 +1,8 @@
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//! Low-power I2C driver
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//! # Inter-Integrated Circuit (I2C)
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use esp32c6_lp::LP_I2C0;
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#![allow(unused)] // TODO: Remove me when `embedded_hal::i2c::I2c` is implemented
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use crate::pac::{lp_i2c0::COMD, LP_I2C0};
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const LP_I2C_TRANS_COMPLETE_INT_ST_S: u32 = 7;
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const LP_I2C_END_DETECT_INT_ST_S: u32 = 3;
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@ -20,8 +22,7 @@ pub unsafe fn conjure() -> LpI2c {
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}
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/// I2C-specific transmission errors
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#[derive(Debug, Clone, Copy, PartialEq)]
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#[cfg_attr(feature = "defmt", derive(defmt::Format))]
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#[derive(Debug, Clone, Copy, PartialEq, Eq)]
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pub enum Error {
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ExceedingFifo,
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AckCheckFailed,
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@ -32,17 +33,19 @@ pub enum Error {
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InvalidResponse,
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}
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#[derive(Debug, Clone, Copy, PartialEq, Eq)]
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enum OperationType {
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Write = 0,
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Read = 1,
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}
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#[derive(Eq, PartialEq, Copy, Clone)]
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#[derive(Debug, Clone, Copy, PartialEq, Eq)]
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enum Ack {
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Ack,
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Nack,
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}
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#[derive(Debug, Clone, Copy, PartialEq, Eq)]
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enum Opcode {
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RStart = 6,
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Write = 1,
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@ -51,7 +54,7 @@ enum Opcode {
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End = 4,
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}
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#[derive(PartialEq)]
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#[derive(Debug, Clone, Copy, PartialEq, Eq)]
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enum Command {
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Start,
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Stop,
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@ -135,62 +138,11 @@ impl From<Command> for u16 {
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impl From<Command> for u32 {
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fn from(c: Command) -> u32 {
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let opcode = match c {
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Command::Start => Opcode::RStart,
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Command::Stop => Opcode::Stop,
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Command::End => Opcode::End,
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Command::Write { .. } => Opcode::Write,
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Command::Read { .. } => Opcode::Read,
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};
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let length = match c {
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Command::Start | Command::Stop | Command::End => 0,
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Command::Write { length: l, .. } | Command::Read { length: l, .. } => l,
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};
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let ack_exp = match c {
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Command::Start | Command::Stop | Command::End | Command::Read { .. } => Ack::Nack,
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Command::Write { ack_exp: exp, .. } => exp,
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};
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let ack_check_en = match c {
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Command::Start | Command::Stop | Command::End | Command::Read { .. } => false,
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Command::Write {
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ack_check_en: en, ..
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} => en,
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};
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let ack_value = match c {
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Command::Start | Command::Stop | Command::End | Command::Write { .. } => Ack::Nack,
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Command::Read { ack_value: ack, .. } => ack,
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};
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let mut cmd: u32 = length.into();
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||||
if ack_check_en {
|
||||
cmd |= 1 << 8;
|
||||
} else {
|
||||
cmd &= !(1 << 8);
|
||||
}
|
||||
|
||||
if ack_exp == Ack::Nack {
|
||||
cmd |= 1 << 9;
|
||||
} else {
|
||||
cmd &= !(1 << 9);
|
||||
}
|
||||
|
||||
if ack_value == Ack::Nack {
|
||||
cmd |= 1 << 10;
|
||||
} else {
|
||||
cmd &= !(1 << 10);
|
||||
}
|
||||
|
||||
cmd |= (opcode as u32) << 11;
|
||||
|
||||
cmd
|
||||
u16::from(c) as u32
|
||||
}
|
||||
}
|
||||
|
||||
#[derive(Debug, Clone, Copy, PartialEq, Eq)]
|
||||
enum CommandRegister {
|
||||
COMD0,
|
||||
COMD1,
|
||||
@ -232,8 +184,6 @@ pub struct LpI2c {
|
||||
}
|
||||
|
||||
impl LpI2c {
|
||||
/// Send data bytes from the `bytes` array to a target slave with the
|
||||
/// address `addr`
|
||||
fn master_write(&mut self, addr: u8, bytes: &[u8]) -> Result<(), Error> {
|
||||
let mut cmd_iterator = CommandRegister::COMD0;
|
||||
|
||||
@ -423,16 +373,15 @@ impl LpI2c {
|
||||
bytes: &[u8],
|
||||
buffer: &mut [u8],
|
||||
) -> Result<(), Error> {
|
||||
// it would be possible to combine the write and read
|
||||
// in one transaction but filling the tx fifo with
|
||||
// the current code is somewhat slow even in release mode
|
||||
// which can cause issues
|
||||
// It would be possible to combine the write and read in one transaction, but
|
||||
// filling the tx fifo with the current code is somewhat slow even in release
|
||||
// mode which can cause issues.
|
||||
self.master_write(addr, bytes)?;
|
||||
self.master_read(addr, buffer)?;
|
||||
|
||||
Ok(())
|
||||
}
|
||||
|
||||
/// Update I2C configuration
|
||||
fn lp_i2c_update(&self) {
|
||||
self.i2c.ctr().modify(|_, w| w.conf_upgate().set_bit());
|
||||
}
|
||||
@ -507,49 +456,12 @@ impl LpI2c {
|
||||
command_register: &mut CommandRegister,
|
||||
command: Command,
|
||||
) -> Result<(), Error> {
|
||||
match *command_register {
|
||||
CommandRegister::COMD0 => {
|
||||
self.i2c
|
||||
.comd(0)
|
||||
.write(|w| unsafe { w.command().bits(command.into()) });
|
||||
}
|
||||
CommandRegister::COMD1 => {
|
||||
self.i2c
|
||||
.comd(1)
|
||||
.write(|w| unsafe { w.command().bits(command.into()) });
|
||||
}
|
||||
CommandRegister::COMD2 => {
|
||||
self.i2c
|
||||
.comd(2)
|
||||
.write(|w| unsafe { w.command().bits(command.into()) });
|
||||
}
|
||||
CommandRegister::COMD3 => {
|
||||
self.i2c
|
||||
.comd(3)
|
||||
.write(|w| unsafe { w.command().bits(command.into()) });
|
||||
}
|
||||
CommandRegister::COMD4 => {
|
||||
self.i2c
|
||||
.comd(4)
|
||||
.write(|w| unsafe { w.command().bits(command.into()) });
|
||||
}
|
||||
CommandRegister::COMD5 => {
|
||||
self.i2c
|
||||
.comd(5)
|
||||
.write(|w| unsafe { w.command().bits(command.into()) });
|
||||
}
|
||||
CommandRegister::COMD6 => {
|
||||
self.i2c
|
||||
.comd(6)
|
||||
.write(|w| unsafe { w.command().bits(command.into()) });
|
||||
}
|
||||
CommandRegister::COMD7 => {
|
||||
self.i2c
|
||||
.comd(7)
|
||||
.write(|w| unsafe { w.command().bits(command.into()) });
|
||||
}
|
||||
}
|
||||
self.i2c
|
||||
.comd(*command_register as usize)
|
||||
.write(|w| unsafe { w.command().bits(command.into()) });
|
||||
|
||||
command_register.advance();
|
||||
|
||||
Ok(())
|
||||
}
|
||||
}
|
||||
|
||||
@ -1,3 +1,15 @@
|
||||
//! Bare-metal (`no_std`) HAL for the low power and ultra-low power cores found
|
||||
//! in some Espressif devices. Where applicable, drivers implement the
|
||||
//! [embedded-hal] traits.
|
||||
//!
|
||||
//! ## Choosing a device
|
||||
//!
|
||||
//! Depending on your target device, you need to enable the chip feature
|
||||
//! for that device.
|
||||
//!
|
||||
//! ## Feature Flags
|
||||
#![doc = document_features::document_features!()]
|
||||
#![doc(html_logo_url = "https://avatars.githubusercontent.com/u/46717278")]
|
||||
#![allow(asm_sub_register)]
|
||||
#![no_std]
|
||||
|
||||
@ -10,15 +22,14 @@ pub mod i2c;
|
||||
#[cfg(esp32c6)]
|
||||
pub mod uart;
|
||||
|
||||
pub mod pac {
|
||||
#[cfg(feature = "esp32c6")]
|
||||
pub use esp32c6_lp::*;
|
||||
#[cfg(feature = "esp32s2")]
|
||||
pub use esp32s2_ulp::*;
|
||||
#[cfg(feature = "esp32s3")]
|
||||
pub use esp32s3_ulp::*;
|
||||
}
|
||||
#[cfg(feature = "esp32c6")]
|
||||
pub use esp32c6_lp as pac;
|
||||
#[cfg(feature = "esp32s2")]
|
||||
pub use esp32s2_ulp as pac;
|
||||
#[cfg(feature = "esp32s3")]
|
||||
pub use esp32s3_ulp as pac;
|
||||
|
||||
/// The prelude
|
||||
pub mod prelude {
|
||||
pub use procmacros::entry;
|
||||
}
|
||||
@ -35,13 +46,14 @@ cfg_if::cfg_if! {
|
||||
}
|
||||
}
|
||||
|
||||
pub static mut CPU_CLOCK: u32 = LP_FAST_CLK_HZ;
|
||||
pub(crate) static mut CPU_CLOCK: u32 = LP_FAST_CLK_HZ;
|
||||
|
||||
/// Wake up the HP core
|
||||
#[cfg(feature = "esp32c6")]
|
||||
pub fn wake_hp_core() {
|
||||
let pmu = unsafe { esp32c6_lp::PMU::steal() };
|
||||
pmu.hp_lp_cpu_comm().write(|w| w.lp_trigger_hp().set_bit());
|
||||
unsafe { &*esp32c6_lp::PMU::PTR }
|
||||
.hp_lp_cpu_comm()
|
||||
.write(|w| w.lp_trigger_hp().set_bit());
|
||||
}
|
||||
|
||||
#[cfg(feature = "esp32c6")]
|
||||
@ -49,8 +61,8 @@ global_asm!(
|
||||
r#"
|
||||
.section .init.vector, "ax"
|
||||
/* This is the vector table. It is currently empty, but will be populated
|
||||
* with exception and interrupt handlers when this is supported
|
||||
*/
|
||||
* with exception and interrupt handlers when this is supported
|
||||
*/
|
||||
|
||||
.align 0x4, 0xff
|
||||
.global _vector_table
|
||||
|
||||
@ -1,4 +1,38 @@
|
||||
//! Low-power UART driver
|
||||
//! # Universal Asynchronous Receiver/Transmitter (UART)
|
||||
//!
|
||||
//! ## Overview
|
||||
//!
|
||||
//! The UART is a hardware peripheral which handles communication using serial
|
||||
//! interfaces. This peripheral provides a cheap and ubiquitous method for full-
|
||||
//! and half-duplex communication between devices.
|
||||
//!
|
||||
//! ## Configuration
|
||||
//!
|
||||
//! The usual setting such as baud rate, data bits, parity, and stop bits can
|
||||
//! easily be configured. See the [config] module documentation for more
|
||||
//! information.
|
||||
//!
|
||||
//! ## Usage
|
||||
//!
|
||||
//! The UART driver implements a number of third-party traits, with the
|
||||
//! intention of making the HAL inter-compatible with various device drivers
|
||||
//! from the community. This includes the [embedded-hal], [embedded-hal-nb], and
|
||||
//! [embedded-io] traits.
|
||||
//!
|
||||
//! ## Examples
|
||||
//!
|
||||
//! ```rust
|
||||
//! fn main(mut uart: LpUart) -> ! {
|
||||
//! loop {
|
||||
//! writeln!(uart, "Hello, world!").ok();
|
||||
//! esp_lp_hal::delay::Delay.delay_ms(1000);
|
||||
//! }
|
||||
//! }
|
||||
//! ```
|
||||
//!
|
||||
//! [embedded-hal]: https://docs.rs/embedded-hal/latest/embedded_hal/
|
||||
//! [embedded-hal-nb]: https://docs.rs/embedded-hal-nb/latest/embedded_hal_nb/
|
||||
//! [embedded-io]: https://docs.rs/embedded-io/latest/embedded_io/
|
||||
|
||||
use crate::pac::LP_UART;
|
||||
|
||||
@ -11,74 +45,105 @@ pub unsafe fn conjure() -> LpUart {
|
||||
}
|
||||
}
|
||||
|
||||
/// UART Error
|
||||
#[derive(Debug)]
|
||||
pub enum Error {}
|
||||
|
||||
#[cfg(feature = "embedded-hal")]
|
||||
impl embedded_hal_nb::serial::Error for Error {
|
||||
fn kind(&self) -> embedded_hal_nb::serial::ErrorKind {
|
||||
embedded_hal_nb::serial::ErrorKind::Other
|
||||
}
|
||||
}
|
||||
|
||||
#[cfg(feature = "embedded-io")]
|
||||
impl embedded_io::Error for Error {
|
||||
fn kind(&self) -> embedded_io::ErrorKind {
|
||||
embedded_io::ErrorKind::Other
|
||||
}
|
||||
}
|
||||
|
||||
/// UART configuration
|
||||
pub mod config {
|
||||
/// Number of data bits
|
||||
#[derive(PartialEq, Eq, Copy, Clone, Debug)]
|
||||
#[derive(Debug, Default, Clone, Copy, PartialEq, Eq)]
|
||||
pub enum DataBits {
|
||||
/// 5 data bits
|
||||
DataBits5 = 0,
|
||||
/// 6 data bits
|
||||
DataBits6 = 1,
|
||||
/// 7 data bits
|
||||
DataBits7 = 2,
|
||||
/// 8 data bits
|
||||
#[default]
|
||||
DataBits8 = 3,
|
||||
}
|
||||
|
||||
/// Parity check
|
||||
#[derive(PartialEq, Eq, Copy, Clone, Debug)]
|
||||
#[derive(Debug, Default, Clone, Copy, PartialEq, Eq)]
|
||||
pub enum Parity {
|
||||
/// No parity
|
||||
#[default]
|
||||
ParityNone = 0,
|
||||
/// Even parity
|
||||
ParityEven = 1,
|
||||
/// Odd parity
|
||||
ParityOdd = 2,
|
||||
}
|
||||
|
||||
/// Number of stop bits
|
||||
#[derive(PartialEq, Eq, Copy, Clone, Debug)]
|
||||
#[derive(Debug, Default, Clone, Copy, PartialEq, Eq)]
|
||||
pub enum StopBits {
|
||||
/// 1 stop bit
|
||||
STOP1 = 1,
|
||||
#[default]
|
||||
Stop1 = 1,
|
||||
/// 1.5 stop bits
|
||||
STOP1P5 = 2,
|
||||
Stop1p5 = 2,
|
||||
/// 2 stop bits
|
||||
STOP2 = 3,
|
||||
Stop2 = 3,
|
||||
}
|
||||
|
||||
/// UART configuration
|
||||
#[derive(Debug, Copy, Clone)]
|
||||
#[derive(Debug, Clone, Copy)]
|
||||
pub struct Config {
|
||||
pub baudrate: u32,
|
||||
pub data_bits: DataBits,
|
||||
pub parity: Parity,
|
||||
pub stop_bits: StopBits,
|
||||
baudrate: u32,
|
||||
data_bits: DataBits,
|
||||
parity: Parity,
|
||||
stop_bits: StopBits,
|
||||
}
|
||||
|
||||
impl Config {
|
||||
/// Configure the UART's baud rate
|
||||
pub fn baudrate(mut self, baudrate: u32) -> Self {
|
||||
self.baudrate = baudrate;
|
||||
self
|
||||
}
|
||||
|
||||
/// Configure the UART to use no parity
|
||||
pub fn parity_none(mut self) -> Self {
|
||||
self.parity = Parity::ParityNone;
|
||||
self
|
||||
}
|
||||
|
||||
/// Configure the UART to use even parity
|
||||
pub fn parity_even(mut self) -> Self {
|
||||
self.parity = Parity::ParityEven;
|
||||
self
|
||||
}
|
||||
|
||||
/// Configure the UART to use odd parity
|
||||
pub fn parity_odd(mut self) -> Self {
|
||||
self.parity = Parity::ParityOdd;
|
||||
self
|
||||
}
|
||||
|
||||
/// Configure the UART's data bits
|
||||
pub fn data_bits(mut self, data_bits: DataBits) -> Self {
|
||||
self.data_bits = data_bits;
|
||||
self
|
||||
}
|
||||
|
||||
/// Configure the UART's stop bits
|
||||
pub fn stop_bits(mut self, stop_bits: StopBits) -> Self {
|
||||
self.stop_bits = stop_bits;
|
||||
self
|
||||
@ -88,10 +153,10 @@ pub mod config {
|
||||
impl Default for Config {
|
||||
fn default() -> Config {
|
||||
Config {
|
||||
baudrate: 115200,
|
||||
data_bits: DataBits::DataBits8,
|
||||
parity: Parity::ParityNone,
|
||||
stop_bits: StopBits::STOP1,
|
||||
baudrate: 115_200,
|
||||
data_bits: Default::default(),
|
||||
parity: Default::default(),
|
||||
stop_bits: Default::default(),
|
||||
}
|
||||
}
|
||||
}
|
||||
@ -123,8 +188,13 @@ impl LpUart {
|
||||
}
|
||||
}
|
||||
|
||||
fn write_bytes(&mut self, data: &[u8]) -> nb::Result<(), Error> {
|
||||
data.iter().try_for_each(|c| self.write_byte(*c))
|
||||
fn write_bytes(&mut self, data: &[u8]) -> Result<usize, Error> {
|
||||
let count = data.len();
|
||||
|
||||
data.iter()
|
||||
.try_for_each(|c| nb::block!(self.write_byte(*c)))?;
|
||||
|
||||
Ok(count)
|
||||
}
|
||||
|
||||
fn flush_tx(&mut self) -> nb::Result<(), Error> {
|
||||
@ -150,7 +220,9 @@ impl LpUart {
|
||||
|
||||
impl core::fmt::Write for LpUart {
|
||||
fn write_str(&mut self, s: &str) -> core::fmt::Result {
|
||||
self.write_bytes(s.as_bytes()).map_err(|_| core::fmt::Error)
|
||||
self.write_bytes(s.as_bytes())
|
||||
.map_err(|_| core::fmt::Error)?;
|
||||
Ok(())
|
||||
}
|
||||
}
|
||||
|
||||
@ -175,3 +247,78 @@ impl embedded_hal_02::serial::Write<u8> for LpUart {
|
||||
self.flush_tx()
|
||||
}
|
||||
}
|
||||
|
||||
#[cfg(feature = "embedded-hal")]
|
||||
impl embedded_hal_nb::serial::ErrorType for LpUart {
|
||||
type Error = Error;
|
||||
}
|
||||
|
||||
#[cfg(feature = "embedded-hal")]
|
||||
impl embedded_hal_nb::serial::Read for LpUart {
|
||||
fn read(&mut self) -> nb::Result<u8, Self::Error> {
|
||||
self.read_byte()
|
||||
}
|
||||
}
|
||||
|
||||
#[cfg(feature = "embedded-hal")]
|
||||
impl embedded_hal_nb::serial::Write for LpUart {
|
||||
fn write(&mut self, word: u8) -> nb::Result<(), Self::Error> {
|
||||
self.write_byte(word)
|
||||
}
|
||||
|
||||
fn flush(&mut self) -> nb::Result<(), Self::Error> {
|
||||
self.flush_tx()
|
||||
}
|
||||
}
|
||||
|
||||
#[cfg(feature = "embedded-io")]
|
||||
impl embedded_io::ErrorType for LpUart {
|
||||
type Error = Error;
|
||||
}
|
||||
|
||||
#[cfg(feature = "embedded-io")]
|
||||
impl embedded_io::Read for LpUart {
|
||||
fn read(&mut self, buf: &mut [u8]) -> Result<usize, Self::Error> {
|
||||
if buf.len() == 0 {
|
||||
return Ok(0);
|
||||
}
|
||||
|
||||
while self.get_rx_fifo_count() == 0 {
|
||||
// Block until we have received at least one byte
|
||||
}
|
||||
|
||||
let mut count = 0;
|
||||
while self.get_rx_fifo_count() > 0 && count < buf.len() {
|
||||
buf[count] = self.uart.fifo().read().rxfifo_rd_byte().bits();
|
||||
count += 1;
|
||||
}
|
||||
|
||||
Ok(count)
|
||||
}
|
||||
}
|
||||
|
||||
#[cfg(feature = "embedded-io")]
|
||||
impl embedded_io::ReadReady for LpUart {
|
||||
fn read_ready(&mut self) -> Result<bool, Self::Error> {
|
||||
Ok(self.get_rx_fifo_count() > 0)
|
||||
}
|
||||
}
|
||||
|
||||
#[cfg(feature = "embedded-io")]
|
||||
impl embedded_io::Write for LpUart {
|
||||
fn write(&mut self, buf: &[u8]) -> Result<usize, Self::Error> {
|
||||
self.write_bytes(buf)
|
||||
}
|
||||
|
||||
fn flush(&mut self) -> Result<(), Self::Error> {
|
||||
loop {
|
||||
match self.flush_tx() {
|
||||
Ok(_) => break,
|
||||
Err(nb::Error::WouldBlock) => { /* Wait */ }
|
||||
Err(nb::Error::Other(e)) => return Err(e),
|
||||
}
|
||||
}
|
||||
|
||||
Ok(())
|
||||
}
|
||||
}
|
||||
|
||||
Loading…
Reference in New Issue
Block a user