UART: Remove blocking version of read_bytes and rename drain_fifo to read_bytes instead (#2895)
* Remove `read_bytes` function, rename `drain_fifo` to `read_bytes` * Update migration guide * Update `CHANGELOG.md` * Use `crate::interrupt::free` in `read_byte` * Fix HIL test * Only use `crate::interrupt:free` for ESP32
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@ -92,6 +92,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
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- UART: Make `AtCmdConfig` and `ConfigError` non-exhaustive (#2851)
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- UART: Make `AtCmdConfig` and `ConfigError` non-exhaustive (#2851)
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- UART: Make `AtCmdConfig` use builder-lite pattern (#2851)
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- UART: Make `AtCmdConfig` use builder-lite pattern (#2851)
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- UART: Fix naming violations for `DataBits`, `Parity`, and `StopBits` enum variants (#2893)
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- UART: Fix naming violations for `DataBits`, `Parity`, and `StopBits` enum variants (#2893)
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- UART: Remove blocking version of `read_bytes` and rename `drain_fifo` to `read_bytes` instead (#2895)
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### Fixed
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### Fixed
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@ -382,3 +382,7 @@ e.g.)
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- StopBits::Stop1
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- StopBits::Stop1
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+ StopBits::_1
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+ StopBits::_1
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```
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```
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The previous blocking implementation of `read_bytes` has been removed, and the non-blocking `drain_fifo` has instead been renamed to `read_bytes` in its place.
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Any code which was previously using `read_bytes` to fill a buffer in a blocking manner will now need to implement the necessary logic to block until the buffer is filled in their application instead.
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@ -848,40 +848,6 @@ where
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self.uart.info().apply_config(config)
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self.uart.info().apply_config(config)
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}
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}
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/// Fill a buffer with received bytes
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pub fn read_bytes(&mut self, buf: &mut [u8]) -> Result<(), Error> {
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cfg_if::cfg_if! {
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if #[cfg(esp32s2)] {
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// On the ESP32-S2 we need to use PeriBus2 to read the FIFO:
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let fifo = unsafe {
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&*((self.register_block().fifo().as_ptr() as *mut u8).add(0x20C00000)
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as *mut crate::peripherals::uart0::FIFO)
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};
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} else {
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let fifo = self.register_block().fifo();
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}
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}
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for byte in buf.iter_mut() {
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while self.rx_fifo_count() == 0 {
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// Block until we received at least one byte
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}
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cfg_if::cfg_if! {
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if #[cfg(esp32)] {
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// https://docs.espressif.com/projects/esp-chip-errata/en/latest/esp32/03-errata-description/esp32/cpu-subsequent-access-halted-when-get-interrupted.html
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crate::interrupt::free(|| {
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*byte = fifo.read().rxfifo_rd_byte().bits();
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});
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} else {
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*byte = fifo.read().rxfifo_rd_byte().bits();
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}
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}
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}
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Ok(())
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}
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/// Read a byte from the UART
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/// Read a byte from the UART
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pub fn read_byte(&mut self) -> nb::Result<u8, Error> {
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pub fn read_byte(&mut self) -> nb::Result<u8, Error> {
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cfg_if::cfg_if! {
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cfg_if::cfg_if! {
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@ -897,15 +863,24 @@ where
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}
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}
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if self.rx_fifo_count() > 0 {
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if self.rx_fifo_count() > 0 {
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Ok(fifo.read().rxfifo_rd_byte().bits())
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// https://docs.espressif.com/projects/esp-chip-errata/en/latest/esp32/03-errata-description/esp32/cpu-subsequent-access-halted-when-get-interrupted.html
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cfg_if::cfg_if! {
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if #[cfg(esp32)] {
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let byte = crate::interrupt::free(|| fifo.read().rxfifo_rd_byte().bits());
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} else {
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let byte = fifo.read().rxfifo_rd_byte().bits();
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}
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}
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Ok(byte)
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} else {
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} else {
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Err(nb::Error::WouldBlock)
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Err(nb::Error::WouldBlock)
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}
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}
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}
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}
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/// Read all available bytes from the RX FIFO into the provided buffer and
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/// Read all available bytes from the RX FIFO into the provided buffer and
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/// returns the number of read bytes. Never blocks
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/// returns the number of read bytes without blocking.
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pub fn drain_fifo(&mut self, buf: &mut [u8]) -> usize {
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pub fn read_bytes(&mut self, buf: &mut [u8]) -> usize {
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let mut count = 0;
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let mut count = 0;
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while count < buf.len() {
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while count < buf.len() {
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if let Ok(byte) = self.read_byte() {
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if let Ok(byte) = self.read_byte() {
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@ -1143,8 +1118,9 @@ where
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self.tx.write_bytes(data)
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self.tx.write_bytes(data)
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}
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}
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/// Fill a buffer with received bytes
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/// Read all available bytes from the RX FIFO into the provided buffer and
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pub fn read_bytes(&mut self, buf: &mut [u8]) -> Result<(), Error> {
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/// returns the number of read bytes without blocking.
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pub fn read_bytes(&mut self, buf: &mut [u8]) -> usize {
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self.rx.read_bytes(buf)
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self.rx.read_bytes(buf)
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}
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}
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@ -1481,7 +1457,7 @@ where
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// Block until we received at least one byte
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// Block until we received at least one byte
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}
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}
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Ok(self.drain_fifo(buf))
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Ok(self.read_bytes(buf))
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}
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}
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}
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}
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@ -1858,7 +1834,7 @@ where
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let events_happened = UartRxFuture::new(self.uart.reborrow(), events).await;
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let events_happened = UartRxFuture::new(self.uart.reborrow(), events).await;
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// always drain the fifo, if an error has occurred the data is lost
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// always drain the fifo, if an error has occurred the data is lost
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let read_bytes = self.drain_fifo(buf);
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let read_bytes = self.read_bytes(buf);
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// check error events
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// check error events
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for event_happened in events_happened {
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for event_happened in events_happened {
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match event_happened {
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match event_happened {
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@ -53,8 +53,15 @@ mod tests {
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ctx.tx.flush().unwrap();
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ctx.tx.flush().unwrap();
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ctx.tx.write_bytes(&bytes).unwrap();
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ctx.tx.write_bytes(&bytes).unwrap();
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ctx.rx.read_bytes(&mut buf).unwrap();
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let mut bytes_read = 0;
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loop {
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bytes_read += ctx.rx.read_bytes(&mut buf[bytes_read..]);
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if bytes_read == 3 {
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break;
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}
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}
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assert_eq!(bytes_read, 3);
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assert_eq!(buf, bytes);
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assert_eq!(buf, bytes);
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}
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}
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}
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}
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