Merge pull request #559 from BryanKadzban/add-dma-poll
Add a fn to poll a DMA transfer
This commit is contained in:
commit
278ce406b6
@ -27,6 +27,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
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- Add some miscellaneous examples for the ESP32-H2 (#548)
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- Add some miscellaneous examples for the ESP32-H2 (#548)
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- Add initial support for PCNT in ESP32-H2 (#551)
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- Add initial support for PCNT in ESP32-H2 (#551)
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- Add initial support for RMT in ESP32-H2 (#556)
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- Add initial support for RMT in ESP32-H2 (#556)
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- Add a fn to poll DMA transfers
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### Fixed
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### Fixed
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@ -846,6 +846,8 @@ where
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pub trait DmaTransfer<B, T>: Drop {
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pub trait DmaTransfer<B, T>: Drop {
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/// Wait for the transfer to finish.
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/// Wait for the transfer to finish.
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fn wait(self) -> (B, T);
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fn wait(self) -> (B, T);
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/// Check if the transfer is finished.
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fn is_done(&self) -> bool;
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}
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}
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/// Trait to be implemented for an in progress dma transfer.
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/// Trait to be implemented for an in progress dma transfer.
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@ -853,6 +855,8 @@ pub trait DmaTransfer<B, T>: Drop {
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pub trait DmaTransferRxTx<BR, BT, T>: Drop {
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pub trait DmaTransferRxTx<BR, BT, T>: Drop {
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/// Wait for the transfer to finish.
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/// Wait for the transfer to finish.
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fn wait(self) -> (BR, BT, T);
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fn wait(self) -> (BR, BT, T);
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/// Check if the transfer is finished.
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fn is_done(&self) -> bool;
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}
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}
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#[cfg(feature = "async")]
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#[cfg(feature = "async")]
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@ -326,6 +326,11 @@ where
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(buffer, payload)
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(buffer, payload)
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}
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}
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}
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}
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/// Check if the DMA transfer is complete
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fn is_done(&self) -> bool {
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self.i2s_tx.tx_channel.is_done()
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}
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}
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}
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impl<'d, T, P, TX, BUFFER> Drop for I2sWriteDmaTransfer<T, P, TX, BUFFER>
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impl<'d, T, P, TX, BUFFER> Drop for I2sWriteDmaTransfer<T, P, TX, BUFFER>
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@ -451,6 +456,11 @@ where
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(buffer, payload)
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(buffer, payload)
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}
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}
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}
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}
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/// Check if the DMA transfer is complete
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fn is_done(&self) -> bool {
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self.i2s_rx.rx_channel.is_done()
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}
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}
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}
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impl<T, P, RX, BUFFER> Drop for I2sReadDmaTransfer<T, P, RX, BUFFER>
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impl<T, P, RX, BUFFER> Drop for I2sReadDmaTransfer<T, P, RX, BUFFER>
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@ -861,6 +861,12 @@ pub mod dma {
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(rbuffer, tbuffer, payload)
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(rbuffer, tbuffer, payload)
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}
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}
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}
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}
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/// Check if the DMA transfer is complete
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fn is_done(&self) -> bool {
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let ch = &self.spi_dma.channel;
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ch.tx.is_done() && ch.rx.is_done()
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}
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}
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}
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impl<'d, T, TX, RX, P, RXBUF, TXBUF, M> Drop
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impl<'d, T, TX, RX, P, RXBUF, TXBUF, M> Drop
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@ -918,6 +924,12 @@ pub mod dma {
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(buffer, payload)
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(buffer, payload)
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}
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}
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}
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}
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/// Check if the DMA transfer is complete
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fn is_done(&self) -> bool {
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let ch = &self.spi_dma.channel;
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ch.tx.is_done() && ch.rx.is_done()
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}
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}
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}
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impl<'d, T, TX, RX, P, BUFFER, M> Drop for SpiDmaTransfer<'d, T, TX, RX, P, BUFFER, M>
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impl<'d, T, TX, RX, P, BUFFER, M> Drop for SpiDmaTransfer<'d, T, TX, RX, P, BUFFER, M>
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@ -98,6 +98,13 @@ fn main() -> ! {
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let transfer = spi.dma_transfer(send, receive).unwrap();
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let transfer = spi.dma_transfer(send, receive).unwrap();
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// here we could do something else while DMA transfer is in progress
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// here we could do something else while DMA transfer is in progress
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let mut i = 0;
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// Check is_done until the transfer is almost done (32000 bytes at 100kHz is
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// 2.56 seconds), then move to wait().
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while !transfer.is_done() && i < 10 {
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delay.delay_ms(250u32);
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i += 1;
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}
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// the buffers and spi is moved into the transfer and we can get it back via
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// the buffers and spi is moved into the transfer and we can get it back via
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// `wait`
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// `wait`
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(receive, send, spi) = transfer.wait();
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(receive, send, spi) = transfer.wait();
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@ -99,6 +99,13 @@ fn main() -> ! {
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let transfer = spi.dma_transfer(send, receive).unwrap();
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let transfer = spi.dma_transfer(send, receive).unwrap();
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// here we could do something else while DMA transfer is in progress
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// here we could do something else while DMA transfer is in progress
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let mut i = 0;
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// Check is_done until the transfer is almost done (32000 bytes at 100kHz is
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// 2.56 seconds), then move to wait().
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while !transfer.is_done() && i < 10 {
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delay.delay_ms(250u32);
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i += 1;
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}
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// the buffers and spi is moved into the transfer and we can get it back via
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// the buffers and spi is moved into the transfer and we can get it back via
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// `wait`
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// `wait`
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(receive, send, spi) = transfer.wait();
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(receive, send, spi) = transfer.wait();
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@ -106,6 +106,13 @@ fn main() -> ! {
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let transfer = spi.dma_transfer(send, receive).unwrap();
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let transfer = spi.dma_transfer(send, receive).unwrap();
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// here we could do something else while DMA transfer is in progress
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// here we could do something else while DMA transfer is in progress
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let mut i = 0;
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// Check is_done until the transfer is almost done (32000 bytes at 100kHz is
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// 2.56 seconds), then move to wait().
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while !transfer.is_done() && i < 10 {
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delay.delay_ms(250u32);
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i += 1;
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}
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// the buffers and spi is moved into the transfer and we can get it back via
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// the buffers and spi is moved into the transfer and we can get it back via
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// `wait`
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// `wait`
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(receive, send, spi) = transfer.wait();
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(receive, send, spi) = transfer.wait();
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@ -107,6 +107,13 @@ fn main() -> ! {
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let transfer = spi.dma_transfer(send, receive).unwrap();
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let transfer = spi.dma_transfer(send, receive).unwrap();
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// here we could do something else while DMA transfer is in progress
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// here we could do something else while DMA transfer is in progress
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let mut i = 0;
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// Check is_done until the transfer is almost done (32000 bytes at 100kHz is
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// 2.56 seconds), then move to wait().
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while !transfer.is_done() && i < 10 {
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delay.delay_ms(250u32);
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i += 1;
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}
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// the buffers and spi is moved into the transfer and we can get it back via
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// the buffers and spi is moved into the transfer and we can get it back via
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// `wait`
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// `wait`
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(receive, send, spi) = transfer.wait();
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(receive, send, spi) = transfer.wait();
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@ -98,6 +98,13 @@ fn main() -> ! {
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let transfer = spi.dma_transfer(send, receive).unwrap();
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let transfer = spi.dma_transfer(send, receive).unwrap();
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// here we could do something else while DMA transfer is in progress
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// here we could do something else while DMA transfer is in progress
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let mut i = 0;
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// Check is_done until the transfer is almost done (32000 bytes at 100kHz is
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// 2.56 seconds), then move to wait().
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while !transfer.is_done() && i < 10 {
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delay.delay_ms(250u32);
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i += 1;
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}
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// the buffers and spi is moved into the transfer and we can get it back via
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// the buffers and spi is moved into the transfer and we can get it back via
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// `wait`
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// `wait`
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(receive, send, spi) = transfer.wait();
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(receive, send, spi) = transfer.wait();
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@ -106,6 +106,13 @@ fn main() -> ! {
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let transfer = spi.dma_transfer(send, receive).unwrap();
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let transfer = spi.dma_transfer(send, receive).unwrap();
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// here we could do something else while DMA transfer is in progress
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// here we could do something else while DMA transfer is in progress
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let mut i = 0;
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// Check is_done until the transfer is almost done (32000 bytes at 100kHz is
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// 2.56 seconds), then move to wait().
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while !transfer.is_done() && i < 10 {
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delay.delay_ms(250u32);
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i += 1;
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}
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// the buffers and spi is moved into the transfer and we can get it back via
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// the buffers and spi is moved into the transfer and we can get it back via
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// `wait`
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// `wait`
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(receive, send, spi) = transfer.wait();
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(receive, send, spi) = transfer.wait();
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