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Move Super Watchdog functions into RTC_CNTL common implementation (#125)

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* esp32c3: Move SWD functions into RTC_CNTL common implementation

Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>

* esp32s3: Extend SWD functions to ESP32-S3

Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
This commit is contained in:
Gustavo Henrique Nihei 2022-07-27 17:37:37 -03:00 committed by GitHub
parent 83ac67be23
commit 224e84d9dc
No known key found for this signature in database
GPG Key ID: 4AEE18F83AFDEB23
18 changed files with 36 additions and 67 deletions
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2
esp-hal-common/src/lib.rs
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@ -43,7 +43,6 @@ pub mod interrupt;
pub mod prelude;
pub mod pulse_control;
pub mod rng;
#[cfg(not(feature = "esp32c3"))]
pub mod rtc_cntl;
pub mod serial;
pub mod spi;
@ -58,7 +57,6 @@ pub use interrupt::*;
pub use procmacros as macros;
pub use pulse_control::PulseControl;
pub use rng::Rng;
#[cfg(not(feature = "esp32c3"))]
pub use rtc_cntl::RtcCntl;
pub use serial::Serial;
pub use spi::Spi;

20
esp-hal-common/src/rtc_cntl.rs
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@ -23,4 +23,24 @@ impl RtcCntl {
.modify(|_, w| w.wdt_en().bit(enable).wdt_flashboot_mod_en().clear_bit());
self.set_wdt_write_protection(true);
}
#[cfg(any(feature = "esp32c3", feature = "esp32s3"))]
pub fn set_super_wdt_enable(&mut self, enable: bool) {
self.set_swd_write_protection(false);
self.rtc_cntl
.swd_conf
.write(|w| w.swd_auto_feed_en().bit(!enable));
self.set_swd_write_protection(true);
}
#[cfg(any(feature = "esp32c3", feature = "esp32s3"))]
fn set_swd_write_protection(&mut self, enable: bool) {
let wkey = if enable { 0u32 } else { 0x8F1D_312A };
self.rtc_cntl
.swd_wprotect
.write(|w| unsafe { w.swd_wkey().bits(wkey) });
}
}

2
esp32c3-hal/examples/adc.rs
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@ -36,7 +36,7 @@ fn main() -> ! {
let mut wdt1 = timer_group1.wdt;
rtc_cntl.set_super_wdt_enable(false);
rtc_cntl.set_wdt_enable(false);
rtc_cntl.set_wdt_global_enable(false);
wdt0.disable();
wdt1.disable();

2
esp32c3-hal/examples/advanced_serial.rs
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@ -39,7 +39,7 @@ fn main() -> ! {
// Disable watchdog timers
rtc_cntl.set_super_wdt_enable(false);
rtc_cntl.set_wdt_enable(false);
rtc_cntl.set_wdt_global_enable(false);
wdt0.disable();
wdt1.disable();

2
esp32c3-hal/examples/blinky.rs
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@ -33,7 +33,7 @@ fn main() -> ! {
let mut wdt1 = timer_group1.wdt;
rtc_cntl.set_super_wdt_enable(false);
rtc_cntl.set_wdt_enable(false);
rtc_cntl.set_wdt_global_enable(false);
wdt0.disable();
wdt1.disable();

2
esp32c3-hal/examples/gpio_interrupt.rs
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@ -40,7 +40,7 @@ fn main() -> ! {
let mut wdt1 = timer_group1.wdt;
rtc_cntl.set_super_wdt_enable(false);
rtc_cntl.set_wdt_enable(false);
rtc_cntl.set_wdt_global_enable(false);
wdt0.disable();
wdt1.disable();

2
esp32c3-hal/examples/hello_rgb.rs
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@ -46,7 +46,7 @@ fn main() -> ! {
// Disable watchdogs
rtc_cntl.set_super_wdt_enable(false);
rtc_cntl.set_wdt_enable(false);
rtc_cntl.set_wdt_global_enable(false);
wdt0.disable();
// Configure RMT peripheral globally

2
esp32c3-hal/examples/hello_world.rs
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@ -34,7 +34,7 @@ fn main() -> ! {
// Disable watchdog timers
rtc_cntl.set_super_wdt_enable(false);
rtc_cntl.set_wdt_enable(false);
rtc_cntl.set_wdt_global_enable(false);
wdt0.disable();
wdt1.disable();

2
esp32c3-hal/examples/i2c_display.rs
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@ -48,7 +48,7 @@ fn main() -> ! {
// Disable watchdog timers
rtc_cntl.set_super_wdt_enable(false);
rtc_cntl.set_wdt_enable(false);
rtc_cntl.set_wdt_global_enable(false);
wdt0.disable();
wdt1.disable();

2
esp32c3-hal/examples/read_efuse.rs
View File

@ -33,7 +33,7 @@ fn main() -> ! {
// Disable watchdog timers
rtc_cntl.set_super_wdt_enable(false);
rtc_cntl.set_wdt_enable(false);
rtc_cntl.set_wdt_global_enable(false);
wdt0.disable();
wdt1.disable();

2
esp32c3-hal/examples/serial_interrupts.rs
View File

@ -41,7 +41,7 @@ fn main() -> ! {
// Disable watchdog timers
rtc_cntl.set_super_wdt_enable(false);
rtc_cntl.set_wdt_enable(false);
rtc_cntl.set_wdt_global_enable(false);
wdt0.disable();
wdt1.disable();

2
esp32c3-hal/examples/spi_loopback.rs
View File

@ -49,7 +49,7 @@ fn main() -> ! {
let mut serial0 = Serial::new(peripherals.UART0);
rtc_cntl.set_super_wdt_enable(false);
rtc_cntl.set_wdt_enable(false);
rtc_cntl.set_wdt_global_enable(false);
wdt0.disable();
wdt1.disable();

2
esp32c3-hal/examples/systimer.rs
View File

@ -39,7 +39,7 @@ fn main() -> ! {
let mut wdt1 = timer_group1.wdt;
rtc_cntl.set_super_wdt_enable(false);
rtc_cntl.set_wdt_enable(false);
rtc_cntl.set_wdt_global_enable(false);
wdt0.disable();
wdt1.disable();

2
esp32c3-hal/examples/timer_interrupt.rs
View File

@ -40,7 +40,7 @@ fn main() -> ! {
let mut wdt1 = timer_group1.wdt;
rtc_cntl.set_super_wdt_enable(false);
rtc_cntl.set_wdt_enable(false);
rtc_cntl.set_wdt_global_enable(false);
wdt0.disable();
wdt1.disable();

2
esp32c3-hal/examples/usb_serial_jtag.rs
View File

@ -35,7 +35,7 @@ fn main() -> ! {
// Disable watchdog timers
rtc_cntl.set_super_wdt_enable(false);
rtc_cntl.set_wdt_enable(false);
rtc_cntl.set_wdt_global_enable(false);
wdt0.disable();
wdt1.disable();

2
esp32c3-hal/examples/watchdog.rs
View File

@ -35,7 +35,7 @@ fn main() -> ! {
// Disable watchdog timers
rtc_cntl.set_super_wdt_enable(false);
rtc_cntl.set_wdt_enable(false);
rtc_cntl.set_wdt_global_enable(false);
wdt0.start(2u64.secs());
wdt1.disable();

4
esp32c3-hal/src/lib.rs
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@ -23,17 +23,17 @@ pub use esp_hal_common::{
Delay,
PulseControl,
Rng,
RtcCntl,
Serial,
UsbSerialJtag,
};
#[cfg(feature = "direct-boot")]
use riscv_rt::pre_init;
pub use self::{gpio::IO, rtc_cntl::RtcCntl};
pub use self::gpio::IO;
pub mod adc;
pub mod gpio;
pub mod rtc_cntl;
/// Common module for analog functions
pub mod analog {

49
esp32c3-hal/src/rtc_cntl.rs
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@ -1,49 +0,0 @@
use crate::pac::RTC_CNTL;
pub struct RtcCntl {
rtc_cntl: RTC_CNTL,
}
impl RtcCntl {
pub fn new(rtc_cntl: RTC_CNTL) -> Self {
Self { rtc_cntl }
}
pub fn set_super_wdt_enable(&mut self, enable: bool) {
self.set_swd_write_protection(false);
self.rtc_cntl
.swd_conf
.write(|w| w.swd_auto_feed_en().bit(!enable));
self.set_swd_write_protection(true);
}
fn set_swd_write_protection(&mut self, enable: bool) {
let wkey = if enable { 0u32 } else { 0x8F1D_312A };
self.rtc_cntl
.swd_wprotect
.write(|w| unsafe { w.swd_wkey().bits(wkey) });
}
pub fn set_wdt_enable(&mut self, enable: bool) {
self.set_wdt_write_protection(false);
if !enable {
self.rtc_cntl.wdtconfig0.write(|w| unsafe { w.bits(0) });
} else {
self.rtc_cntl.wdtconfig0.write(|w| w.wdt_en().bit(enable));
}
self.set_wdt_write_protection(true);
}
fn set_wdt_write_protection(&mut self, enable: bool) {
let wkey = if enable { 0u32 } else { 0x50D8_3AA1 };
self.rtc_cntl
.wdtwprotect
.write(|w| unsafe { w.wdt_wkey().bits(wkey) });
}
}