diff --git a/CHANGELOG.md b/CHANGELOG.md
index a22035922..8e795d255 100644
--- a/CHANGELOG.md
+++ b/CHANGELOG.md
@@ -42,7 +42,7 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
 
 ### Breaking
 
-- As part of the refactoring in #537, the public GPIO type has changed.
+- Significantly simplified user-facing GPIO pin types. (#553)
 
 ## [0.9.0] - 2023-05-02
 
diff --git a/esp-hal-common/src/gpio.rs b/esp-hal-common/src/gpio.rs
index 89d2085fd..255c7f7d9 100644
--- a/esp-hal-common/src/gpio.rs
+++ b/esp-hal-common/src/gpio.rs
@@ -202,7 +202,7 @@ pub trait OutputPin: Pin {
 }
 
 #[doc(hidden)]
-pub trait InteruptStatusRegisterAccess {
+pub trait InterruptStatusRegisterAccess {
     fn pro_cpu_interrupt_status_read() -> u32;
 
     fn pro_cpu_nmi_status_read() -> u32;
@@ -217,29 +217,29 @@ pub trait InteruptStatusRegisterAccess {
 }
 
 #[doc(hidden)]
-pub struct InteruptStatusRegisterAccessBank0;
+pub struct InterruptStatusRegisterAccessBank0;
 
 #[doc(hidden)]
-pub struct InteruptStatusRegisterAccessBank1;
+pub struct InterruptStatusRegisterAccessBank1;
 
 #[doc(hidden)]
 pub trait InterruptStatusRegisters<RegisterAccess>
 where
-    RegisterAccess: InteruptStatusRegisterAccess,
+    RegisterAccess: InterruptStatusRegisterAccess,
 {
-    fn pro_cpu_interrupt_status_read(&self) -> u32 {
+    fn pro_cpu_interrupt_status_read() -> u32 {
         RegisterAccess::pro_cpu_interrupt_status_read()
     }
 
-    fn pro_cpu_nmi_status_read(&self) -> u32 {
+    fn pro_cpu_nmi_status_read() -> u32 {
         RegisterAccess::pro_cpu_nmi_status_read()
     }
 
-    fn app_cpu_interrupt_status_read(&self) -> u32 {
+    fn app_cpu_interrupt_status_read() -> u32 {
         RegisterAccess::app_cpu_interrupt_status_read()
     }
 
-    fn app_cpu_nmi_status_read(&self) -> u32 {
+    fn app_cpu_nmi_status_read() -> u32 {
         RegisterAccess::app_cpu_nmi_status_read()
     }
 }
@@ -470,48 +470,30 @@ impl PinType for InputOnlyAnalogPinType {}
 impl IsInputPin for InputOnlyAnalogPinType {}
 impl IsAnalogPin for InputOnlyAnalogPinType {}
 
-pub struct GpioPin<MODE, RA, IRA, PINTYPE, SIG, const GPIONUM: u8>
-where
-    RA: BankGpioRegisterAccess,
-    IRA: InteruptStatusRegisterAccess,
-    PINTYPE: PinType,
-    SIG: GpioSignal,
-{
+pub struct GpioPin<MODE, const GPIONUM: u8> {
     _mode: PhantomData<MODE>,
-    _pintype: PhantomData<PINTYPE>,
-    _reg_access: PhantomData<RA>,
-    _ira: PhantomData<IRA>,
-    _signals: PhantomData<SIG>,
 }
 
-impl<MODE, RA, IRA, PINTYPE, SIG, const GPIONUM: u8> embedded_hal::digital::v2::InputPin
-    for GpioPin<Input<MODE>, RA, IRA, PINTYPE, SIG, GPIONUM>
+impl<MODE, const GPIONUM: u8> embedded_hal::digital::v2::InputPin for GpioPin<Input<MODE>, GPIONUM>
 where
-    RA: BankGpioRegisterAccess,
-    IRA: InteruptStatusRegisterAccess,
-    PINTYPE: PinType,
-    SIG: GpioSignal,
+    Self: GpioProperties,
 {
     type Error = Infallible;
     fn is_high(&self) -> Result<bool, Self::Error> {
-        Ok(RA::read_input() & (1 << (GPIONUM % 32)) != 0)
+        Ok(<Self as GpioProperties>::Bank::read_input() & (1 << (GPIONUM % 32)) != 0)
     }
     fn is_low(&self) -> Result<bool, Self::Error> {
         Ok(!self.is_high()?)
     }
 }
 
-impl<RA, IRA, PINTYPE, SIG, const GPIONUM: u8> embedded_hal::digital::v2::InputPin
-    for GpioPin<Output<OpenDrain>, RA, IRA, PINTYPE, SIG, GPIONUM>
+impl<const GPIONUM: u8> embedded_hal::digital::v2::InputPin for GpioPin<Output<OpenDrain>, GPIONUM>
 where
-    RA: BankGpioRegisterAccess,
-    IRA: InteruptStatusRegisterAccess,
-    PINTYPE: PinType,
-    SIG: GpioSignal,
+    Self: GpioProperties,
 {
     type Error = Infallible;
     fn is_high(&self) -> Result<bool, Self::Error> {
-        Ok(RA::read_input() & (1 << (GPIONUM % 32)) != 0)
+        Ok(<Self as GpioProperties>::Bank::read_input() & (1 << (GPIONUM % 32)) != 0)
     }
     fn is_low(&self) -> Result<bool, Self::Error> {
         Ok(!self.is_high()?)
@@ -519,55 +501,38 @@ where
 }
 
 #[cfg(feature = "eh1")]
-impl<MODE, RA, IRA, PINTYPE, SIG, const GPIONUM: u8> embedded_hal_1::digital::ErrorType
-    for GpioPin<Input<MODE>, RA, IRA, PINTYPE, SIG, GPIONUM>
+impl<MODE, const GPIONUM: u8> embedded_hal_1::digital::ErrorType for GpioPin<Input<MODE>, GPIONUM>
 where
-    RA: BankGpioRegisterAccess,
-    IRA: InteruptStatusRegisterAccess,
-    PINTYPE: PinType,
-    SIG: GpioSignal,
+    Self: GpioProperties,
 {
     type Error = Infallible;
 }
 
 #[cfg(feature = "eh1")]
-impl<MODE, RA, IRA, PINTYPE, SIG, const GPIONUM: u8> embedded_hal_1::digital::InputPin
-    for GpioPin<Input<MODE>, RA, IRA, PINTYPE, SIG, GPIONUM>
+impl<MODE, const GPIONUM: u8> embedded_hal_1::digital::InputPin for GpioPin<Input<MODE>, GPIONUM>
 where
-    RA: BankGpioRegisterAccess,
-    IRA: InteruptStatusRegisterAccess,
-    PINTYPE: PinType,
-    SIG: GpioSignal,
+    Self: GpioProperties,
 {
     fn is_high(&self) -> Result<bool, Self::Error> {
-        Ok(RA::read_input() & (1 << (GPIONUM % 32)) != 0)
+        Ok(<Self as GpioProperties>::Bank::read_input() & (1 << (GPIONUM % 32)) != 0)
     }
     fn is_low(&self) -> Result<bool, Self::Error> {
         Ok(!self.is_high()?)
     }
 }
 
-impl<MODE, RA, IRA, PINTYPE, SIG, const GPIONUM: u8> GpioPin<MODE, RA, IRA, PINTYPE, SIG, GPIONUM>
+impl<MODE, const GPIONUM: u8> GpioPin<MODE, GPIONUM>
 where
-    RA: BankGpioRegisterAccess,
-    IRA: InteruptStatusRegisterAccess,
-    PINTYPE: PinType,
-    SIG: GpioSignal,
+    Self: GpioProperties,
 {
     pub(crate) fn new() -> Self {
-        Self {
-            _mode: PhantomData,
-            _pintype: PhantomData,
-            _reg_access: PhantomData,
-            _ira: PhantomData,
-            _signals: PhantomData,
-        }
+        Self { _mode: PhantomData }
     }
 
     fn init_input(&self, pull_down: bool, pull_up: bool) {
         let gpio = unsafe { &*GPIO::PTR };
 
-        RA::write_out_en_clear(1 << (GPIONUM % 32));
+        <Self as GpioProperties>::Bank::write_out_en_clear(1 << (GPIONUM % 32));
         gpio.func_out_sel_cfg[GPIONUM as usize]
             .modify(|_, w| unsafe { w.out_sel().bits(OutputSignal::GPIO as OutputSignalType) });
 
@@ -597,47 +562,25 @@ where
         });
     }
 
-    pub fn into_floating_input(self) -> GpioPin<Input<Floating>, RA, IRA, PINTYPE, SIG, GPIONUM> {
+    pub fn into_floating_input(self) -> GpioPin<Input<Floating>, GPIONUM> {
         self.init_input(false, false);
-        GpioPin {
-            _mode: PhantomData,
-            _pintype: PhantomData,
-            _reg_access: PhantomData,
-            _ira: PhantomData,
-            _signals: PhantomData,
-        }
+        GpioPin { _mode: PhantomData }
     }
 
-    pub fn into_pull_up_input(self) -> GpioPin<Input<PullUp>, RA, IRA, PINTYPE, SIG, GPIONUM> {
+    pub fn into_pull_up_input(self) -> GpioPin<Input<PullUp>, GPIONUM> {
         self.init_input(false, true);
-        GpioPin {
-            _mode: PhantomData,
-            _pintype: PhantomData,
-            _reg_access: PhantomData,
-            _ira: PhantomData,
-            _signals: PhantomData,
-        }
+        GpioPin { _mode: PhantomData }
     }
 
-    pub fn into_pull_down_input(self) -> GpioPin<Input<PullDown>, RA, IRA, PINTYPE, SIG, GPIONUM> {
+    pub fn into_pull_down_input(self) -> GpioPin<Input<PullDown>, GPIONUM> {
         self.init_input(true, false);
-        GpioPin {
-            _mode: PhantomData,
-            _pintype: PhantomData,
-            _reg_access: PhantomData,
-            _ira: PhantomData,
-            _signals: PhantomData,
-        }
+        GpioPin { _mode: PhantomData }
     }
 }
 
-impl<MODE, RA, IRA, PINTYPE, SIG, const GPIONUM: u8> InputPin
-    for GpioPin<MODE, RA, IRA, PINTYPE, SIG, GPIONUM>
+impl<MODE, const GPIONUM: u8> InputPin for GpioPin<MODE, GPIONUM>
 where
-    RA: BankGpioRegisterAccess,
-    IRA: InteruptStatusRegisterAccess,
-    PINTYPE: PinType,
-    SIG: GpioSignal,
+    Self: GpioProperties,
 {
     fn set_to_input(&mut self) -> &mut Self {
         self.init_input(false, false);
@@ -652,7 +595,7 @@ where
         self
     }
     fn is_input_high(&self) -> bool {
-        RA::read_input() & (1 << (GPIONUM % 32)) != 0
+        <Self as GpioProperties>::Bank::read_input() & (1 << (GPIONUM % 32)) != 0
     }
     fn connect_input_to_peripheral_with_options(
         &mut self,
@@ -664,7 +607,10 @@ where
             GPIO_FUNCTION
         } else {
             let mut res = GPIO_FUNCTION;
-            for (i, input_signal) in SIG::input_signals().iter().enumerate() {
+            for (i, input_signal) in <Self as GpioProperties>::Signals::input_signals()
+                .iter()
+                .enumerate()
+            {
                 if let Some(input_signal) = input_signal {
                     if *input_signal == signal {
                         res = match i {
@@ -707,13 +653,9 @@ where
     }
 }
 
-impl<MODE, RA, IRA, PINTYPE, SIG, const GPIONUM: u8> Pin
-    for GpioPin<MODE, RA, IRA, PINTYPE, SIG, GPIONUM>
+impl<MODE, const GPIONUM: u8> Pin for GpioPin<MODE, GPIONUM>
 where
-    RA: BankGpioRegisterAccess,
-    IRA: InteruptStatusRegisterAccess,
-    PINTYPE: PinType,
-    SIG: GpioSignal,
+    Self: GpioProperties,
 {
     fn number(&self) -> u8 {
         GPIONUM
@@ -773,23 +715,31 @@ where
     }
 
     fn clear_interrupt(&mut self) {
-        RA::write_interrupt_status_clear(1 << (GPIONUM % 32));
+        <Self as GpioProperties>::Bank::write_interrupt_status_clear(1 << (GPIONUM % 32));
     }
 
     fn is_pcore_interrupt_set(&self) -> bool {
-        (IRA::pro_cpu_interrupt_status_read() & (1 << (GPIONUM % 32))) != 0
+        (<Self as GpioProperties>::InterruptStatus::pro_cpu_interrupt_status_read()
+            & (1 << (GPIONUM % 32)))
+            != 0
     }
 
     fn is_pcore_non_maskable_interrupt_set(&self) -> bool {
-        (IRA::pro_cpu_nmi_status_read() & (1 << (GPIONUM % 32))) != 0
+        (<Self as GpioProperties>::InterruptStatus::pro_cpu_nmi_status_read()
+            & (1 << (GPIONUM % 32)))
+            != 0
     }
 
     fn is_acore_interrupt_set(&self) -> bool {
-        (IRA::app_cpu_interrupt_status_read() & (1 << (GPIONUM % 32))) != 0
+        (<Self as GpioProperties>::InterruptStatus::app_cpu_interrupt_status_read()
+            & (1 << (GPIONUM % 32)))
+            != 0
     }
 
     fn is_acore_non_maskable_interrupt_set(&self) -> bool {
-        (IRA::app_cpu_nmi_status_read() & (1 << (GPIONUM % 32))) != 0
+        (<Self as GpioProperties>::InterruptStatus::app_cpu_nmi_status_read()
+            & (1 << (GPIONUM % 32)))
+            != 0
     }
 
     fn enable_hold(&mut self, _on: bool) {
@@ -797,48 +747,42 @@ where
     }
 }
 
-impl<MODE, RA, IRA, PINTYPE, SIG, const GPIONUM: u8> embedded_hal::digital::v2::OutputPin
-    for GpioPin<Output<MODE>, RA, IRA, PINTYPE, SIG, GPIONUM>
+impl<MODE, const GPIONUM: u8> embedded_hal::digital::v2::OutputPin
+    for GpioPin<Output<MODE>, GPIONUM>
 where
-    RA: BankGpioRegisterAccess,
-    IRA: InteruptStatusRegisterAccess,
-    PINTYPE: IsOutputPin,
-    SIG: GpioSignal,
+    Self: GpioProperties,
+    <Self as GpioProperties>::PinType: IsOutputPin,
 {
     type Error = Infallible;
     fn set_high(&mut self) -> Result<(), Self::Error> {
-        RA::write_output_set(1 << (GPIONUM % 32));
+        <Self as GpioProperties>::Bank::write_output_set(1 << (GPIONUM % 32));
         Ok(())
     }
     fn set_low(&mut self) -> Result<(), Self::Error> {
-        RA::write_output_clear(1 << (GPIONUM % 32));
+        <Self as GpioProperties>::Bank::write_output_clear(1 << (GPIONUM % 32));
         Ok(())
     }
 }
 
-impl<MODE, RA, IRA, PINTYPE, SIG, const GPIONUM: u8> embedded_hal::digital::v2::StatefulOutputPin
-    for GpioPin<Output<MODE>, RA, IRA, PINTYPE, SIG, GPIONUM>
+impl<MODE, const GPIONUM: u8> embedded_hal::digital::v2::StatefulOutputPin
+    for GpioPin<Output<MODE>, GPIONUM>
 where
-    RA: BankGpioRegisterAccess,
-    IRA: InteruptStatusRegisterAccess,
-    PINTYPE: IsOutputPin,
-    SIG: GpioSignal,
+    Self: GpioProperties,
+    <Self as GpioProperties>::PinType: IsOutputPin,
 {
     fn is_set_high(&self) -> Result<bool, Self::Error> {
-        Ok(RA::read_output() & (1 << (GPIONUM % 32)) != 0)
+        Ok(<Self as GpioProperties>::Bank::read_output() & (1 << (GPIONUM % 32)) != 0)
     }
     fn is_set_low(&self) -> Result<bool, Self::Error> {
         Ok(!self.is_set_high()?)
     }
 }
 
-impl<MODE, RA, IRA, PINTYPE, SIG, const GPIONUM: u8> embedded_hal::digital::v2::ToggleableOutputPin
-    for GpioPin<Output<MODE>, RA, IRA, PINTYPE, SIG, GPIONUM>
+impl<MODE, const GPIONUM: u8> embedded_hal::digital::v2::ToggleableOutputPin
+    for GpioPin<Output<MODE>, GPIONUM>
 where
-    RA: BankGpioRegisterAccess,
-    IRA: InteruptStatusRegisterAccess,
-    PINTYPE: IsOutputPin,
-    SIG: GpioSignal,
+    Self: GpioProperties,
+    <Self as GpioProperties>::PinType: IsOutputPin,
 {
     type Error = Infallible;
     fn toggle(&mut self) -> Result<(), Self::Error> {
@@ -852,47 +796,39 @@ where
 }
 
 #[cfg(feature = "eh1")]
-impl<MODE, RA, IRA, PINTYPE, SIG, const GPIONUM: u8> embedded_hal_1::digital::ErrorType
-    for GpioPin<Output<MODE>, RA, IRA, PINTYPE, SIG, GPIONUM>
+impl<MODE, const GPIONUM: u8> embedded_hal_1::digital::ErrorType for GpioPin<Output<MODE>, GPIONUM>
 where
-    RA: BankGpioRegisterAccess,
-    IRA: InteruptStatusRegisterAccess,
-    PINTYPE: IsOutputPin,
-    SIG: GpioSignal,
+    Self: GpioProperties,
+    <Self as GpioProperties>::PinType: IsOutputPin,
 {
     type Error = Infallible;
 }
 
 #[cfg(feature = "eh1")]
-impl<MODE, RA, IRA, PINTYPE, SIG, const GPIONUM: u8> embedded_hal_1::digital::OutputPin
-    for GpioPin<Output<MODE>, RA, IRA, PINTYPE, SIG, GPIONUM>
+impl<MODE, const GPIONUM: u8> embedded_hal_1::digital::OutputPin for GpioPin<Output<MODE>, GPIONUM>
 where
-    RA: BankGpioRegisterAccess,
-    IRA: InteruptStatusRegisterAccess,
-    PINTYPE: IsOutputPin,
-    SIG: GpioSignal,
+    Self: GpioProperties,
+    <Self as GpioProperties>::PinType: IsOutputPin,
 {
     fn set_low(&mut self) -> Result<(), Self::Error> {
-        RA::write_output_clear(1 << (GPIONUM % 32));
+        <Self as GpioProperties>::Bank::write_output_clear(1 << (GPIONUM % 32));
         Ok(())
     }
     fn set_high(&mut self) -> Result<(), Self::Error> {
-        RA::write_output_set(1 << (GPIONUM % 32));
+        <Self as GpioProperties>::Bank::write_output_set(1 << (GPIONUM % 32));
         Ok(())
     }
 }
 
 #[cfg(feature = "eh1")]
-impl<MODE, RA, IRA, PINTYPE, SIG, const GPIONUM: u8> embedded_hal_1::digital::StatefulOutputPin
-    for GpioPin<Output<MODE>, RA, IRA, PINTYPE, SIG, GPIONUM>
+impl<MODE, const GPIONUM: u8> embedded_hal_1::digital::StatefulOutputPin
+    for GpioPin<Output<MODE>, GPIONUM>
 where
-    RA: BankGpioRegisterAccess,
-    IRA: InteruptStatusRegisterAccess,
-    PINTYPE: IsOutputPin,
-    SIG: GpioSignal,
+    Self: GpioProperties,
+    <Self as GpioProperties>::PinType: IsOutputPin,
 {
     fn is_set_high(&self) -> Result<bool, Self::Error> {
-        Ok(RA::read_output() & (1 << (GPIONUM % 32)) != 0)
+        Ok(<Self as GpioProperties>::Bank::read_output() & (1 << (GPIONUM % 32)) != 0)
     }
     fn is_set_low(&self) -> Result<bool, Self::Error> {
         Ok(!self.is_set_high()?)
@@ -900,13 +836,11 @@ where
 }
 
 #[cfg(feature = "eh1")]
-impl<MODE, RA, IRA, PINTYPE, SIG, const GPIONUM: u8> embedded_hal_1::digital::ToggleableOutputPin
-    for GpioPin<Output<MODE>, RA, IRA, PINTYPE, SIG, GPIONUM>
+impl<MODE, const GPIONUM: u8> embedded_hal_1::digital::ToggleableOutputPin
+    for GpioPin<Output<MODE>, GPIONUM>
 where
-    RA: BankGpioRegisterAccess,
-    IRA: InteruptStatusRegisterAccess,
-    PINTYPE: IsOutputPin,
-    SIG: GpioSignal,
+    Self: GpioProperties,
+    <Self as GpioProperties>::PinType: IsOutputPin,
 {
     fn toggle(&mut self) -> Result<(), Self::Error> {
         use embedded_hal_1::digital::{OutputPin as _, StatefulOutputPin as _};
@@ -918,154 +852,112 @@ where
     }
 }
 
-impl<MODE, RA, IRA, PINTYPE, SIG, const GPIONUM: u8> crate::peripheral::Peripheral
-    for GpioPin<MODE, RA, IRA, PINTYPE, SIG, GPIONUM>
+impl<MODE, const GPIONUM: u8> crate::peripheral::Peripheral for GpioPin<MODE, GPIONUM>
 where
-    RA: BankGpioRegisterAccess,
-    IRA: InteruptStatusRegisterAccess,
-    PINTYPE: PinType,
-    SIG: GpioSignal,
+    Self: GpioProperties,
 {
-    type P = GpioPin<MODE, RA, IRA, PINTYPE, SIG, GPIONUM>;
+    type P = GpioPin<MODE, GPIONUM>;
 
     unsafe fn clone_unchecked(&mut self) -> Self::P {
         core::ptr::read(self as *const _)
     }
 }
 
-impl<MODE, RA, IRA, PINTYPE, SIG, const GPIONUM: u8> crate::peripheral::sealed::Sealed
-    for GpioPin<MODE, RA, IRA, PINTYPE, SIG, GPIONUM>
-where
-    RA: BankGpioRegisterAccess,
-    IRA: InteruptStatusRegisterAccess,
-    PINTYPE: PinType,
-    SIG: GpioSignal,
+impl<MODE, const GPIONUM: u8> crate::peripheral::sealed::Sealed for GpioPin<MODE, GPIONUM> where
+    Self: GpioProperties
 {
 }
 
-impl<RA, IRA, PINTYPE, SIG, const GPIONUM: u8>
-    From<GpioPin<Unknown, RA, IRA, PINTYPE, SIG, GPIONUM>>
-    for GpioPin<Input<Floating>, RA, IRA, PINTYPE, SIG, GPIONUM>
+impl<const GPIONUM: u8> From<GpioPin<Unknown, GPIONUM>> for GpioPin<Input<Floating>, GPIONUM>
 where
-    RA: BankGpioRegisterAccess,
-    IRA: InteruptStatusRegisterAccess,
-    PINTYPE: IsOutputPin,
-    SIG: GpioSignal,
+    Self: GpioProperties,
+    <Self as GpioProperties>::PinType: IsOutputPin,
+    GpioPin<Unknown, GPIONUM>: GpioProperties,
 {
-    fn from(
-        pin: GpioPin<Unknown, RA, IRA, PINTYPE, SIG, GPIONUM>,
-    ) -> GpioPin<Input<Floating>, RA, IRA, PINTYPE, SIG, GPIONUM> {
+    fn from(pin: GpioPin<Unknown, GPIONUM>) -> GpioPin<Input<Floating>, GPIONUM> {
         pin.into_floating_input()
     }
 }
 
-impl<RA, IRA, PINTYPE, SIG, const GPIONUM: u8>
-    From<GpioPin<Unknown, RA, IRA, PINTYPE, SIG, GPIONUM>>
-    for GpioPin<Input<PullUp>, RA, IRA, PINTYPE, SIG, GPIONUM>
+impl<const GPIONUM: u8> From<GpioPin<Unknown, GPIONUM>> for GpioPin<Input<PullUp>, GPIONUM>
 where
-    RA: BankGpioRegisterAccess,
-    IRA: InteruptStatusRegisterAccess,
-    PINTYPE: IsOutputPin,
-    SIG: GpioSignal,
+    Self: GpioProperties,
+    <Self as GpioProperties>::PinType: IsOutputPin,
+    GpioPin<Unknown, GPIONUM>: GpioProperties,
 {
-    fn from(
-        pin: GpioPin<Unknown, RA, IRA, PINTYPE, SIG, GPIONUM>,
-    ) -> GpioPin<Input<PullUp>, RA, IRA, PINTYPE, SIG, GPIONUM> {
+    fn from(pin: GpioPin<Unknown, GPIONUM>) -> GpioPin<Input<PullUp>, GPIONUM> {
         pin.into_pull_up_input()
     }
 }
 
-impl<RA, IRA, PINTYPE, SIG, const GPIONUM: u8>
-    From<GpioPin<Unknown, RA, IRA, PINTYPE, SIG, GPIONUM>>
-    for GpioPin<Input<PullDown>, RA, IRA, PINTYPE, SIG, GPIONUM>
+impl<const GPIONUM: u8> From<GpioPin<Unknown, GPIONUM>> for GpioPin<Input<PullDown>, GPIONUM>
 where
-    RA: BankGpioRegisterAccess,
-    IRA: InteruptStatusRegisterAccess,
-    PINTYPE: IsInputPin,
-    SIG: GpioSignal,
+    Self: GpioProperties,
+    <Self as GpioProperties>::PinType: IsInputPin,
+    GpioPin<Unknown, GPIONUM>: GpioProperties,
 {
-    fn from(
-        pin: GpioPin<Unknown, RA, IRA, PINTYPE, SIG, GPIONUM>,
-    ) -> GpioPin<Input<PullDown>, RA, IRA, PINTYPE, SIG, GPIONUM> {
+    fn from(pin: GpioPin<Unknown, GPIONUM>) -> GpioPin<Input<PullDown>, GPIONUM> {
         pin.into_pull_down_input()
     }
 }
 
-impl<RA, IRA, PINTYPE, SIG, const GPIONUM: u8>
-    From<GpioPin<Unknown, RA, IRA, PINTYPE, SIG, GPIONUM>>
-    for GpioPin<Output<PushPull>, RA, IRA, PINTYPE, SIG, GPIONUM>
+impl<const GPIONUM: u8> From<GpioPin<Unknown, GPIONUM>> for GpioPin<Output<PushPull>, GPIONUM>
 where
-    RA: BankGpioRegisterAccess,
-    IRA: InteruptStatusRegisterAccess,
-    PINTYPE: IsOutputPin,
-    SIG: GpioSignal,
+    Self: GpioProperties,
+    <Self as GpioProperties>::PinType: IsOutputPin,
+    GpioPin<Unknown, GPIONUM>: GpioProperties,
+    <GpioPin<Unknown, GPIONUM> as GpioProperties>::PinType: IsOutputPin,
 {
-    fn from(
-        pin: GpioPin<Unknown, RA, IRA, PINTYPE, SIG, GPIONUM>,
-    ) -> GpioPin<Output<PushPull>, RA, IRA, PINTYPE, SIG, GPIONUM> {
+    fn from(pin: GpioPin<Unknown, GPIONUM>) -> GpioPin<Output<PushPull>, GPIONUM> {
         pin.into_push_pull_output()
     }
 }
 
-impl<RA, IRA, PINTYPE, SIG, const GPIONUM: u8>
-    From<GpioPin<Unknown, RA, IRA, PINTYPE, SIG, GPIONUM>>
-    for GpioPin<Output<OpenDrain>, RA, IRA, PINTYPE, SIG, GPIONUM>
+impl<const GPIONUM: u8> From<GpioPin<Unknown, GPIONUM>> for GpioPin<Output<OpenDrain>, GPIONUM>
 where
-    RA: BankGpioRegisterAccess,
-    IRA: InteruptStatusRegisterAccess,
-    PINTYPE: IsOutputPin,
-    SIG: GpioSignal,
+    Self: GpioProperties,
+    <Self as GpioProperties>::PinType: IsOutputPin,
+    GpioPin<Unknown, GPIONUM>: GpioProperties,
+    <GpioPin<Unknown, GPIONUM> as GpioProperties>::PinType: IsOutputPin,
 {
-    fn from(
-        pin: GpioPin<Unknown, RA, IRA, PINTYPE, SIG, GPIONUM>,
-    ) -> GpioPin<Output<OpenDrain>, RA, IRA, PINTYPE, SIG, GPIONUM> {
+    fn from(pin: GpioPin<Unknown, GPIONUM>) -> GpioPin<Output<OpenDrain>, GPIONUM> {
         pin.into_open_drain_output()
     }
 }
 
-impl<RA, IRA, PINTYPE, SIG, const GPIONUM: u8>
-    From<GpioPin<Unknown, RA, IRA, PINTYPE, SIG, GPIONUM>>
-    for GpioPin<Alternate<AF1>, RA, IRA, PINTYPE, SIG, GPIONUM>
+impl<const GPIONUM: u8> From<GpioPin<Unknown, GPIONUM>> for GpioPin<Alternate<AF1>, GPIONUM>
 where
-    RA: BankGpioRegisterAccess,
-    IRA: InteruptStatusRegisterAccess,
-    PINTYPE: IsOutputPin,
-    SIG: GpioSignal,
+    Self: GpioProperties,
+    <Self as GpioProperties>::PinType: IsOutputPin,
+    GpioPin<Unknown, GPIONUM>: GpioProperties,
+    <GpioPin<Unknown, GPIONUM> as GpioProperties>::PinType: IsOutputPin,
 {
-    fn from(
-        pin: GpioPin<Unknown, RA, IRA, PINTYPE, SIG, GPIONUM>,
-    ) -> GpioPin<Alternate<AF1>, RA, IRA, PINTYPE, SIG, GPIONUM> {
+    fn from(pin: GpioPin<Unknown, GPIONUM>) -> GpioPin<Alternate<AF1>, GPIONUM> {
         pin.into_alternate_1()
     }
 }
 
-impl<RA, IRA, PINTYPE, SIG, const GPIONUM: u8>
-    From<GpioPin<Unknown, RA, IRA, PINTYPE, SIG, GPIONUM>>
-    for GpioPin<Alternate<AF2>, RA, IRA, PINTYPE, SIG, GPIONUM>
+impl<const GPIONUM: u8> From<GpioPin<Unknown, GPIONUM>> for GpioPin<Alternate<AF2>, GPIONUM>
 where
-    RA: BankGpioRegisterAccess,
-    IRA: InteruptStatusRegisterAccess,
-    PINTYPE: IsOutputPin,
-    SIG: GpioSignal,
+    Self: GpioProperties,
+    <Self as GpioProperties>::PinType: IsOutputPin,
+    GpioPin<Unknown, GPIONUM>: GpioProperties,
+    <GpioPin<Unknown, GPIONUM> as GpioProperties>::PinType: IsOutputPin,
 {
-    fn from(
-        pin: GpioPin<Unknown, RA, IRA, PINTYPE, SIG, GPIONUM>,
-    ) -> GpioPin<Alternate<AF2>, RA, IRA, PINTYPE, SIG, GPIONUM> {
+    fn from(pin: GpioPin<Unknown, GPIONUM>) -> GpioPin<Alternate<AF2>, GPIONUM> {
         pin.into_alternate_2()
     }
 }
 
-impl<MODE, RA, IRA, PINTYPE, SIG, const GPIONUM: u8> GpioPin<MODE, RA, IRA, PINTYPE, SIG, GPIONUM>
+impl<MODE, const GPIONUM: u8> GpioPin<MODE, GPIONUM>
 where
-    RA: BankGpioRegisterAccess,
-    IRA: InteruptStatusRegisterAccess,
-    PINTYPE: IsOutputPin,
-    SIG: GpioSignal,
+    Self: GpioProperties,
+    <Self as GpioProperties>::PinType: IsOutputPin,
 {
     fn init_output(&self, alternate: AlternateFunction, open_drain: bool) {
         let gpio = unsafe { &*GPIO::PTR };
 
-        RA::write_out_en_set(1 << (GPIONUM % 32));
+        <Self as GpioProperties>::Bank::write_out_en_set(1 << (GPIONUM % 32));
         gpio.pin[GPIONUM as usize].modify(|_, w| w.pad_driver().bit(open_drain));
 
         gpio.func_out_sel_cfg[GPIONUM as usize]
@@ -1096,62 +988,31 @@ where
         });
     }
 
-    pub fn into_push_pull_output(
-        self,
-    ) -> GpioPin<Output<PushPull>, RA, IRA, PINTYPE, SIG, GPIONUM> {
+    pub fn into_push_pull_output(self) -> GpioPin<Output<PushPull>, GPIONUM> {
         self.init_output(GPIO_FUNCTION, false);
-        GpioPin {
-            _mode: PhantomData,
-            _pintype: PhantomData,
-            _reg_access: PhantomData,
-            _ira: PhantomData,
-            _signals: PhantomData,
-        }
+        GpioPin { _mode: PhantomData }
     }
 
-    pub fn into_open_drain_output(
-        self,
-    ) -> GpioPin<Output<OpenDrain>, RA, IRA, PINTYPE, SIG, GPIONUM> {
+    pub fn into_open_drain_output(self) -> GpioPin<Output<OpenDrain>, GPIONUM> {
         self.init_output(GPIO_FUNCTION, true);
-        GpioPin {
-            _mode: PhantomData,
-            _pintype: PhantomData,
-            _reg_access: PhantomData,
-            _ira: PhantomData,
-            _signals: PhantomData,
-        }
+        GpioPin { _mode: PhantomData }
     }
 
-    pub fn into_alternate_1(self) -> GpioPin<Alternate<AF1>, RA, IRA, PINTYPE, SIG, GPIONUM> {
+    pub fn into_alternate_1(self) -> GpioPin<Alternate<AF1>, GPIONUM> {
         self.init_output(AlternateFunction::Function1, false);
-        GpioPin {
-            _mode: PhantomData,
-            _pintype: PhantomData,
-            _reg_access: PhantomData,
-            _ira: PhantomData,
-            _signals: PhantomData,
-        }
+        GpioPin { _mode: PhantomData }
     }
 
-    pub fn into_alternate_2(self) -> GpioPin<Alternate<AF2>, RA, IRA, PINTYPE, SIG, GPIONUM> {
+    pub fn into_alternate_2(self) -> GpioPin<Alternate<AF2>, GPIONUM> {
         self.init_output(AlternateFunction::Function2, false);
-        GpioPin {
-            _mode: PhantomData,
-            _pintype: PhantomData,
-            _reg_access: PhantomData,
-            _ira: PhantomData,
-            _signals: PhantomData,
-        }
+        GpioPin { _mode: PhantomData }
     }
 }
 
-impl<MODE, RA, IRA, PINTYPE, SIG, const GPIONUM: u8> OutputPin
-    for GpioPin<MODE, RA, IRA, PINTYPE, SIG, GPIONUM>
+impl<MODE, const GPIONUM: u8> OutputPin for GpioPin<MODE, GPIONUM>
 where
-    RA: BankGpioRegisterAccess,
-    IRA: InteruptStatusRegisterAccess,
-    PINTYPE: IsOutputPin,
-    SIG: GpioSignal,
+    Self: GpioProperties,
+    <Self as GpioProperties>::PinType: IsOutputPin,
 {
     fn set_to_open_drain_output(&mut self) -> &mut Self {
         self.init_output(GPIO_FUNCTION, true);
@@ -1165,18 +1026,18 @@ where
 
     fn enable_output(&mut self, on: bool) -> &mut Self {
         if on {
-            RA::write_out_en_set(1 << (GPIONUM % 32));
+            <Self as GpioProperties>::Bank::write_out_en_set(1 << (GPIONUM % 32));
         } else {
-            RA::write_out_en_clear(1 << (GPIONUM % 32));
+            <Self as GpioProperties>::Bank::write_out_en_clear(1 << (GPIONUM % 32));
         }
         self
     }
 
     fn set_output_high(&mut self, high: bool) -> &mut Self {
         if high {
-            RA::write_output_set(1 << (GPIONUM % 32));
+            <Self as GpioProperties>::Bank::write_output_set(1 << (GPIONUM % 32));
         } else {
-            RA::write_output_clear(1 << (GPIONUM % 32));
+            <Self as GpioProperties>::Bank::write_output_clear(1 << (GPIONUM % 32));
         }
         self
     }
@@ -1217,7 +1078,10 @@ where
             GPIO_FUNCTION
         } else {
             let mut res = GPIO_FUNCTION;
-            for (i, output_signal) in SIG::output_signals().iter().enumerate() {
+            for (i, output_signal) in <Self as GpioProperties>::Signals::output_signals()
+                .iter()
+                .enumerate()
+            {
                 if let Some(output_signal) = output_signal {
                     if *output_signal == signal {
                         res = match i {
@@ -1274,23 +1138,15 @@ where
     }
 }
 
-impl<MODE, RA, IRA, PINTYPE, SIG, const GPIONUM: u8> GpioPin<MODE, RA, IRA, PINTYPE, SIG, GPIONUM>
+impl<MODE, const GPIONUM: u8> GpioPin<MODE, GPIONUM>
 where
-    RA: BankGpioRegisterAccess,
-    IRA: InteruptStatusRegisterAccess,
-    PINTYPE: IsAnalogPin,
-    SIG: GpioSignal,
+    Self: GpioProperties,
+    <Self as GpioProperties>::PinType: IsAnalogPin,
 {
-    pub fn into_analog(self) -> GpioPin<Analog, RA, IRA, PINTYPE, SIG, GPIONUM> {
+    pub fn into_analog(self) -> GpioPin<Analog, GPIONUM> {
         crate::soc::gpio::internal_into_analog(GPIONUM);
 
-        GpioPin {
-            _mode: PhantomData,
-            _pintype: PhantomData,
-            _reg_access: PhantomData,
-            _ira: PhantomData,
-            _signals: PhantomData,
-        }
+        GpioPin { _mode: PhantomData }
     }
 }
 
@@ -1444,6 +1300,13 @@ impl IO {
     }
 }
 
+pub trait GpioProperties {
+    type Bank: BankGpioRegisterAccess;
+    type InterruptStatus: InterruptStatusRegisterAccess;
+    type Signals: GpioSignal;
+    type PinType: PinType;
+}
+
 #[doc(hidden)]
 #[macro_export]
 macro_rules! gpio {
@@ -1478,6 +1341,13 @@ macro_rules! gpio {
             }
 
             $(
+                impl<MODE> crate::gpio::GpioProperties for GpioPin<MODE,  $gpionum> {
+                    type Bank = crate::gpio::[< Bank $bank GpioRegisterAccess >];
+                    type InterruptStatus = crate::gpio::[< InterruptStatusRegisterAccessBank $bank >];
+                    type Signals = [< Gpio $gpionum Signals >];
+                    type PinType = crate::gpio::[<$type PinType>];
+                }
+
                 pub struct [<Gpio $gpionum Signals>] {}
 
                 impl crate::gpio::GpioSignal for [<Gpio $gpionum Signals>] {
@@ -1510,12 +1380,12 @@ macro_rules! gpio {
 
             pub struct Pins {
                 $(
-                    pub [< gpio $gpionum >] : GpioPin<Unknown, [< Bank $bank GpioRegisterAccess >], $crate::gpio::[< InteruptStatusRegisterAccessBank $bank >], [< $type PinType >], [<Gpio $gpionum Signals>], $gpionum>,
+                    pub [< gpio $gpionum >] : GpioPin<Unknown, $gpionum>,
                 )+
             }
 
             $(
-                pub type [<Gpio $gpionum >]<MODE> = GpioPin<MODE, [< Bank $bank GpioRegisterAccess >], $crate::gpio::[< InteruptStatusRegisterAccessBank $bank >], [< $type PinType >], [<Gpio $gpionum Signals>], $gpionum>;
+                pub type [<Gpio $gpionum >]<MODE> = GpioPin<MODE, $gpionum>;
             )+
 
             pub(crate) enum ErasedPin<MODE> {
@@ -1760,13 +1630,10 @@ mod asynch {
     const NEW_AW: AtomicWaker = AtomicWaker::new();
     static PIN_WAKERS: [AtomicWaker; NUM_PINS] = [NEW_AW; NUM_PINS];
 
-    impl<MODE, RA, IRA, PINTYPE, SIG, const GPIONUM: u8> Wait
-        for GpioPin<Input<MODE>, RA, IRA, PINTYPE, SIG, GPIONUM>
+    impl<MODE, const GPIONUM: u8> Wait for GpioPin<Input<MODE>, GPIONUM>
     where
-        RA: BankGpioRegisterAccess,
-        PINTYPE: IsInputPin,
-        IRA: InteruptStatusRegisterAccess,
-        SIG: GpioSignal,
+        Self: GpioProperties,
+        <Self as GpioProperties>::PinType: IsInputPin,
     {
         async fn wait_for_high(&mut self) -> Result<(), Self::Error> {
             PinFuture::new(self, Event::HighLevel).await
@@ -1828,23 +1695,25 @@ mod asynch {
     unsafe fn GPIO() {
         let mut intrs = match crate::get_core() {
             crate::Cpu::ProCpu => {
-                InteruptStatusRegisterAccessBank0::pro_cpu_interrupt_status_read() as u64
+                InterruptStatusRegisterAccessBank0::pro_cpu_interrupt_status_read() as u64
             }
             #[cfg(multi_core)]
             crate::Cpu::AppCpu => {
-                InteruptStatusRegisterAccessBank0::app_cpu_interrupt_status_read() as u64
+                InterruptStatusRegisterAccessBank0::app_cpu_interrupt_status_read() as u64
             }
         };
 
         #[cfg(any(esp32, esp32s2, esp32s3))]
         match crate::get_core() {
             crate::Cpu::ProCpu => {
-                intrs |= (InteruptStatusRegisterAccessBank1::pro_cpu_interrupt_status_read() as u64)
+                intrs |= (InterruptStatusRegisterAccessBank1::pro_cpu_interrupt_status_read()
+                    as u64)
                     << 32
             }
             #[cfg(multi_core)]
             crate::Cpu::AppCpu => {
-                intrs |= (InteruptStatusRegisterAccessBank1::app_cpu_interrupt_status_read() as u64)
+                intrs |= (InterruptStatusRegisterAccessBank1::app_cpu_interrupt_status_read()
+                    as u64)
                     << 32
             }
         };
diff --git a/esp-hal-common/src/soc/esp32/gpio.rs b/esp-hal-common/src/soc/esp32/gpio.rs
index 6c25a1840..80f500967 100644
--- a/esp-hal-common/src/soc/esp32/gpio.rs
+++ b/esp-hal-common/src/soc/esp32/gpio.rs
@@ -3,15 +3,10 @@ use paste::paste;
 use crate::{
     gpio::{
         AlternateFunction,
-        Bank0GpioRegisterAccess,
-        Bank1GpioRegisterAccess,
         GpioPin,
-        InputOnlyAnalogPinType,
-        InputOutputAnalogPinType,
-        InputOutputPinType,
-        InteruptStatusRegisterAccess,
-        InteruptStatusRegisterAccessBank0,
-        InteruptStatusRegisterAccessBank1,
+        InterruptStatusRegisterAccess,
+        InterruptStatusRegisterAccessBank0,
+        InterruptStatusRegisterAccessBank1,
         Unknown,
     },
     peripherals::GPIO,
@@ -722,7 +717,7 @@ crate::gpio::analog! {
      (27, 17, touch_pad7,           mux_sel,        fun_sel,        fun_ie, rue,       rde      )
 }
 
-impl InteruptStatusRegisterAccess for InteruptStatusRegisterAccessBank0 {
+impl InterruptStatusRegisterAccess for InterruptStatusRegisterAccessBank0 {
     fn pro_cpu_interrupt_status_read() -> u32 {
         unsafe { &*GPIO::PTR }.pcpu_int.read().bits()
     }
@@ -740,7 +735,7 @@ impl InteruptStatusRegisterAccess for InteruptStatusRegisterAccessBank0 {
     }
 }
 
-impl InteruptStatusRegisterAccess for InteruptStatusRegisterAccessBank1 {
+impl InterruptStatusRegisterAccess for InterruptStatusRegisterAccessBank1 {
     fn pro_cpu_interrupt_status_read() -> u32 {
         unsafe { &*GPIO::PTR }.pcpu_int1.read().bits()
     }
diff --git a/esp-hal-common/src/soc/esp32c2/gpio.rs b/esp-hal-common/src/soc/esp32c2/gpio.rs
index 402beb5ff..c6f627d92 100644
--- a/esp-hal-common/src/soc/esp32c2/gpio.rs
+++ b/esp-hal-common/src/soc/esp32c2/gpio.rs
@@ -3,12 +3,9 @@ use paste::paste;
 use crate::{
     gpio::{
         AlternateFunction,
-        Bank0GpioRegisterAccess,
         GpioPin,
-        InputOutputAnalogPinType,
-        InputOutputPinType,
-        InteruptStatusRegisterAccess,
-        InteruptStatusRegisterAccessBank0,
+        InterruptStatusRegisterAccess,
+        InterruptStatusRegisterAccessBank0,
         Unknown,
     },
     peripherals::GPIO,
@@ -165,7 +162,7 @@ crate::gpio::analog! {
     4
 }
 
-impl InteruptStatusRegisterAccess for InteruptStatusRegisterAccessBank0 {
+impl InterruptStatusRegisterAccess for InterruptStatusRegisterAccessBank0 {
     fn pro_cpu_interrupt_status_read() -> u32 {
         unsafe { &*GPIO::PTR }.pcpu_int.read().bits()
     }
diff --git a/esp-hal-common/src/soc/esp32c3/gpio.rs b/esp-hal-common/src/soc/esp32c3/gpio.rs
index a7a2a946d..c7a8e0aba 100644
--- a/esp-hal-common/src/soc/esp32c3/gpio.rs
+++ b/esp-hal-common/src/soc/esp32c3/gpio.rs
@@ -3,12 +3,9 @@ use paste::paste;
 use crate::{
     gpio::{
         AlternateFunction,
-        Bank0GpioRegisterAccess,
         GpioPin,
-        InputOutputAnalogPinType,
-        InputOutputPinType,
-        InteruptStatusRegisterAccess,
-        InteruptStatusRegisterAccessBank0,
+        InterruptStatusRegisterAccess,
+        InterruptStatusRegisterAccessBank0,
         Unknown,
     },
     peripherals::GPIO,
@@ -200,7 +197,7 @@ crate::gpio::analog! {
     5
 }
 
-impl InteruptStatusRegisterAccess for InteruptStatusRegisterAccessBank0 {
+impl InterruptStatusRegisterAccess for InterruptStatusRegisterAccessBank0 {
     fn pro_cpu_interrupt_status_read() -> u32 {
         unsafe { &*GPIO::PTR }.pcpu_int.read().bits()
     }
diff --git a/esp-hal-common/src/soc/esp32c6/gpio.rs b/esp-hal-common/src/soc/esp32c6/gpio.rs
index 307202341..a919447ba 100644
--- a/esp-hal-common/src/soc/esp32c6/gpio.rs
+++ b/esp-hal-common/src/soc/esp32c6/gpio.rs
@@ -3,12 +3,9 @@ use paste::paste;
 use crate::{
     gpio::{
         AlternateFunction,
-        Bank0GpioRegisterAccess,
         GpioPin,
-        InputOutputAnalogPinType,
-        InputOutputPinType,
-        InteruptStatusRegisterAccess,
-        InteruptStatusRegisterAccessBank0,
+        InterruptStatusRegisterAccess,
+        InterruptStatusRegisterAccessBank0,
         Unknown,
     },
     peripherals::GPIO,
@@ -282,7 +279,7 @@ crate::gpio::analog! {
     7
 }
 
-impl InteruptStatusRegisterAccess for InteruptStatusRegisterAccessBank0 {
+impl InterruptStatusRegisterAccess for InterruptStatusRegisterAccessBank0 {
     fn pro_cpu_interrupt_status_read() -> u32 {
         unsafe { &*GPIO::PTR }.pcpu_int.read().bits()
     }
diff --git a/esp-hal-common/src/soc/esp32h2/gpio.rs b/esp-hal-common/src/soc/esp32h2/gpio.rs
index e6f157a26..5ab1a041d 100644
--- a/esp-hal-common/src/soc/esp32h2/gpio.rs
+++ b/esp-hal-common/src/soc/esp32h2/gpio.rs
@@ -3,12 +3,9 @@ use paste::paste;
 use crate::{
     gpio::{
         AlternateFunction,
-        Bank0GpioRegisterAccess,
         GpioPin,
-        InputOutputAnalogPinType,
-        InputOutputPinType,
-        InteruptStatusRegisterAccess,
-        InteruptStatusRegisterAccessBank0,
+        InterruptStatusRegisterAccess,
+        InterruptStatusRegisterAccessBank0,
         Unknown,
     },
     peripherals::GPIO,
@@ -257,7 +254,7 @@ crate::gpio::analog! {
     5
 }
 
-impl InteruptStatusRegisterAccess for InteruptStatusRegisterAccessBank0 {
+impl InterruptStatusRegisterAccess for InterruptStatusRegisterAccessBank0 {
     fn pro_cpu_interrupt_status_read() -> u32 {
         unsafe { &*GPIO::PTR }.pcpu_int.read().bits()
     }
diff --git a/esp-hal-common/src/soc/esp32s2/gpio.rs b/esp-hal-common/src/soc/esp32s2/gpio.rs
index 02dbec492..51965da17 100644
--- a/esp-hal-common/src/soc/esp32s2/gpio.rs
+++ b/esp-hal-common/src/soc/esp32s2/gpio.rs
@@ -3,14 +3,10 @@ use paste::paste;
 use crate::{
     gpio::{
         AlternateFunction,
-        Bank0GpioRegisterAccess,
-        Bank1GpioRegisterAccess,
         GpioPin,
-        InputOutputAnalogPinType,
-        InputOutputPinType,
-        InteruptStatusRegisterAccess,
-        InteruptStatusRegisterAccessBank0,
-        InteruptStatusRegisterAccessBank1,
+        InterruptStatusRegisterAccess,
+        InterruptStatusRegisterAccessBank0,
+        InterruptStatusRegisterAccessBank1,
         Unknown,
     },
     peripherals::GPIO,
@@ -384,7 +380,7 @@ crate::gpio::analog! {
     (21, 21,  rtc_pad21,      mux_sel,             fun_sel,             fun_ie,             rue,             rde)
 }
 
-impl InteruptStatusRegisterAccess for InteruptStatusRegisterAccessBank0 {
+impl InterruptStatusRegisterAccess for InterruptStatusRegisterAccessBank0 {
     fn pro_cpu_interrupt_status_read() -> u32 {
         unsafe { &*GPIO::PTR }.pcpu_int.read().bits()
     }
@@ -394,7 +390,7 @@ impl InteruptStatusRegisterAccess for InteruptStatusRegisterAccessBank0 {
     }
 }
 
-impl InteruptStatusRegisterAccess for InteruptStatusRegisterAccessBank1 {
+impl InterruptStatusRegisterAccess for InterruptStatusRegisterAccessBank1 {
     fn pro_cpu_interrupt_status_read() -> u32 {
         unsafe { &*GPIO::PTR }.pcpu_int1.read().bits()
     }
diff --git a/esp-hal-common/src/soc/esp32s3/gpio.rs b/esp-hal-common/src/soc/esp32s3/gpio.rs
index b4ff76686..162dd4a99 100644
--- a/esp-hal-common/src/soc/esp32s3/gpio.rs
+++ b/esp-hal-common/src/soc/esp32s3/gpio.rs
@@ -3,14 +3,10 @@ use paste::paste;
 use crate::{
     gpio::{
         AlternateFunction,
-        Bank0GpioRegisterAccess,
-        Bank1GpioRegisterAccess,
         GpioPin,
-        InputOutputAnalogPinType,
-        InputOutputPinType,
-        InteruptStatusRegisterAccess,
-        InteruptStatusRegisterAccessBank0,
-        InteruptStatusRegisterAccessBank1,
+        InterruptStatusRegisterAccess,
+        InterruptStatusRegisterAccessBank0,
+        InterruptStatusRegisterAccessBank1,
         Unknown,
     },
     peripherals::GPIO,
@@ -341,7 +337,7 @@ crate::gpio::analog! {
 
 // Whilst the S3 is a dual core chip, it shares the enable registers between
 // cores so treat it as a single core device
-impl InteruptStatusRegisterAccess for InteruptStatusRegisterAccessBank0 {
+impl InterruptStatusRegisterAccess for InterruptStatusRegisterAccessBank0 {
     fn pro_cpu_interrupt_status_read() -> u32 {
         unsafe { &*GPIO::PTR }.pcpu_int.read().bits()
     }
@@ -351,7 +347,7 @@ impl InteruptStatusRegisterAccess for InteruptStatusRegisterAccessBank0 {
     }
 }
 
-impl InteruptStatusRegisterAccess for InteruptStatusRegisterAccessBank1 {
+impl InterruptStatusRegisterAccess for InterruptStatusRegisterAccessBank1 {
     fn pro_cpu_interrupt_status_read() -> u32 {
         unsafe { &*GPIO::PTR }.pcpu_int1.read().bits()
     }